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61. 发明专利

JPS59147541A Ecl logical circuit 失效
标题翻译： ECL逻辑电路
公开(公告)号：JPS59147541A
公开(公告)日：1984-08-23
申请号：JP2066583
申请日：1983-02-10
申请人： Matsushita Electric Ind Co Ltd
发明人： AONO KUNITOSHI , YAMADA HARUYASU , HASEGAWA KENICHI , MORI TOSHIKI
IPC分类号： H03K19/086
摘要： PURPOSE: To keep the logical amplitude constant by applying negative feedback control to the current of a current source of a logical circuit depending on the fluctuation of logical amplitude.
CONSTITUTION: A block 1 surrounded by dotted lines is a 3-input NAND circuit stacked longitudinally in three stages with emitter coupled logical ECL gates and consists of transistors (TRs)T
1 ∼T
6 . A TRT
10 and a resistor R
6 in a block 3 surrounded by dotted lines 3 constitute a current source, and the same voltage V
c as the base voltage of a TRT
7 of the current source of the block 1 is applied to the base of the TRT
10 to form a current mirror circuit, and the current of the current source flows to a resistor R
7 via TRsT
11 , T
12 , and T
13 . Reference voltages VL, VM and VN are applied respectively to the TRs. Then, resistors R
8 , R
9 , TRsT
14 and T
15 constitute a differential amplifier and the current value of the current source is applied with negative feedback to be controlled by an output voltage of the amplifier.
COPYRIGHT: (C)1984,JPO&Japio
摘要翻译：目的：根据逻辑振幅的波动，通过对逻辑电路的电流源施加负反馈控制来保持逻辑幅度恒定。构成：由虚线包围的块1是三级堆叠的三输入NAND电路，具有发射极耦合的逻辑ECL门并由晶体管（TR）T1-T6组成。 TRT10和由虚线3包围的块3中的电阻器R6构成电流源，并且将与块1的电流源的TRT7的基极电压相同的电压Vc施加到TRT10的基极，以形成电流镜电路，并且电流源的电流经由TRsT11，T12和T13流到电阻器R7。参考电压VL，VM和VN分别施加到TR。然后，电阻R8，R9，TRsT14和T15构成差分放大器，并且电流源的电流值被施加负反馈以由放大器的输出电压控制。

62. 发明专利

JPS59147506A Bias circuit 失效
标题翻译：偏置电路
公开(公告)号：JPS59147506A
公开(公告)日：1984-08-23
申请号：JP2063783
申请日：1983-02-10
申请人： Matsushita Electric Ind Co Ltd
发明人： HASEGAWA KENICHI , YAMADA HARUYASU , MORI TOSHIKI , AONO KUNITOSHI
IPC分类号： H03F1/30
摘要： PURPOSE: To supply stably a bias by providing a transistor (TR) pair with special combination between a constant current source supplying the bias to plural circuits and a voltage source so as to eliminate the effect of fluctuation caused by a current amplification factor of the TRs and temperature change.
CONSTITUTION: The TR pairs are constituted and connected in cascade by the 1st TRs Q
11 , Q
13 whose collectors and bases are connected respectively and the 2nd TRs Q
12 , Q
14 whose bases are connected to the bases of the TRs Q
11 , Q
13 . A voltage source V
2 is connected to the collector of the TRs Q
13 , Q
14 of the TR pair via resistors R
3 , R
4 and the collector of the TRQ
14 is connected to the base of the TRQ
3 of the cathode follower. Further, the collector of the TRQ
1 , Q
2 of the constant current source connected to the voltage source V
1 is connected to the emitter of the TRs Q
11 , Q
12 and the collector of the TRQ
15 of the constant current source is connected to the emitter of the TRQ
3 . Then, the effect of fluctuation in the current amplification factor and temperature change on each TR are eliminated and a bias is applied stably to the circuits 1∼3.
COPYRIGHT: (C)1984,JPO&Japio
摘要翻译：目的：为了稳定地提供偏置，通过在向多个电路提供偏置的恒流源和电压源之间提供特殊组合提供晶体管（TR）对，以消除由TR的电流放大系数引起的波动的影响和温度变化。构成：TR对由第一TRs Q11，Q13级联构成，其集电极和基极分别连接，第二TRs Q12，Q14的基极连接到TRs Q11，Q13的基极。电压源V2经由电阻器R3，R4连接到TR对的TRs Q13，Q14的集电极，并且TRQ14的集电极连接到阴极跟随器的TRQ3的基极。此外，连接到电压源V1的恒流源的TRQ1，Q2的集电极连接到TRs Q11，Q12的发射极，恒流源的TRQ15的集电极连接到TRQ3的发射极。然后，消除了电流放大因子的波动和每个TR的温度变化的影响，并且将偏置稳定地施加到电路1-3。

63. 发明专利

JPS5983421A ECL INPUT AND OUTPUT CIRCUIT 失效
公开(公告)号：JPS5983421A
公开(公告)日：1984-05-14
申请号：JP19409782
申请日：1982-11-04
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MORI TOSHIKI , YAMADA HARUYASU , HASEGAWA KENICHI , AONO KUNITOSHI
IPC分类号： H03K19/086
摘要： PURPOSE:To supply signals from an external output circuit, by adding a gate for input/output switch signal to an ECL gate and securing the conduction of said in gate an input operation mode to set the base of an output transistor at a low logic potential. CONSTITUTION:An ECL gate is provided with transistors TR402-404, load resistances 405 and 406, and a constant current source 407. When an input/output switch terminal 410 is set at a low level, a TR408 is turned off. Then the signal applied to a terminal 401 is delivered to an input/output terminal 409. When the potential of the terminal 410 is set at a high level, the output of an external 412 is turned into an input signal of a terminal 418 via a TR413.

64. 发明专利

JPS5846115B2 失效
公开(公告)号：JPS5846115B2
公开(公告)日：1983-10-14
申请号：JP15764177
申请日：1977-12-27
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： HASHIMOTO SEIICHI , MEKI NORIO , HASEGAWA KENICHI , CHIBA MITSUO , ARAKI FUMIAKI
IPC分类号： H04N5/93 , H04N5/18

65. 发明专利

JPS5873286A ANGULAR MODULATION CIRCUIT 失效
公开(公告)号：JPS5873286A
公开(公告)日：1983-05-02
申请号：JP17231481
申请日：1981-10-27
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： HASEGAWA KENICHI
IPC分类号： H03C3/06 , G11B20/06 , H03C3/02 , H04N5/40 , H04N5/922
摘要： PURPOSE:To increase the degree of freedom for adjustment processes at a mass production line, by forming the titled circuit so as to independently adjust the width of frequency shift and the oscillation frequency. CONSTITUTION:A video signal from a signal source SG1 is applied to a transistor (TR) Q1 via a capacitor C1. TRs Q3, Q4 form a current mirror circuit, and the collector of a TR Q4 is connected to a variable frequency oscillator VCO. A voltage of a voltage source V2 is given to the TR Q1 via a switch SW1 which turns on during a synchronizing tip of the video signal only. In varying a resistor R3, only the width of frequency shift of the VCO is changed, and in varying a resistor R2, the oscillation frequency of the VCO is changed but the width of the frequency shift is unchanged.

66. 发明专利

JPS5831419A CONSTANT-CURRENT CIRCUIT 失效
公开(公告)号：JPS5831419A
公开(公告)日：1983-02-24
申请号：JP12854381
申请日：1981-08-17
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： HASEGAWA KENICHI
IPC分类号： G05F3/26 , G05F3/22
摘要： PURPOSE:To obtain a constant-current circuit capable of using low power voltage independent of temperature in an integrated circuit by combining two transistors to obtain constant-current outputs. CONSTITUTION:In a constant-current circuit A', both the emitters of transistors (TRs) Q1, Q2 are earthed in common and the bases are connected to each other and connected to the collector of the TRQ1. Resistors RB1, RB2 are connected in series and connected to an voltage source VCC and the earth. The connection point between the registers RB1, RB2 and the connection point between the bases of the TRQ1, Q2 are connected to each other. Consequently constant-current outputs are obtained from the collector of the TRQ2.

67. 发明专利

JPS57183122A VOLTAGE SHIFTING CIRCUIT 失效
公开(公告)号：JPS57183122A
公开(公告)日：1982-11-11
申请号：JP6911681
申请日：1981-05-07
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： HASEGAWA KENICHI
IPC分类号： H03K5/007 , H03F3/45 , H03K5/003
摘要： PURPOSE:To eliminate variance in shift voltage by providing feedback to a differential amplifier by a transistor (TR) having the same polarity with an output TR. CONSTITUTION:The collector of one TRQ2 constituting a differential amplifier is fed back to the base of the TRQ2 through TRs Q5 and Q6. Consequently, the base potential of a TRQ1 is equal to that of the TRQ2. An output TRQ12 and the TRQ6 have the same polarity and are manufactured at the same time, so their base-emitter voltages are equal to each other and there is no variance in output voltage. In addition, a shift voltage is determined by resistances R11 and R12.

68. 发明专利

JPS57133728A FREQUENCY DIVIDER 失效
公开(公告)号：JPS57133728A
公开(公告)日：1982-08-18
申请号：JP1987681
申请日：1981-02-12
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： HASEGAWA KENICHI
IPC分类号： H03K23/00 , H03K23/64 , H03K23/66
摘要： PURPOSE:To eliminate the variance in delay time between the input and the output of a frequency divider of (n+1/2), by controlling a selection circuit with an output signal of the frequency dividing circuit. CONSTITUTION:A delay time T1 from the rise edge A of a signal source 1 (a) to the rise edge A' of an output (g) of a frequency dividing circuit 3, is the sum between the delay time of a differential amplifier 11, the delay time of an AND circuit 12, the delay time of an OR circuit 14 and the delay time of a frequency dividing circuit 3. Next, a delay time T2 from the fall edge C of (a) to the fall edge C' of (g), is similarly the sum of the delay times of the differential amplifier 11, an AND circuit 13, the OR circuit 14, and the frequency dividing circuit 3. In this case, since the AND circuts 12, 13 are of the same circuit form and the phase difference between two outputs of the differential amplifier 11 can be regarded as almost 180 deg.C, the delay times T1, T2 are equal.

69. 发明专利

JPS5765908A Bias circuit 失效
标题翻译：偏置电路
公开(公告)号：JPS5765908A
公开(公告)日：1982-04-21
申请号：JP14349880
申请日：1980-10-13
申请人： Matsushita Electric Ind Co Ltd
发明人： HASEGAWA KENICHI
IPC分类号： H03F1/30
CPC分类号： H03F1/302
摘要： PURPOSE:To compensate the voltage drop due to a resistance through which a bias voltage is supplied to a transistor, by providing a tansistor of a conduction type different from that of said transistor with bases connected commonly. CONSTITUTION:A bias voltage is supplied from a voltage source V0 through a resistance RB1 to the base of an NPN transistor (TR)Q1. The collector current is supplied to the TRQ1 from an NPN TRQ2, and the base of a PNP TRQ3 is connected to the base of the TRQ2 to make base currents of TRs Q2 and Q3 equal to each other. A PNP TRQ4 is connected to the base of the TRQ1, and TRs Q3 and Q4 are connected in series. An AC signal is given to the base of the TRQ1 trough a capacitor, and the signal is supplied from the emitter of the TRQ1 to a differential amplifier.
摘要翻译：目的：为了补偿由于向晶体管提供偏置电压的电阻引起的电压降，通过提供与所述晶体管的导通类型不同的导通型晶体管，其基极通常连接。构成：从电压源V0通过电阻RB1向NPN晶体管（TR）Q1的基极提供偏置电压。集电极电流从NPN TRQ2提供给TRQ1，PNP TRQ3的基极连接到TRQ2的基极，使TRs Q2和Q3的基极电流相等。 PNP TRQ4连接到TRQ1的基极，TRs Q3和Q4串联。通过电容器向TRQ1的基极提供AC信号，并且该信号从TRQ1的发射极提供给差分放大器。

70. 发明专利

JPS5717482A MANUFACTURE OF CERAMIC ELECTRONIC PART 失效
公开(公告)号：JPS5717482A
公开(公告)日：1982-01-29
申请号：JP8975480
申请日：1980-06-30
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： TAGI HIROMITSU , SATOU NORIYA , HONJIYOU KATSUHIKO , OGAWA MAKOTO , KUGUHARA KUSUO , KURODA SHIYOUJI , HASEGAWA KENICHI
IPC分类号： C04B41/88 , H01G4/005 , H01L49/00

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