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61. 发明授权

US07132675B2 Programmable conductor memory cell structure and method therefor 有权
公开(公告)号：US07132675B2
公开(公告)日：2006-11-07
申请号：US10787123
申请日：2004-02-27
申请人： Terry L. Gilton
发明人： Terry L. Gilton
IPC分类号： H01L29/12 , G11C11/00
CPC分类号： H01L45/143 , H01L45/085 , H01L45/1233 , H01L45/1253 , H01L45/141 , H01L45/1641 , H01L45/1658 , H01L45/1675 , H01L45/1683
摘要： In programmable conductor memory cells, metal ions precipitate out of a glass electrolyte element in response to an applied electric field in one direction only, causing a conductive pathway to grow from cathode to anode. The amount of conductive pathway growth, and therefore the programming, depends, in part, on the availability of metal ions. It is important that the metal ions come only from the solid solution of the memory cell body. If additional metal ions are supplied from other sources, such as the sidewall edge at the anode interface, the amount of metal ions may not be directly related to the strength of the electric field, and the programming will not respond consistently from cell to cell. The embodiments described herein provide new and novel structures that block interface diffusion paths for metal ions, leaving diffusion from the bulk glass electrolyte as the only supply of metal ions for conductive pathway formation.

62. 发明授权

US07115422B1 Separation apparatus including porous silicon column 有权
标题翻译：分离装置包括多孔硅柱
公开(公告)号：US07115422B1
公开(公告)日：2006-10-03
申请号：US09443070
申请日：1999-11-18
申请人： Terry L. Gilton
发明人： Terry L. Gilton
IPC分类号： G01N1/18
CPC分类号： G01N1/40 , G01N1/405 , G01N33/54353 , Y10S435/967 , Y10S436/825 , Y10T436/112499 , Y10T436/117497 , Y10T436/25375 , Y10T436/255
摘要： A sample separation apparatus including a porous, or rough, capillary column. The porous capillary column includes a matrix which defines pores, and may be formed rough surface of hemispherical grain silicon. The capillary column is defined in a surface of a substrate, such as silicon. The sample separation apparatus may include a stationary phase or a capture substrate disposed on the surfaces thereof. The sample separation apparatus may also include a detector positioned proximate the capillary column. A variation of the sample separation apparatus includes an electrode proximate each end of the capillary column. The sample separation apparatus may be employed to effect various types of chromatographic separation, electrophoretic separation, and analyte identification.
摘要翻译：包括多孔或粗糙毛细管柱的样品分离装置。多孔毛细管柱包括限定孔的基质，并且可以形成半球形晶粒硅的粗糙表面。毛细管柱被限定在诸如硅的衬底的表面中。样品分离装置可以包括设置在其表面上的固定相或捕获基板。样品分离装置还可以包括位于毛细管柱附近的检测器。样品分离装置的变体包括靠近毛细管柱的每一端的电极。样品分离装置可用于实现各种色谱分离，电泳分离和分析物鉴定。

63. 发明授权

US07112484B2 Thin film diode integrated with chalcogenide memory cell 有权
公开(公告)号：US07112484B2
公开(公告)日：2006-09-26
申请号：US11003733
申请日：2004-12-06
申请人： Terry L. Gilton
发明人： Terry L. Gilton
IPC分类号： H01L27/108
CPC分类号： G11C13/0011 , G11C2213/11 , G11C2213/72 , H01L27/10 , H01L27/2409 , H01L29/247 , H01L29/685 , H01L45/085 , H01L45/1233 , H01L45/143 , H01L45/1625 , H01L45/1683
摘要： An integrated programmable conductor memory cell and diode device in an integrated circuit comprises a diode and a glass electrolyte element, the glass electrolyte element having metal ions mixed or dissolved therein and being able to selectively form a conductive pathway under the influence of an applied voltage. In one embodiment, both the diode and the memory cell comprise a chalcogenide glass, such as germanium selenide (e.g., Ge2Se8 or Ge25Se75). The first diode element comprises a chalcogenide glass layer having a first conductivity type, the second diode element comprises a chalcogenide glass layer doped with an element such as bismuth and having a second conductivity type opposite to the first conductivity type and the memory cell comprises a chalcogenide glass element with silver ions therein. In another embodiment, the diode comprises silicon and there is a diffusion barrier layer between the diode and the chalcogenide glass memory element. Methods of fabricating integrated programmable conductor memory cell and diode devices are also disclosed.

64. 发明授权

US06864500B2 Programmable conductor memory cell structure 有权
标题翻译：可编程导体存储单元结构
公开(公告)号：US06864500B2
公开(公告)日：2005-03-08
申请号：US10121790
申请日：2002-04-10
申请人： Terry L. Gilton
发明人： Terry L. Gilton
IPC分类号： H01L45/00 , H01L29/02
CPC分类号： H01L45/143 , H01L45/085 , H01L45/1233 , H01L45/1253 , H01L45/141 , H01L45/1641 , H01L45/1658 , H01L45/1675 , H01L45/1683
摘要： In programmable conductor memory cells, metal ions precipitate out of a glass electrolyte element in response to an applied electric field in one direction only, causing a conductive pathway to grow from cathode to anode. The amount of conductive pathway growth, and therefore the programming, depends, in part, on the availability of metal ions. It is important that the metal ions come only from the solid solution of the memory cell body. If additional metal ions are supplied from other sources, such as the sidewall edge at the anode interface, the amount of metal ions may not be directly related to the strength of the electric field, and the programming will not respond consistently from cell to cell. The embodiments described herein provide new and novel structures that block interface diffusion paths for metal ions, leaving diffusion from the bulk glass electrolyte as the only supply of metal ions for conductive pathway formation.
摘要翻译：在可编程导体存储单元中，金属离子响应于仅在一个方向施加的电场而从玻璃电解质元件中沉淀出来，导致导电通路从阴极生长到阳极。导电路径生长的量，因此编程的数量部分地取决于金属离子的可用性。重要的是金属离子仅来自存储单元体的固溶体。如果从其他来源（如阳极界面处的侧壁边缘）提供额外的金属离子，则金属离子的量可能与电场的强度无关，编程将不会从单元到单元一致地反应。本文所述的实施方案提供了新的和新颖的结构，其阻止金属离子的界面扩散路径，留下从本体玻璃电解质的扩散作为导电通路形成的唯一金属离子供应。

65. 发明授权

US06855975B2 Thin film diode integrated with chalcogenide memory cell 有权
标题翻译：与硫族化物记忆体集成的薄膜二极管
公开(公告)号：US06855975B2
公开(公告)日：2005-02-15
申请号：US10121794
申请日：2002-04-10
申请人： Terry L. Gilton
发明人： Terry L. Gilton
IPC分类号： H01L27/10 , H01L27/24 , H01L29/24 , H01L29/68 , H01L27/108 , H01L29/88
CPC分类号： G11C13/0011 , G11C2213/11 , G11C2213/72 , H01L27/10 , H01L27/2409 , H01L29/247 , H01L29/685 , H01L45/085 , H01L45/1233 , H01L45/143 , H01L45/1625 , H01L45/1683
摘要： An integrated programmable conductor memory cell and diode device in an integrated circuit comprises a diode and a glass electrolyte element, the glass electrolyte element having metal ions mixed or dissolved therein and being able to selectively form a conductive pathway under the influence of an applied voltage. In one embodiment, both the diode and the memory cell comprise a chalcogenide glass, such as germanium selenide (e.g., Ge2Se8 or Ge25Se75). The first diode element comprises a chalcogenide glass layer having a first conductivity type, the second diode element comprises a chalcogenide glass layer doped with an element such as bismuth and having a second conductivity type opposite to the first conductivity type and the memory cell comprises a chalcogenide glass element with silver ions therein. In another embodiment, the diode comprises silicon and there is a diffusion barrier layer between the diode and the chalcogenide glass memory element. Methods of fabricating integrated programmable conductor memory cell and diode devices are also disclosed.
摘要翻译：集成电路中的集成可编程导体存储单元和二极管器件包括二极管和玻璃电解质元件，所述玻璃电解质元件具有混合或溶解在其中的金属离子，并且能够在施加电压的影响下选择性地形成导电通路。在一个实施方案中，二极管和存储单元都包含硫族化物玻璃，例如硒化锗（例如Ge 2 Se 8或Ge 25 Se 75）。第一二极管元件包括具有第一导电类型的硫族化物玻璃层，第二二极管元件包括掺杂有诸如铋元素和具有与第一导电类型相反的第二导电类型的硫族化物玻璃层，并且该存储元件包括硫族化物具有银离子的玻璃元素。在另一个实施例中，二极管包括硅，并且在二极管和硫族化物玻璃存储元件之间存在扩散阻挡层。还公开了制造集成可编程导体存储单元和二极管器件的方法。

66. 发明授权

US06852642B2 Gas assisted method for applying resist stripper and gas-resist stripper combinations 有权
标题翻译：抗蚀剂剥离剂和耐气体剥离剂组合的气体辅助方法
公开(公告)号：US06852642B2
公开(公告)日：2005-02-08
申请号：US10164431
申请日：2002-06-06
申请人： Terry L. Gilton
发明人： Terry L. Gilton
IPC分类号： B05D1/00 , B08B3/00 , C03C15/00 , G03F7/42 , H01L21/00 , H01L21/302 , H01L21/306 , H01L21/311 , H01L21/338 , H01L21/461
CPC分类号： H01L21/6715 , G03F7/423 , G03F7/427 , H01L21/02054 , H01L21/31133 , H01L21/6708 , Y10S438/948
摘要： A method for moving resist stripper across the surface of a semiconductor substrate includes applying a wet chemical resist stripper, such as an organic or oxidizing wet chemical resist stripper, to at least a portion of a photomask positioned over the semiconductor substrate. A carrier fluid, such as a gas, is then directed toward the semiconductor substrate so as to move the resist stripper across the substrate. The carrier fluid may be directed toward the substrate as the resist stripper is being applied thereto or following application of the resist stripper. A system for effecting the method is also disclosed.
摘要翻译：将抗蚀剂剥离剂移动穿过半导体衬底的表面的方法包括将湿化学抗蚀剂剥离剂（例如有机或氧化性湿化学抗蚀剂剥离剂）施加到位于半导体衬底上的光掩模的至少一部分上。然后将诸如气体的载体流体引向半导体衬底，以使抗蚀剂剥离剂跨越衬底移动。当抗蚀剂剥离器施加到其上或者在施加抗蚀剂剥离器之后，载体流体可以被引向衬底。还公开了一种用于实现该方法的系统。

67. 发明授权

US06653193B2 Resistance variable device 有权
标题翻译：电阻可变装置
公开(公告)号：US06653193B2
公开(公告)日：2003-11-25
申请号：US09732968
申请日：2000-12-08
申请人： Terry L. Gilton
发明人： Terry L. Gilton
IPC分类号： H01L21336
CPC分类号： H01L45/085 , H01L23/5252 , H01L23/5256 , H01L45/124 , H01L45/1683 , H01L2924/0002 , H01L2924/00
摘要： A resistance variable device and a method for using the same. The device includes a body formed of a voltage or current controlled resistance setable material, and at least two spaced electrodes on the body. The body includes a surface extending from one of the electrodes to the other of the electrodes. The surface has at least one surface striation extending from proximate the one electrode to proximate the other electrode at least when the body of said material is in a highest of selected resistance setable states. The method includes applying a first voltage between the one and the other electrodes to establish a negative and a positive electrode effective to form a conductive path formed of at least some material derived from the voltage or current controlled resistance setable material and on the surface along at least a portion of the at least one striation.
摘要翻译：电阻变化装置及其使用方法。该装置包括由电压或电流控制电阻可设定材料形成的主体，以及在主体上的至少两个间隔开的电极。主体包括从电极中的一个延伸到另一个电极的表面。至少当所述材料的主体处于选定的电阻可设定状态的最高时，表面具有至少一个从邻近的一个电极延伸到接近另一个电极的表面条纹。所述方法包括在所述一个和另一个电极之间施加第一电压以建立负极和正电极，其有效地形成由至少一些源自电压或电流控制电阻可设置材料的材料形成的导电路径，并且沿着至少一个条纹的至少一部分。

68. 发明授权

US06187604B1 Method of making field emitters using porous silicon 失效
标题翻译：使用多孔硅制造场致发射体的方法
公开(公告)号：US06187604B1
公开(公告)日：2001-02-13
申请号：US08864496
申请日：1997-05-28
申请人： Terry L. Gilton
发明人： Terry L. Gilton
IPC分类号： H01L200
CPC分类号： H01J9/025 , H01J2201/30403 , H01J2209/0226
摘要： A process is provided for forming sharp asperities, useful as field emitters. The process comprises: patterning and doping a silicon substrate. The doped silicon substrate is anodized. The anodized area is then used for field emission tips. The process of the present invention is also useful for low temperature sharpening of tips fabricated by other methods. The tips are anodized, and then exposed to radiant energy, and the resulting oxide is removed.
摘要翻译：提供了用于形成尖锐凹凸的工艺，可用作场致发射体。该方法包括：图案化和掺杂硅衬底。掺杂硅衬底被阳极氧化。然后将阳极氧化区域用于场发射尖端。本发明的方法也可用于通过其它方法制造的尖端的低温磨削。将尖端进行阳极氧化，然后暴露于辐射能，并将所得氧化物除去。

69. 发明授权

US6063712A Oxide etch and method of etching 失效
标题翻译：氧化物蚀刻和蚀刻方法
公开(公告)号：US6063712A
公开(公告)日：2000-05-16
申请号：US977783
申请日：1997-11-25
申请人： Terry L. Gilton , David A. Korn
发明人： Terry L. Gilton , David A. Korn
IPC分类号： H01L21/311 , H01L21/00
CPC分类号： H01L21/31111
摘要： An oxide etchant and method of etching are provided. The etchant includes at least one fluorine-containing compound and at least one auxiliary component selected from the group of a boron-containing compound and a phosphorus-containing compound.
摘要翻译：提供氧化物蚀刻剂和蚀刻方法。蚀刻剂包括至少一种含氟化合物和至少一种选自含硼化合物和含磷化合物的辅助成分。

70. 发明授权

US5445994A Method for forming custom planar metal bonding pad connectors for semiconductor dice 失效
标题翻译：用于形成用于半导体晶片的定制平面金属焊盘连接器的方法
公开(公告)号：US5445994A
公开(公告)日：1995-08-29
申请号：US225651
申请日：1994-04-11
申请人： Terry L. Gilton
发明人： Terry L. Gilton
IPC分类号： H01L21/768 , H01L23/485 , H01L25/065 , H01L21/28
CPC分类号： H01L21/76877 , H01L23/485 , H01L24/05 , H01L25/0657 , H01L2224/04042 , H01L2224/05624 , H01L2224/05647 , H01L2224/05666 , H01L2224/05684 , H01L2224/48247 , H01L2224/49171 , H01L2224/85424 , H01L2224/85447 , H01L2224/85466 , H01L2224/85484 , H01L2225/06551 , H01L2225/06555 , H01L2225/06579 , H01L2225/06596 , H01L24/48 , H01L24/49 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01074 , H01L2924/01082 , H01L2924/014 , H01L2924/05042 , H01L2924/14
摘要： A method for forming custom planar connections to the bonding pads of a semiconductor die is provided. The method includes the steps of: depositing a passivation layer on the bonding pads; forming a patterning layer by depositing a dielectric material such as TEOS on the passivation layer; etching through the patterning layer and passivation layer to the bond pads using a first etch mask; etching a connector pattern in the patterning layer using a second etch mask; depositing a metal layer over the patterning layer; and then planarizing the metal layer to an endpoint of the patterning layer to form planar metal connectors having a desired thickness.
摘要翻译：提供了一种用于形成与半导体管芯的接合焊盘的定制平面连接的方法。该方法包括以下步骤：在焊盘上沉积钝化层; 通过在钝化层上沉积介电材料如TEOS来形成图形层; 使用第一蚀刻掩模蚀刻通过图案化层和钝化层到接合焊盘; 使用第二蚀刻掩模蚀刻图案化层中的连接器图案; 在所述图案化层上沉积金属层; 然后将金属层平坦化成图形层的端点以形成具有期望厚度的平面金属连接器。

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