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    • 61. 发明申请
    • Method for analyzing residual agricultural chemical
    • 残留农药分析方法
    • US20050214887A1
    • 2005-09-29
    • US11088871
    • 2005-03-25
    • Takayuki EmoriKoshiro KajiyamaJunichi Kato
    • Takayuki EmoriKoshiro KajiyamaJunichi Kato
    • G01N33/15C12Q1/44C12Q1/46C12Q1/48G01N31/22
    • C12Q1/48C12Q1/44
    • The present invention relates to a method for analyzing residual agricultural chemicals which comprises the steps of acting a reduced glutathione as a reactive substrate and a glutathione transferase serving as a catalyst for the reaction on a carbofuran derivative or a methomyl derivative as a carbamate type agricultural chemical of a new series to thus derivatize the agricultural chemical into a substance having a high choline esterase-inhibitory activity; reacting the substances formed through the derivatization reaction with a choline esterase; and then detecting the presence of the agricultural chemical as the new series of carbamate type one included in a sample to be examined on the basis of the changes in the choline esterase activity thus detected. The method of the present invention may serve as a powerful tool for the detection of the residual agricultural chemicals in grains such as rice and the detection of the content of agricultural chemicals remaining in agricultural products such as vegetables and fruits.
    • 本发明涉及一种分析残留农药的方法,该方法包括以还原型谷胱甘肽作为反应性底物和作为用于作为氨基甲酸酯类农药的呋喃丹衍生物或甲基衍生物的反应催化剂的谷胱甘肽转移酶的步骤 的新系列,从而将农药转化为具有高胆碱酯酶抑制活性的物质; 使通过衍生化反应形成的物质与胆碱酯酶反应; 然后根据检测到的胆碱酯酶活性的变化,检测农药的存在,作为待检样品中包含的新一系列氨基甲酸酯类。 本发明的方法可以作为检测水稻等谷物中的残留农药的检测方法,以及残留在蔬菜,水果等农产品中的农药残留量的检测。
    • 64. 发明授权
    • Charging system, process cartridge and image forming apparatus
    • 充电系统,处理盒和成像设备
    • US06741824B2
    • 2004-05-25
    • US10418219
    • 2003-04-18
    • Masaki OjimaNoboru KashimuraKeiji OkanoJunichi Kato
    • Masaki OjimaNoboru KashimuraKeiji OkanoJunichi Kato
    • C03G1502
    • G03G15/0216
    • An image forming apparatus has an image bearing member; and a charging member forming a nip with the image bearing member to charge the image bearing member. Conductive particles are provided in the nip and a time factor &agr; represented by a following equation satisfies a condition &agr;>15: &agr;=2&pgr;·k·Nc·(W/Vc)/(&rgr;·Cd·Z) Z=−0.5·1n(&pgr;·k·Nc)−1n({square root over (&bgr;)}·D/2) (&bgr;=1.1932) in which &rgr; (&OHgr;) represents a surface resistivity of said image bearing member; Cd (F/mm2) represents an electrostatic capacitance of the image bearing member; D (mm) represents a diameter of the conductive particle; Nc (particle/mm2) represents a density of the conductive particles present on the charging member; Vc (mm/sec) represents a surface moving speed of the charging member; Vd (mm/sec) represents a surface moving speed of the image bearing member; k=Vc/Vd; and W (mm) represents a width of the nip in the moving direction of the image bearing member.
    • 图像形成装置具有图像承载部件; 以及与图像承载部件形成辊隙以对图像承载部件充电的充电部件。 在辊隙中提供导电颗粒,由下式表示的时间因子α满足条件α> 15:其中rho(Ω)表示所述图像承载部件的表面电阻率; Cd(F / mm 2)表示图像承载部件的静电电容; D(mm)表示导电粒子的直径; Nc(粒子/ mm 2)表示充电部件上存在的导电粒子的密度; Vc(mm / sec)表示充电部件的表面移动速度; Vd(mm / sec)表示图像承载部件的表面移动速度; k = Vc / Vd; W(mm)表示图像承载部件的移动方向上的辊隙的宽度。
    • 68. 发明授权
    • Multilayer ceramic capacitor
    • 多层陶瓷电容器
    • US06266230B1
    • 2001-07-24
    • US09339521
    • 1999-06-24
    • Junichi KatoTakuya IshiiKoji YoshidaTsutomu NishimuraYoshimasa Yabu
    • Junichi KatoTakuya IshiiKoji YoshidaTsutomu NishimuraYoshimasa Yabu
    • H01G406
    • H01G4/1227
    • The present invention provides a multilayer ceramic capacitor in which electrode metal layers and dielectric ceramic layers are laminated alternately and its dielectric constant peak is present at a temperature below −50° C. The multilayer ceramic capacitor is at least one selected from a multilayer ceramic capacitor to be incorporated into an electric circuit in which an electric field of at least 200 V/mm is applied to dielectric layers as a DC bias electric field and an alternating current at a frequency of at least 20 kHz is superimposed and a multilayer ceramic capacitor to be incorporated into an electric circuit in which an electric field of at least 200 V/mm is applied to dielectric layers as an AC electric field. As the dielectric ceramic, a ceramic containing lead atoms whose amount is indicated by being measured in the form of PbO, which is at least 30 mol %, particularly a compound with a perovskite structure represented by ABO3 is used. Thus, an inexpensive large-capacity multilayer capacitor that has thermal resistance and is stable for a high DC bias voltage and a high frequency voltage, and a low loss switching power supply using this capacitor can be provided.
    • 本发明提供了一种多层陶瓷电容器,其中电极金属层和电介质陶瓷层交替层叠,其介电常数峰值存在于低于-50℃的温度。多层陶瓷电容器是选自多层陶瓷电容器 被掺入电路中,其中将至少200V / mm的电场施加到电介质层作为DC偏置电场,并且以至少20kHz的频率的交流电叠加,并将多层陶瓷电容器叠加到 被并入到电介质层中施加至少200V / mm的电场作为AC电场的电路中。 作为电介质陶瓷,使用含有铅原子的陶瓷,该铅原子的量以PbO的形式测定,其为至少30mol%,特别是由ABO 3表示的具有钙钛矿结构的化合物。 因此,可以提供具有耐热性并且对于高直流偏压和高频电压是稳定的便宜的大容量多层电容器,以及使用该电容器的低损耗开关电源。
    • 69. 发明授权
    • Semiconductor device and method for fabricating the same
    • 半导体装置及其制造方法
    • US6147379A
    • 2000-11-14
    • US58803
    • 1998-04-13
    • Atsushi HoriJunichi KatoShinji OdanakaSeiki OguraKaori Akamatsu
    • Atsushi HoriJunichi KatoShinji OdanakaSeiki OguraKaori Akamatsu
    • H01L21/8247H01L27/115H01L29/788H01L29/792
    • H01L29/7885
    • The nonvolatile semiconductor memory device of the invention includes: a semiconductor substrate having a surface including a first surface region at a first level, a second surface region at a second level lower than the first level, and a step side region linking the first and second surface regions; a channel region formed in the first surface region of the semiconductor substrate; a source region and a drain region which are formed in the surface of the semiconductor substrate so as to interpose the channel region therebetween; a first insulating film formed on the surface of the semiconductor substrate; a floating gate formed on the first insulating film; and a control gate capacitively coupled to the floating gate via a second insulating film. The first surface region is an upper surface of an epitaxially grown layer formed on the second surface region. The drain region includes: a low-concentration impurity layer formed in the second surface region and having one end extending toward the step side region; and a high-concentration impurity layer connected to the low-concentration impurity layer and formed in a region distant from the channel region. An impurity concentration of the low-concentration impurity layer is lower than that of the high-concentration impurity layer. The floating gate covers the step side region and at least a part of the low-concentration impurity layer via the first insulating film.
    • 本发明的非易失性半导体存储器件包括:半导体衬底,具有包括第一电平的第一表面区域,低于第一电平的第二电平的第二表面区域和连接第一和第二电极的台阶侧区域的表面 表面区域 形成在所述半导体衬底的所述第一表面区域中的沟道区; 源极区域和漏极区域,其形成在半导体衬底的表面中,以便在其间插入沟道区域; 形成在所述半导体衬底的表面上的第一绝缘膜; 形成在第一绝缘膜上的浮栅; 以及经由第二绝缘膜电容耦合到浮置栅极的控制栅极。 第一表面区域是形成在第二表面区域上的外延生长层的上表面。 漏极区域包括:形成在第二表面区域中并且具有朝向台阶侧区域延伸的一端的低浓度杂质层; 以及连接到低浓度杂质层并形成在远离沟道区的区域中的高浓度杂质层。 低浓度杂质层的杂质浓度低于高浓度杂质层的杂质浓度。 浮置栅极经由第一绝缘膜覆盖台阶侧区域和至少一部分低浓度杂质层。