专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

61. 发明申请

US20080251494A1 Method for manufacturing circuit board 审中-公开
标题翻译：电路板制造方法
公开(公告)号：US20080251494A1
公开(公告)日：2008-10-16
申请号：US12078058
申请日：2008-03-26
申请人： Jung-Hyun Park , Byoung-Youl Min , Jeong-Woo Park , Jong-Gyu Choi , Ji-Eun Kim , Myung-Sam Kang
发明人： Jung-Hyun Park , Byoung-Youl Min , Jeong-Woo Park , Jong-Gyu Choi , Ji-Eun Kim , Myung-Sam Kang
IPC分类号： H01B13/00 , C25D5/34
CPC分类号： C25D7/123 , H05K3/0038 , H05K3/108 , H05K3/205 , H05K3/421 , H05K3/423 , H05K2201/0376 , H05K2201/0394 , H05K2201/09563 , H05K2203/108
摘要： A method of manufacturing a circuit board is disclosed. The method may include: forming a relievo pattern, which is in a corresponding relationship with a circuit pattern, on a metal layer that is stacked on a carrier; stacking and pressing the carrier onto an insulation layer with the relievo pattern facing the insulation layer; transcribing the metal layer and the relievo pattern into the insulation layer by removing the carrier; forming a via hole in the insulation layer on which the metal layer is transcribed; and filling the via hole and forming a plating layer over the metal layer by performing plating over the insulation layer on which the metal layer is transcribed. As the relievo pattern may be formed on the metal layer stacked on the carrier, and the relievo pattern may be transcribed into the insulation layer, high-density circuit patterns can be formed.
摘要翻译：公开了一种制造电路板的方法。该方法可以包括：在层叠在载体上的金属层上形成与电路图案对应关系的释放图案; 将载体堆叠并压制到绝缘层上，其中减震图案面向绝缘层; 通过移除载体将金属层和释放图案转印到绝缘层中; 在所述绝缘层上形成通孔，所述绝缘层中所述金属层被转录到所述绝缘层上; 并通过在其上转印有金属层的绝缘层上进行电镀来填充通孔并在金属层上形成镀层。由于可以在堆叠在载体上的金属层上形成缓和图案，并且可以将缓冲图案转录到绝缘层中，可以形成高密度电路图案。

62. 发明申请

US20080115355A1 Method of manufacturing printed circuit board 审中-公开
标题翻译：制造印刷电路板的方法
公开(公告)号：US20080115355A1
公开(公告)日：2008-05-22
申请号：US11984209
申请日：2007-11-14
申请人： Jung-Hyun Park , Byoung-Youl Min , Je-Gwang Yoo , Myung-Sam Kang
发明人： Jung-Hyun Park , Byoung-Youl Min , Je-Gwang Yoo , Myung-Sam Kang
IPC分类号： H05K3/10 , H01K3/10
CPC分类号： H05K3/421 , H05K1/115 , H05K3/205 , H05K2201/0394 , H05K2201/09545 , H05K2201/09563 , H05K2203/0353 , H05K2203/0542 , Y10T29/49128 , Y10T29/49155 , Y10T29/49165
摘要： A method of manufacturing a printed circuit board is disclosed. Using the method, which includes embedding a first circuit pattern and a second circuit pattern in one side and the other side of an insulation substrate, forming a via hole by removing portions of the insulation substrate and the first circuit pattern, and electrically connecting the first circuit pattern and the second circuit pattern by forming a plating layer in the via hole, it is possible to form high-density circuits, as circuitry may be formed in portions that might have been occupied by lands, and more circuitry may be implemented for a given area of insulation substrate, whereby a fine-patterned printed circuit board may be implemented that has a high degree of integration. Also, a printed circuit board can be produced which allows good signal transfers between layers and with which fine circuit patterns can be implemented with inexpensive costs.
摘要翻译：公开了一种制造印刷电路板的方法。使用该方法，其包括在绝缘基板的一侧和另一侧嵌入第一电路图案和第二电路图案，通过去除绝缘基板和第一电路图案的部分而形成通孔，并且将第一电路图案和第二电路图案，通过在通孔中形成镀层，可以形成高密度电路，因为电路可以形成为可能已经被焊盘占据的部分，并且可以实现更多的电路用于可以实现具有高度集成度的精细图案化印刷电路板。此外，可以制造印刷电路板，其可以在层之间进行良好的信号传输，并且可以以廉价的成本实现精细的电路图案。

63. 外观设计

USD567204S1 DVD recorder 有权
公开(公告)号：USD567204S1
公开(公告)日：2008-04-22
申请号：US29269996
申请日：2006-12-12
申请人： Jung-Hyun Park
设计人： Jung-Hyun Park

64. 发明申请

US20080009128A1 Buried pattern substrate and manufacturing method thereof 审中-公开
标题翻译：埋地图案基板及其制造方法
公开(公告)号：US20080009128A1
公开(公告)日：2008-01-10
申请号：US11708339
申请日：2007-02-21
申请人： Shuhichi Okabe , Myung-Sam Kang , Jung-Hyun Park , Hoe-Ku Jung , Ji-Eun Kim
发明人： Shuhichi Okabe , Myung-Sam Kang , Jung-Hyun Park , Hoe-Ku Jung , Ji-Eun Kim
IPC分类号： H01L21/44
CPC分类号： H05K3/205 , H05K3/4038 , H05K3/4617 , H05K2203/0733 , H05K2203/1572
摘要： A buried pattern substrate and a manufacturing method thereof are disclosed. A method of manufacturing a buried pattern substrate having a circuit pattern formed on a surface, in which the circuit pattern is connected electrically by a stud bump, includes (a) forming the circuit pattern and the stud bump by depositing a plating layer selectively on a seed layer of a carrier film, where the seed layer is laminated on a surface of the carrier film, (b) laminating and pressing the carrier film on an insulation layer such that the circuit pattern and the stud bump face the insulation layer, and (c) removing the carrier film and the seed layer, allows the circuit interconnection to be realized using a copper (Cu) stud bump, so that a drilling process for interconnection is unnecessary, the degree of freedom for circuit design is improved, a via land is made unnecessary and the size of a via is small, to allow higher density in a circuit.
摘要翻译：公开了掩埋图案基板及其制造方法。一种制造埋设图形衬底的方法，其中电路图案形成在电路图形通过柱形凸块电连接的表面上，包括：（a）通过在晶种层层叠在载体膜的表面上的载体膜的种子层，（b）在绝缘层上层叠压制载体膜，使得电路图案和柱状凸块面向绝缘层，和 c）去除载体膜和种子层，允许使用铜（Cu）柱状凸块实现电路互连，使得不需要用于互连的钻孔工艺，提高了电路设计的自由度，通孔焊盘不必要，并且通孔的尺寸小，以允许电路中的较高密度。

65. 发明申请

US20070059918A1 Rigid-flexible printed circuit board for package on package and manufacturing method 审中-公开
标题翻译：刚性柔性印刷电路板封装及制造方法
公开(公告)号：US20070059918A1
公开(公告)日：2007-03-15
申请号：US11520730
申请日：2006-09-14
申请人： Hoe-Ku Jung , Myung-Sam Kang , Jung-Hyun Park
发明人： Hoe-Ku Jung , Myung-Sam Kang , Jung-Hyun Park
IPC分类号： H01L21/4763
CPC分类号： H05K3/4691 , H01L24/73 , H01L25/105 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H05K1/183 , H05K1/189 , H05K3/4623 , H05K2201/056 , H05K2201/09536 , H05K2201/10515 , H05K2203/049 , H05K2203/063 , Y10T29/49124 , H01L2924/00012 , H01L2924/00014 , H01L2924/00
摘要： The present invention relates to a rigid-flexible multi-layer printed circuit board comprising: a flexible substrate of which circuits are formed on both sides and which is bendable; a rigid substrate which is laminated on the flexible substrate and circuits are formed on both sides and a cavity within which a semiconductor chip is mounted is formed; and a bonding sheet adhering the flexible substrate and the rigid substrate and having a insulating property. According the present invention, when the same numbers of the semiconductor chips are mounted or the POP is embodied, the whole thickness of the package can be lower. Also, two more semiconductor chips can be mounted using the space as the thickness of the core layer, and the structure impossible when the number of semiconductor chip mounted on the bottom substrate becomes two from one in conventional technology can be embodied.
摘要翻译：硬质柔性多层印刷电路板技术领域本发明涉及一种柔性多层印刷电路板，包括：柔性基板，其两侧形成有可弯曲的电路; 层叠在柔性基板上的刚性基板和电路形成在两侧，并且形成有安装半导体芯片的空腔; 以及粘合柔性基板和刚性基板并具有绝缘性的粘合片。根据本发明，当安装相同数量的半导体芯片或实施POP时，封装的整体厚度可以较低。此外，可以使用空间作为芯层的厚度来安装另外两个半导体芯片，并且可以实现当传统技术中安装在底部基板上的半导体芯片的数量变为二倍时的结构不可行。

66. 外观设计

USD533157S1 Set top box 有权
公开(公告)号：USD533157S1
公开(公告)日：2006-12-05
申请号：US29241752
申请日：2005-10-31
申请人： Jung-Hyun Park
设计人： Jung-Hyun Park

67. 外观设计

USD529885S1 DVD recorder 有权
公开(公告)号：USD529885S1
公开(公告)日：2006-10-10
申请号：US29237120
申请日：2005-08-26
申请人： Jung-Hyun Park , Jin-Wook Kim
设计人： Jung-Hyun Park , Jin-Wook Kim

68. 发明授权

US08889994B2 Single-layered printed circuit board and manufacturing method thereof 有权
标题翻译：单层印刷电路板及其制造方法
公开(公告)号：US08889994B2
公开(公告)日：2014-11-18
申请号：US13018971
申请日：2011-02-01
申请人： Young-Ji Kim , Kyung-Ro Yoon , Sang-Duck Kim , Jung-Hyun Park , Nam-Keun Oh , Jong-Gyu Choi , Ji-Eun Kim
发明人： Young-Ji Kim , Kyung-Ro Yoon , Sang-Duck Kim , Jung-Hyun Park , Nam-Keun Oh , Jong-Gyu Choi , Ji-Eun Kim
IPC分类号： H05K1/16
CPC分类号： H05K1/11 , H05K3/06 , Y10T29/49144 , Y10T29/49156
摘要： A single layered printed circuit board and a method of manufacturing the same are disclosed. In accordance with an embodiment of the present invention, the method can include forming a bonding pad, a circuit pattern and a post on a surface of an insulation film, in which one end part of the post is electrically connected to at least a portion of the circuit pattern, pressing an insulator on the surface of the insulation film, in which the circuit pattern and the post are buried in the insulator, selectively etching the insulator such that the other end part of the post is exposed, and opening a portion of the insulation film such that at least a portion of the bonding pad is exposed.
摘要翻译：公开了一种单层印刷电路板及其制造方法。根据本发明的实施例，该方法可以包括在绝缘膜的表面上形成焊盘，电路图案和柱，其中柱的一个端部电连接到绝缘膜的至少一部分电路图案，将电路图案和柱埋在绝缘体中的绝缘膜表面上的绝缘体按压绝缘体，选择性地蚀刻绝缘体，使得柱的另一端暴露，并且打开一部分所述绝缘膜使得所述焊盘的至少一部分露出。

69. 发明申请

US20130302611A1 ORDERED MESOPOROUS CARBON-CARBON NANOTUBE NANOCOMPOSITES AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：订购的多孔碳纳米管纳米复合材料及其制造方法
公开(公告)号：US20130302611A1
公开(公告)日：2013-11-14
申请号：US13530270
申请日：2012-06-22
申请人： Sang-Hoon Joo , Jae-Yeong Cheon , Jae-Deuk Kim , Jung-Hyun Park
发明人： Sang-Hoon Joo , Jae-Yeong Cheon , Jae-Deuk Kim , Jung-Hyun Park
IPC分类号： H01B1/04 , B82Y40/00 , B82Y30/00
CPC分类号： B82Y30/00 , B82Y40/00 , C01B32/00 , C01P2002/72 , C01P2006/12 , Y10T428/2982
摘要： Disclosed are ordered mesoporous carbon-carbon nanotube nanocomposites and a method for manufacturing the same. The method for manufacturing ordered carbon-carbon nanotube nanocomposites according to the present invention includes: forming a mixture of a carbon precursor and ordered mesoporous silica; carbonizing the mixture to form a ordered mesoporous silica-carbon composite; and removing the mesoporous silica from the ordered mesoporous silica-carbon composite.
摘要翻译：公开了有序介孔碳 - 碳纳米管纳米复合材料及其制造方法。根据本发明的制备有序碳 - 碳纳米管纳米复合材料的方法包括：形成碳前体和有序介孔二氧化硅的混合物; 将混合物碳化以形成有序介孔二氧化硅 - 碳复合材料; 并从有序介孔二氧化硅 - 碳复合材料中除去介孔二氧化硅。

70. 发明授权

US08431462B2 Methods of manufacturing semiconductor devices 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08431462B2
公开(公告)日：2013-04-30
申请号：US13183630
申请日：2011-07-15
申请人： Kwan-Heum Lee , Soon-Wook Jung , Jung-Hyun Park , Wook-Je Kim , Jong-Sang Ban
发明人： Kwan-Heum Lee , Soon-Wook Jung , Jung-Hyun Park , Wook-Je Kim , Jong-Sang Ban
IPC分类号： H01L21/337 , H01L21/8238 , H01L21/336 , H01L27/12
CPC分类号： H01L21/823814 , H01L21/823864 , H01L29/7848
摘要： A method of manufacturing a semiconductor device includes forming a gate structure on a substrate; forming a sacrificial spacer may be formed on a sidewall of the gate substrate; implanting first impurities into portions of the substrate by a first ion implantation process using the gate structure and the sacrificial spacer as ion implantation masks to form source and drain regions; removing the sacrificial spacer; and implanting second impurities and carbon atoms into portions of the substrate by a second ion implantation process using the gate structure as an ion implantation mask to form source and drain extension regions and carbon doping regions, respectively.
摘要翻译：一种制造半导体器件的方法包括在衬底上形成栅极结构; 形成牺牲隔离物可以形成在栅极衬底的侧壁上; 通过使用栅极结构和牺牲隔离物作为离子注入掩模的第一离子注入工艺将第一杂质注入到衬底的部分中以形成源区和漏区; 去除牺牲隔离物; 以及通过使用所述栅极结构作为离子注入掩模的第二离子注入工艺将第二杂质和碳原子注入到所述衬底的部分中，以分别形成源极和漏极延伸区域和碳掺杂区域。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式