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61. 发明申请

US20120098062A1 HYBRID ACTIVE-FIELD GAP EXTENDED DRAIN MOS TRANSISTOR 有权
标题翻译：混合有源场扩展漏磁MOS晶体管
公开(公告)号：US20120098062A1
公开(公告)日：2012-04-26
申请号：US13281260
申请日：2011-10-25
申请人： Sameer P. Pendharkar , John Lin
发明人： Sameer P. Pendharkar , John Lin
IPC分类号： H01L27/088 , H01L21/336
CPC分类号： H01L29/66681 , H01L29/0653 , H01L29/0696 , H01L29/0882 , H01L29/402 , H01L29/41758 , H01L29/4238 , H01L29/7816
摘要： An integrated circuit includes an extended drain MOS transistor with parallel alternating active gap drift regions and field gap drift regions. The extended drain MOS transistor includes a gate having field plates over the field gap drift regions. The extended drain MOS transistor may be formed in a symmetric nested configuration. A process for forming an integrated circuit containing an extended drain MOS transistor provides parallel alternating active gap drift regions and field gap drift regions with a gate having field plates over the field gap drift regions.
摘要翻译：集成电路包括具有并行交替有源间隙漂移区和场间隙漂移区的扩展漏极MOS晶体管。扩展漏极MOS晶体管包括在场间隙漂移区域上具有场板的栅极。扩展漏极MOS晶体管可以形成为对称嵌套配置。用于形成包含延伸漏极MOS晶体管的集成电路的工艺提供并行的交替有源间隙漂移区域和场间隙漂移区域，栅极在场间隙漂移区域上具有场板。

62. 发明申请

US20110275210A1 METHOD OF MAKING VERTICAL TRANSISTOR WITH GRADED FIELD PLATE DIELECTRIC 有权
标题翻译：制造具有等级场板电介质的垂直晶体管的方法
公开(公告)号：US20110275210A1
公开(公告)日：2011-11-10
申请号：US13188162
申请日：2011-07-21
申请人： Marie Denison , Sameer Pendharkar , Philip L. Hower , John Lin
发明人： Marie Denison , Sameer Pendharkar , Philip L. Hower , John Lin
IPC分类号： H01L21/28
CPC分类号： H01L29/7813 , H01L29/42368 , H01L29/66719 , H01L29/66734
摘要： An electronic device has a plurality of trenches formed in a semiconductor layer. A vertical drift region is located between and adjacent the trenches. An electrode is located within each trench, the electrode having a gate electrode section and a field plate section. A graded field plate dielectric having increased thickness at greater depth is located between the field plate section and the vertical drift region.
摘要翻译：电子器件具有形成在半导体层中的多个沟槽。垂直漂移区域位于沟槽之间和相邻的沟槽之间。电极位于每个沟槽内，电极具有栅电极部分和场板部分。在场板部分和垂直漂移区域之间设置具有较大深度的厚度增加的分级场板电介质。

63. 再颁专利

USRE42498E1 Wide image scanner 失效
标题翻译：宽幅图像扫描仪
公开(公告)号：USRE42498E1
公开(公告)日：2011-06-28
申请号：US11256619
申请日：2005-10-21
申请人： Ming-Chung Tang , John Lin
发明人： Ming-Chung Tang , John Lin
IPC分类号： H04N1/04
CPC分类号： H04N1/00681 , H04N1/00702 , H04N1/0071 , H04N1/00713 , H04N1/00734 , H04N1/0074 , H04N1/00748 , H04N1/00755 , H04N1/00774 , H04N1/0402 , H04N1/0405 , H04N1/0443 , H04N1/0455 , H04N1/121 , H04N1/128 , H04N1/1911 , H04N2201/04755 , H04N2201/04789
摘要： A wide image scanner which can scan the image of a large scale original using only a regular image sensor is provided. The invention includes a sliding shaft, an image reading device, a number of paper width sensors, a paper edge sensor, and a control module. Whenever the paper edge sensor detects the presence of an end edge of the original, it will send a vertical control signal to the control module to control the rotation direction of the rollers. On the other hand, the paper width sensors detect the width of the original and send the horizontal control signals to the control module. From the horizontal control signals, the control module can determine the number of horizontal displacement positions and control the horizontal displacement each time for the image reading device after the paper edge sensor detects the end edge of the original. The procedure continues until the image reading device has been moved to the final displacement position predetermined by the horizontal control signal. Consequently, the entire image of the origin can automatically be read portion by portion without manual operation.
摘要翻译：提供了可以仅使用常规图像传感器来扫描大尺寸原稿的图像的宽幅图像扫描仪。本发明包括滑动轴，图像读取装置，多个纸张宽度传感器，纸张边缘传感器和控制模块。每当纸张边缘传感器检测到原稿的端部边缘时，它将向控制模块发送垂直控制信号，以控制滚轮的旋转方向。另一方面，纸张宽度传感器检测原稿的宽度，并将水平控制信号发送到控制模块。从水平控制信号，控制模块可以确定水平位移位置的数量，并且在纸张边缘传感器检测到原稿的端边缘之后，每次对图像读取装置控制水平位移。该过程继续，直到图像读取装置已经移动到由水平控制信号预定的最终位移位置。因此，原点的整个图像可以自动地逐个读取，而无需手动操作。

64. 发明授权

US07953057B2 Packetized audio data operations in a wireless local area network device 有权
标题翻译：无线局域网设备中的分组化音频数据操作
公开(公告)号：US07953057B2
公开(公告)日：2011-05-31
申请号：US12704439
申请日：2010-02-11
申请人： Sherman Lee , Vivian Chou , Charles Aragones , John Lin
发明人： Sherman Lee , Vivian Chou , Charles Aragones , John Lin
IPC分类号： H04W40/00
CPC分类号： H04W88/06 , H04W28/14 , H04W84/12
摘要： A wireless local area network (WLAN) transceiving integrated circuit includes a WLAN interface, an input buffer, an input buffer controller, and a processor. The WLAN transceiving integrated circuit may also include an output buffer, an output buffer controller, a transcoder, and/or an audio Coder-Decoder (CODEC). The WLAN transceiving integrated circuit is installed in a WLAN device that services voice communications. The input buffer receives packetized audio data from the WLAN interface. When the input buffer satisfies a buffer vacancy threshold, the processor and the input buffer controller cooperatively operate to fill at least a portion of the input buffer with packetized audio data. The processor copies packetized audio data from the input buffer and fills the input buffer with the copied packetized audio data to maintain an audio pattern in the input buffer. The input buffer controller fills the input buffer when the processor is available and after copying/filling is no longer effective. The processor operates to maintain the audio pattern when additional packetized audio data is received by the WLAN interface. These operations are also performed for the output buffer, which receives packetized audio data from the transcoder and writes the packetized audio data to the WLAN interface.
摘要翻译：无线局域网（WLAN）收发集成电路包括WLAN接口，输入缓冲器，输入缓冲器控制器和处理器。 WLAN收发集成电路还可以包括输出缓冲器，输出缓冲器控制器，代码转换器和/或音频编解码器（CODEC）。 WLAN收发集成电路安装在服务语音通信的WLAN设备中。输入缓冲区从WLAN接口接收分组化音频数据。当输入缓冲器满足缓冲空缺阈值时，处理器和输入缓冲器控制器协同工作，以便用分组化音频数据填充输入缓冲器的至少一部分。处理器从输入缓冲器复制分组化的音频数据，并用复制的分组化音频数据填充输入缓冲器，以保持输入缓冲器中的音频模式。当处理器可用并且复制/填充不再有效之后，输入缓冲器控制器填充输入缓冲器。当附加的分组化音频数据被WLAN接口接收时，处理器操作以维持音频模式。这些操作也对输出缓冲器执行，输出缓冲器从代码转换器接收打包的音频数据，并将打包的音频数据写入WLAN接口。

65. 发明授权

US07846789B2 Isolation trench with rounded corners for BiCMOS process 有权
标题翻译：用于BiCMOS工艺的带圆角的隔离槽
公开(公告)号：US07846789B2
公开(公告)日：2010-12-07
申请号：US11873205
申请日：2007-10-16
申请人： Sameer P. Pendharkar , John Lin , Philip L. Hower , Steven L. Merchant
发明人： Sameer P. Pendharkar , John Lin , Philip L. Hower , Steven L. Merchant
IPC分类号： H01L21/8238
CPC分类号： H01L21/8249 , H01L21/76232 , H01L27/0623
摘要： A semiconductor device comprising a first transistor device on or in a semiconductor substrate and a second transistor device on or in the substrate. The device further comprises an insulating trench located between the first transistor device and the second transistor device. At least one upper corner of the insulating trench is a rounded corner in a lateral plane of the substrate.
摘要翻译：一种半导体器件，包括半导体衬底上或半导体衬底中的第一晶体管器件和衬底上或衬底中的第二晶体管器件。该器件还包括位于第一晶体管器件和第二晶体管器件之间的绝缘沟槽。绝缘沟槽的至少一个上角是衬底的横向平面中的圆角。

66. 发明授权

US07756100B2 Scalable synchronous packet transmit scheduler 失效
标题翻译：可扩展同步分组传输调度器
公开(公告)号：US07756100B2
公开(公告)日：2010-07-13
申请号：US11612468
申请日：2006-12-18
申请人： John Lin , Paris Chen
发明人： John Lin , Paris Chen
IPC分类号： H04B7/212
CPC分类号： H04W72/1242
摘要： A baseband controller system creates and maintains a schedule of synchronized events and reviews the schedule as a part of determining whether to initiate a transmission of a non-synchronous event (one that is not time sensitive, for example, e-mail). One aspect of the present invention is to create a system and method that avoids a possibility of collision between synchronized and non-synchronized communication events. A synchronized event is a scheduled transmission of time sensitive data such as what is often known as continuous bit rate data. Examples include video and voice wherein a collision (inability to transmit the continuous bit rate data) may result in degradation of signal quality at the receiving end. The inventive system and method evaluate the schedule of synchronized events in relation to the present time and determine whether a non-synchronized event may be transmitted without the likelihood of a collision. Making the determination that such a transmission may occur includes evaluating future time periods to see if a synchronized event is scheduled during a time period in which the non-synchronized event would continue to be transmitted for those non-synchronized events that span two or more defined time periods in length.
摘要翻译：基带控制器系统创建并维护同步事件的调度并且将该调度作为确定是否发起非同步事件（不是时间敏感的事件（例如，电子邮件））的一部分来审查。本发明的一个方面是创建一种避免同步和非同步通信事件之间的冲突的可能性的系统和方法。同步事件是时间敏感数据的预定传输，例如通常称为连续比特率数据。其中碰撞（不能发送连续比特率数据）的视频和语音可能导致接收端的信号质量下降。本发明的系统和方法评估与当前时间相关的同步事件的调度，并且确定是否可以在没有碰撞的可能性的情况下发送非同步事件。确定可能发生这种传输包括评估未来时间段以查看是否在在跨越两个或更多个定义的那些非同步事件的情况下继续发送非同步事件的时间段期间调度同步事件时间长度。

67. 发明授权

US07696049B2 Method to manufacture LDMOS transistors with improved threshold voltage control 有权
标题翻译：用改进的阈值电压控制制造LDMOS晶体管的方法
公开(公告)号：US07696049B2
公开(公告)日：2010-04-13
申请号：US11552198
申请日：2006-10-24
申请人： Binghua Hu , Howard S. Lee , Henry L. Edwards , John Lin , Vladimir N. Bolkhovsky
发明人： Binghua Hu , Howard S. Lee , Henry L. Edwards , John Lin , Vladimir N. Bolkhovsky
IPC分类号： H01L21/00
CPC分类号： H01L21/266 , H01L21/2652 , H01L29/1095 , H01L29/42368 , H01L29/66681 , H01L29/7816
摘要： A double diffused region (65), (75), (85) is formed in a semiconductor substrate or in an epitaxial layer (20) formed on the semiconductor substrate. The double diffused region is formed by first implanting light implant specie such as boron through an opening in a photoresist layer prior to a hard bake process. Subsequent to the hard bake process, a heavy implant species such as arsenic is implanted into the epitaxial layer. During subsequent processing, such as during LOCOS formation, a double diffused region is formed by a thermal anneal. A dielectric layer (120) is formed on the epitaxial layer (20) and gate structures (130), (135) are formed over the dielectric layer (120).
摘要翻译：在半导体衬底或形成在半导体衬底上的外延层（20）中形成双扩散区域（65），（75），（85）。通过在硬烘烤过程之前首先将诸如硼的光注入物质在光致抗蚀剂层中的开口注入，形成双扩散区域。在硬烘烤过程之后，将诸如砷的重注入物质注入到外延层中。在后续处理中，例如在LOCOS形成期间，通过热退火形成双扩散区域。在外延层（20）上形成介电层（120），并且在电介质层（120）之上形成栅极结构（130），（135）。

68. 发明授权

US07684377B2 Packetized audio data operations in a wireless local area network device 有权
标题翻译：无线局域网设备中的分组化音频数据操作
公开(公告)号：US07684377B2
公开(公告)日：2010-03-23
申请号：US12174629
申请日：2008-07-16
申请人： Sherman Lee , Vivian Chou , Charles Aragones , John Lin
发明人： Sherman Lee , Vivian Chou , Charles Aragones , John Lin
IPC分类号： H04Q7/24
CPC分类号： H04W88/06 , H04W28/14 , H04W84/12
摘要： A wireless local area network (WLAN) transceiving integrated circuit includes a WLAN interface, an input buffer, an input buffer controller, and a processor. The WLAN transceiving integrated circuit may also include an output buffer, an output buffer controller, a transcoder, and/or an audio Coder-Decoder (CODEC). The WLAN transceiving integrated circuit is installed in a WLAN device that services voice communications. The input buffer receives packetized audio data from the WLAN interface. When the input buffer satisfies a buffer vacancy threshold, the processor and the input buffer controller cooperatively operate to fill at least a portion of the input buffer with packetized audio data. The processor copies packetized audio data from the input buffer and fills the input buffer with the copied packetized audio data to maintain an audio pattern in the input buffer. The input buffer controller fills the input buffer when the processor is available and after copying/filling is no longer effective. The processor operates to maintain the audio pattern when additional packetized audio data is received by the WLAN interface. These operations are also performed for the output buffer, which receives packetized audio data from the transcoder and writes the packetized audio data to the WLAN interface.
摘要翻译：无线局域网（WLAN）收发集成电路包括WLAN接口，输入缓冲器，输入缓冲器控制器和处理器。 WLAN收发集成电路还可以包括输出缓冲器，输出缓冲器控制器，代码转换器和/或音频编解码器（CODEC）。 WLAN收发集成电路安装在服务语音通信的WLAN设备中。输入缓冲区从WLAN接口接收分组化音频数据。当输入缓冲器满足缓冲空缺阈值时，处理器和输入缓冲器控制器协同工作，以便用分组化音频数据填充输入缓冲器的至少一部分。处理器从输入缓冲器复制分组化的音频数据，并用复制的分组化音频数据填充输入缓冲器，以保持输入缓冲器中的音频模式。当处理器可用并且复制/填充不再有效之后，输入缓冲器控制器填充输入缓冲器。当附加的分组化音频数据被WLAN接口接收时，处理器操作以维持音频模式。这些操作也对输出缓冲器执行，输出缓冲器从代码转换器接收打包的音频数据，并将打包的音频数据写入WLAN接口。

69. 发明申请

US20090159968A1 BVDII Enhancement with a Cascode DMOS 审中-公开
标题翻译： BVDII增强与Cascode DMOS
公开(公告)号：US20090159968A1
公开(公告)日：2009-06-25
申请号：US11960432
申请日：2007-12-19
申请人： Steve L. Merchant , John Lin , Sameer Pendharkar , Philip L. Hower
发明人： Steve L. Merchant , John Lin , Sameer Pendharkar , Philip L. Hower
IPC分类号： H01L27/088 , H01L21/8234
CPC分类号： H01L21/823481 , H01L21/823425 , H01L21/823456 , H01L21/823462 , H01L29/0653 , H01L29/42368 , H01L29/66659 , H01L29/7833 , H01L29/7835
摘要： Double diffused MOS (DMOS) transistors feature extended drain regions to provide depletion regions which drop high drain voltages to lower voltages at the gate edges. DMOS transistors exhibit lower drain breakdown potential in the on-state than in the off-state than in the off-state due to snapback by a parasitic bipolar transistor that exists in parallel with the DMOS transistor. The instant invention is a cascoded DMOS transistor in an integrated circuit incorporating an NMOS transistor on the DMOS source node to reverse bias the parasitic emitter-base junction during on-state operation, eliminating snapback. The NMOS transistor may be integrated with the DMOS transistor by connections in the interconnect system of the integrated circuit, or the NMOS transistor and DMOS transistor may be fabricated in a common p-type well and integrated in the IC substrate. Methods of fabricating an integrated circuit with the incentive cascoded DMOS transistor are also disclosed.
摘要翻译：双扩散MOS（DMOS）晶体管具有扩展的漏极区域，以提供耗尽区域，其将高漏极电压降低到栅极边缘处的较低电压。由于与DMOS晶体管并联存在的寄生双极晶体管的回跳，DMOS晶体管在导通状态下的漏极击穿电位低于截止状态下的漏极击穿电位。本发明是在DMOS源节点上结合有NMOS晶体管的集成电路中的级联DMOS晶体管，以在接通状态操作期间反向偏置寄生发射极 - 基极结，从而消除了快速恢复。 NMOS晶体管可以通过集成电路的互连系统中的连接与DMOS晶体管集成，或者NMOS晶体管和DMOS晶体管可以制造在共同的p型阱中并集成在IC衬底中。还公开了使用激励级联DMOS晶体管制造集成电路的方法。

70. 发明申请

US20090096033A1 ISOLATION TRENCH WITH ROUNDED CORNERS FOR BiCMOS PROCESS 有权
标题翻译：用于BiCMOS工艺的带圆角的隔离开关
公开(公告)号：US20090096033A1
公开(公告)日：2009-04-16
申请号：US11873205
申请日：2007-10-16
申请人： Sameer P. Pendharkar , John Lin , Philip Hower , Steven L. Merchant
发明人： Sameer P. Pendharkar , John Lin , Philip Hower , Steven L. Merchant
IPC分类号： H01L29/94 , H01L21/8238
CPC分类号： H01L21/8249 , H01L21/76232 , H01L27/0623
摘要： A semiconductor device comprising a first transistor device on or in a semiconductor substrate and a second transistor device on or in the substrate. The device further comprises an insulating trench located between the first transistor device and the second transistor device. At least one upper corner of the insulating trench is a rounded corner in a lateral plane of the substrate.
摘要翻译：一种半导体器件，包括半导体衬底上或半导体衬底中的第一晶体管器件和衬底上或衬底中的第二晶体管器件。该器件还包括位于第一晶体管器件和第二晶体管器件之间的绝缘沟槽。绝缘沟槽的至少一个上角是衬底的横向平面中的圆角。

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