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61. 发明授权

US08650338B2 Fencing direct memory access data transfers in a parallel active messaging interface of a parallel computer 失效
标题翻译：在并行计算机的并行活动消息接口中，屏蔽直接存储器访问数据传输
公开(公告)号：US08650338B2
公开(公告)日：2014-02-11
申请号：US13784198
申请日：2013-03-04
申请人： International Business Machines Corporation
发明人： Michael A. Blocksome , Amith R. Mamidala
IPC分类号： G06F13/28 , G06F15/00 , G06F7/38
CPC分类号： G06F13/28
摘要： Fencing direct memory access (‘DMA’) data transfers in a parallel active messaging interface (‘PAMI’) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segment of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.
摘要翻译：在并行计算机的并行活动消息接口（“PAMI”）中的屏蔽直接存储器访问（“DMA”）数据传输，PAMI包括数据通信端点，每个端点包括客户端的规范，上下文和任务，通过PAMI和通过可操作地耦合到共享随机存取存储器的段的DMA控制器耦合的端点，DMA控制器通过该共享随机存取存储器确定性地传送数据通信，包括通过PAMI发起执行有序DMA指令的有序DMA指令，用于DMA数据传输两个端点，通过DMA控制器和一段共享存储器实现确定性DMA数据传输; 并且通过PAMI执行无FENCE计算DMA数据传输的有效FENCE指令，FENCE指令只有在完成在执行FENCE指令之前启动的所有DMA指令以完成执行，以在两个端点之间进行DMA数据传输。

62. 发明授权

US08452845B2 Effecting hardware acceleration of broadcast operations in a parallel computer 有权
标题翻译：影响并行计算机中广播操作的硬件加速
公开(公告)号：US08452845B2
公开(公告)日：2013-05-28
申请号：US13682439
申请日：2012-11-20
申请人： International Business Machines Corporation
发明人： Charles J. Archer , Michael A. Blocksome , Joseph D. Ratterman , Brian E. Smith
IPC分类号： G06F15/167
CPC分类号： G06F15/17318
摘要： Compute nodes of a parallel computer organized for collective operations via a network, each compute node having a receive buffer and establishing a topology for the network; selecting a schedule for a broadcast operation; depositing, by a root node of the topology, broadcast data in a target node's receive buffer, including performing a DMA operation with a well-known memory location for the target node's receive buffer; depositing, by the root node in a memory region designated for storing broadcast data length, a length of the broadcast data, including performing a DMA operation with a well-known memory location of the broadcast data length memory region; and triggering, by the root node, the target node to perform a next DMA operation, including depositing, in a memory region designated for receiving injection instructions for the target node, an instruction to inject the broadcast data into the receive buffer of a subsequent target node.
摘要翻译：计算经由网络组织用于集体操作的并行计算机的节点，每个计算节点具有接收缓冲器并为网络建立拓扑; 选择广播操作的时间表; 通过拓扑的根节点存储在目标节点的接收缓冲器中的广播数据，包括用目标节点的接收缓冲器的公知存储器位置执行DMA操作; 通过根节点在指定用于存储广播数据长度的存储器区域中存储广播数据的长度，包括利用广播数据长度存储区域的公知存储器位置执行DMA操作; 并且由根节点触发目标节点执行下一个DMA操作，包括在指定用于接收目标节点的注入指令的存储器区域中存储将广播数据注入到后续目标的接收缓冲器中的指令节点。

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