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61. 发明授权

US06495054B1 Etching method and cleaning method of chemical vapor growth apparatus 失效
公开(公告)号：US06495054B1
公开(公告)日：2002-12-17
申请号：US09429074
申请日：1999-10-29
申请人： Kazuhiro Eguchi , Katsuya Okumura , Masahiro Kiyotoshi , Katsuhiko Hieda , Soichi Yamazaki
发明人： Kazuhiro Eguchi , Katsuya Okumura , Masahiro Kiyotoshi , Katsuhiko Hieda , Soichi Yamazaki
IPC分类号： C03C1500
CPC分类号： C23C16/4405
摘要： Presented is an etching method capable of easily etching an oxide containing an alkaline-earth metal. One method is to etch the oxide by using an etching gas containing a halogen gas except for fluorine, an interhalogen compound consisting of only a halogen element except for fluorine, or a halogen hydride consisting of a halogen element except for fluorine and hydrogen. Particularly chlorides, bromides, and iodides of alkaline-earth metals have relatively high vapor pressures, so a thin film containing an alkaline-earth metal can be etched by using chlorine gas, bromine gas, or iodine gas. When a halogen gas containing fluorine is used, damages to SiO2 portions used in a film formation apparatus are prevented by coating these SiO2 portions with a fluoride of an alkaline-earth metal.

62. 发明授权

US08581330B2 Semiconductor memory device and method for manufacturing the same 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US08581330B2
公开(公告)日：2013-11-12
申请号：US13326972
申请日：2011-12-15
申请人： Masahiro Kiyotoshi
发明人： Masahiro Kiyotoshi
IPC分类号： H01L29/792
CPC分类号： H01L29/7926 , H01L27/11582
摘要： According to one embodiment, a semiconductor memory device includes a stacked body, a semiconductor pillar, and a plurality of memory cells. The stacked body includes a plurality of stacked gate electrodes and inter-electrode insulating layers provided between the gate electrodes. The semiconductor pillar punches through the stacked body. The plurality of memory cells is provided in stacking direction. The memory cell includes a charge trap layer provided between the semiconductor pillar and the gate electrode via an air gap. The block insulating layer is provided between the charge trap layer and the gate electrode. Each of the plurality of memory cells is provided with a support portion configured to keep air gap distance between the charge trap layer and the semiconductor pillar.
摘要翻译：根据一个实施例，半导体存储器件包括堆叠体，半导体柱和多个存储单元。层叠体包括设置在栅电极之间的多个层叠栅电极和电极间绝缘层。半导体柱穿过堆叠体。多个存储单元沿层叠方向设置。存储单元包括通过气隙设置在半导体柱和栅电极之间的电荷陷阱层。块绝缘层设置在电荷陷阱层和栅电极之间。多个存储单元中的每一个设置有被配置为保持电荷陷阱层和半导体柱之间的气隙距离的支撑部分。

63. 发明申请

US20130175490A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20130175490A1
公开(公告)日：2013-07-11
申请号：US13547645
申请日：2012-07-12
申请人： Haruka KUSAI , Kiwamu Sakuma , Shosuke Fujii , Masumi Saitoh , Masahiro Kiyotoshi
发明人： Haruka KUSAI , Kiwamu Sakuma , Shosuke Fujii , Masumi Saitoh , Masahiro Kiyotoshi
IPC分类号： H01L27/088 , H01L27/24 , H01L21/3205 , H01L21/768 , H01L21/265 , H01L21/02
CPC分类号： H01L27/088 , G11C16/04 , G11C16/10 , H01L21/02367 , H01L21/265 , H01L21/32051 , H01L21/76877 , H01L27/11519 , H01L27/11524 , H01L27/11551 , H01L27/11565 , H01L27/1157 , H01L27/11578 , H01L27/24 , H01L29/66825 , H01L29/66833 , H01L29/685 , H01L29/788 , H01L29/792 , H01L29/82
摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a fin-type stacked layer structure having memory cells, and a beam connected to an end portion of the structure. Each of the structure and the beam includes semiconductor layers stacked in a perpendicular direction. The beam includes a contact portion provided at one end of the beam, and a low resistance portion provided between the contact portion and the end portion of the structure.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括具有存储单元的鳍式堆叠层结构和连接到该结构的端部的光束。结构和梁中的每一个包括沿垂直方向堆叠的半导体层。梁包括设置在梁的一端的接触部分和设置在接触部分和结构的端部之间的低电阻部分。

64. 发明授权

US08119020B2 Method for manufacturing electronic device 有权
标题翻译：电子设备制造方法
公开(公告)号：US08119020B2
公开(公告)日：2012-02-21
申请号：US11826922
申请日：2007-07-19
申请人： Shoko Ito , Makiko Katano , Atsuko Kawasaki , Masahiro Kiyotoshi
发明人： Shoko Ito , Makiko Katano , Atsuko Kawasaki , Masahiro Kiyotoshi
IPC分类号： B44C1/22
CPC分类号： H01L21/67393 , H01L21/67253 , H01L21/76224 , H01L27/115 , H01L27/11521 , Y10S414/135
摘要： A method for manufacturing an electronic device using a closed-type transport container, includes: controlling relative humidity inside the closed-type transport container to be lower than ambient relative humidity outside the closed-type transport container on a particular interprocess transport path in which an intermediate product stored in the closed-type transport container is transported from a first manufacturing process to a second manufacturing process. The first manufacturing process allows basic compounds containing nitrogen atoms to be released from the intermediate product. The second manufacturing process is susceptible to degradation due to contamination by the basic compounds.
摘要翻译：一种使用封闭式输送容器的电子装置的制造方法，其特征在于，包括：在所述封闭式输送容器内部的相对湿度比所述封闭式输送容器外的环境相对湿度低的特定过程输送路径，存储在封闭式运输容器中的中间产品从第一制造过程运输到第二制造过程。第一制造方法允许含有氮原子的碱性化合物从中间产物中释放出来。第二制造过程由于碱性化合物的污染而易于降解。

65. 发明申请

US20110156132A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20110156132A1
公开(公告)日：2011-06-30
申请号：US12784032
申请日：2010-05-20
申请人： Masahiro Kiyotoshi
发明人： Masahiro Kiyotoshi
IPC分类号： H01L27/115
CPC分类号： H01L27/11578 , H01L27/11575 , H01L27/11582 , H01L29/7926
摘要： A nonvolatile semiconductor memory device according to an embodiment includes memory strings which have a plurality of transistors including gate electrode films formed over sides of columnar semiconductor films on gate dielectric films in a height direction of the semiconductor films, and which are arranged in a matrix shape substantially perpendicularly above a substrate. The gate electrode films of the transistors at same height of the memory strings arranged in a first direction are connected to one another. A distance between the semiconductor films at least in a forming position of the transistor at an uppermost layer of the memory strings adjacent to each other in the first direction is smaller than double of thickness of the gate dielectric films.
摘要翻译：根据实施例的非易失性半导体存储器件包括具有多个晶体管的存储器串，所述多个晶体管包括形成在半导体膜的高度方向上的栅极电介质膜上的柱状半导体膜的侧面上的栅电极膜，并且以矩阵形状基本上垂直于基底上方。在沿第一方向布置的存储器串的相同高度处的晶体管的栅极电极膜彼此连接。在第一方向上彼此相邻的存储器串的最上层的晶体管的至少形成位置的半导体膜之间的距离小于栅极电介质膜的厚度的两倍。

66. 发明申请

US20090283739A1 NONVOLATILE STORAGE DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
标题翻译：非易失存储器件及其制造方法
公开(公告)号：US20090283739A1
公开(公告)日：2009-11-19
申请号：US12408598
申请日：2009-03-20
申请人： Masahiro Kiyotoshi
发明人： Masahiro Kiyotoshi
IPC分类号： H01L29/786 , H01L21/28
CPC分类号： H01L27/1021 , H01L27/0688 , H01L27/101 , H01L27/24
摘要： There is provided a nonvolatile storage device including a plurality of component memory layers. The plurality of component memory layers are stacked In a direction perpendicular to a layer surface. Each of the plurality of component memory layers includes a first wiring, a second wiring provided non-parallel to the first wiring and a stacked structure unit provided between the first wiring and the second wiring and including a recording layer. At least one of the first wiring and the second wiring includes a protruding portion provided on a portion opposed to the recording layer and protruding toward the recording layer side.
摘要翻译：提供了包括多个部件存储层的非易失性存储装置。多个分量存储层在垂直于层表面的方向上堆叠。多个分量存储层中的每一个包括第一布线，与第一布线不平行的第二布线和设置在第一布线和第二布线之间并包括记录层的堆叠结构单元。第一布线和第二布线中的至少一个包括设置在与记录层相对的部分上且朝向记录层侧突出的突出部分。

67. 发明申请

US20090283737A1 NONVOLATILE STORAGE DEVICE AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：非易失存储器件及其制造方法
公开(公告)号：US20090283737A1
公开(公告)日：2009-11-19
申请号：US12408510
申请日：2009-03-20
申请人： Masahiro Kiyotoshi
发明人： Masahiro Kiyotoshi
IPC分类号： H01L47/00 , H01L21/336
CPC分类号： H01L27/101 , H01L27/1021 , H01L27/105 , H01L27/2409 , H01L27/2481 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147
摘要： A nonvolatile storage device having a plurality of unit memory layers, and a plurality of layer selection transistors is provided. The plurality of unit memory layers are laminated in a direction perpendicular to a layer surface of the unit memory layers. Each of the unit memory layers includes a plurality of first wirings, a plurality of second wirings provided non-parallel to the plurality of first wirings, and a recording layer provided between the plurality of first wirings and the plurality of second wirings. The plurality of layer selection transistors are connected to at least one of the plurality of first wirings and the plurality of second wirings of each of the unit memory layers, and collectively selects the at least one in the same plane.
摘要翻译：提供具有多个单位存储层的非易失性存储装置和多个层选择晶体管。多个单元存储层在垂直于单元存储层的层表面的方向上层叠。每个单元存储层包括多个第一布线，多个第二布线，其设置成不平行于多个第一布线，以及记录层，设置在多个第一布线和多个第二布线之间。多个层选择晶体管连接到每个单元存储层的多个第一布线和多个第二布线中的至少一个，并且在同一平面中共同选择至少一个。

68. 发明申请

US20090212352A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20090212352A1
公开(公告)日：2009-08-27
申请号：US12391953
申请日：2009-02-24
申请人： Kenji AOYAMA , Eiji Ito , Masahiro Kiyotoshi , Tadashi Iguchi , Moto Yabuki
发明人： Kenji AOYAMA , Eiji Ito , Masahiro Kiyotoshi , Tadashi Iguchi , Moto Yabuki
IPC分类号： H01L29/792 , H01L21/28 , H01L29/788
CPC分类号： H01L27/11521 , H01L21/28273 , H01L21/764 , H01L29/66825
摘要： A semiconductor memory device has a semiconductor substrate, a plurality of word lines formed at predetermined intervals on the semiconductor substrate, each word line having a gate insulating film, a charge storage layer, a first insulating film, and a controlling gate electrode which are stacked in order, and including a metal oxide layer above the level of the gate insulating film, a second insulating film covering a side of the word line and a surface of the semiconductor substrate between the word lines, and having a film thickness of 15 nm or less, and a third insulating film formed between the word lines adjacent to each other such that a region below the level of the metal oxide layer has a cavity.
摘要翻译：半导体存储器件具有半导体衬底，在半导体衬底上以预定间隔形成的多个字线，每个字线具有栅极绝缘膜，电荷存储层，第一绝缘膜和控制栅电极，它们被堆叠并且包括位于栅极绝缘膜的高度之上的金属氧化物层，覆盖字线的一侧的第二绝缘膜和字线之间的半导体衬底的表面，并且具有15nm的膜厚度或并且形成在彼此相邻的字线之间的第三绝缘膜，使得低于金属氧化物层的电平的区域具有空腔。

69. 发明授权

US07416987B2 Semiconductor device and method of fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07416987B2
公开(公告)日：2008-08-26
申请号：US11472282
申请日：2006-06-22
申请人： Katsuhiko Hieda , Masahiro Kiyotoshi
发明人： Katsuhiko Hieda , Masahiro Kiyotoshi
IPC分类号： H01L21/311
CPC分类号： H01L21/02222 , H01L21/02164 , H01L21/022 , H01L21/02282 , H01L21/02337 , H01L21/3125 , H01L21/316 , H01L21/76229
摘要： According to the present invention, there is a provided a semiconductor device fabrication method having, forming a mask material in a surface portion of a semiconductor substrate, and forming a step having a projection by using the mask material; forming a dielectric film on the semiconductor substrate so as to fill the step and planarize an entire surface; annealing the dielectric film; etching back the dielectric film such that a surface of the dielectric film is positioned between upper and lower surfaces of the mask material; and removing the mask material to expose a surface of the projection of the semiconductor substrate.
摘要翻译：根据本发明，提供了一种半导体器件制造方法，其具有在半导体衬底的表面部分中形成掩模材料，并且通过使用掩模材料形成具有突起的台阶; 在所述半导体衬底上形成电介质膜，以填充所述台阶并使整个表面平坦化; 电介质膜退火; 蚀刻介电膜，使得电介质膜的表面位于掩模材料的上表面和下表面之间; 以及去除所述掩模材料以暴露所述半导体衬底的所述突起的表面。

70. 发明授权

US07416955B2 Method of manufacturing a semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07416955B2
公开(公告)日：2008-08-26
申请号：US11439993
申请日：2006-05-25
申请人： Osamu Arisumi , Masahiro Kiyotoshi
发明人： Osamu Arisumi , Masahiro Kiyotoshi
IPC分类号： H01L21/76 , H01L21/31
CPC分类号： H01L21/022 , H01L21/02126 , H01L21/02164 , H01L21/02274 , H01L21/02282 , H01L21/312 , H01L21/31612 , H01L21/76801 , H01L21/76826 , H01L21/76828 , H01L21/76837
摘要： A method of manufacturing a semiconductor device, includes forming a first insulating film containing silicon oxide as a main ingredient, on an underlying region, adhering water to the first insulating film, forming a polymer solution layer containing a silicon-containing polymer on the water-adhered first insulating film, and forming a second insulating film containing silicon oxide as a main ingredient from the polymer solution layer, wherein forming the second insulating film includes forming silicon oxide by a reaction between the polymer and water adhered to the first insulating film.
摘要翻译：一种制造半导体器件的方法，包括在下面的区域上形成含有氧化硅作为主要成分的第一绝缘膜，将水粘附到第一绝缘膜上，在水溶性聚合物层上形成含有含硅聚合物的聚合物溶液层，粘合的第一绝缘膜，并且从聚合物溶液层形成含有氧化硅作为主要成分的第二绝缘膜，其中形成所述第二绝缘膜包括通过所述聚合物和附着到所述第一绝缘膜的水之间的反应形成氧化硅。

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