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61. 发明申请

US20090102562A1 CROSS-COUPLED LOW NOISE AMPLIFIER FOR CELLULAR APPLICATIONS 有权
标题翻译：用于细胞应用的交叉耦合低噪声放大器
公开(公告)号：US20090102562A1
公开(公告)日：2009-04-23
申请号：US11874305
申请日：2007-10-18
申请人： Yuyu Chang , Hooman Darabi
发明人： Yuyu Chang , Hooman Darabi
IPC分类号： H03F3/16 , H03F3/45
CPC分类号： H03F3/45188 , H03F3/195 , H03F2200/294 , H03F2200/451 , H03F2203/45384 , H03F2203/45386 , H03F2203/45392 , H03F2203/45544 , H03F2203/45548 , H03F2203/45554 , H03F2203/45596 , H03F2203/45638 , H04B1/18
摘要： Cross-coupled low noise amplifier for cellular applications. A circuitry implementation that includes two pairs of metal oxide semiconductor field-effect transistors (MOSFETs) (either N-type of P-type) operates as an LNA, which can be used within any of a wide variety of communication devices. In one embodiment, this design is particularly adaptable to cellular telephone applications. A majority of the elements are integrated within the design and need not be implemented off-chip, and this can provide for a reduction in area required by the circuitry. A very high output impedance is provided by using two transistors (implemented in a triple well configuration) with resistive source degeneration. A higher than typical power supply voltage can be employed (if desired) to accommodate the voltage drops of the resistors and transistors.
摘要翻译：用于蜂窝应用的交叉耦合低噪声放大器。包括两对金属氧化物半导体场效应晶体管（MOSFET）（N型P型）的电路实现作为LNA工作，可以在各种通信设备中使用。在一个实施例中，该设计特别适用于蜂窝电话应用。大多数元件集成在设计中，不需要在片外实现，这可以减少电路所需的面积。通过使用具有电阻源退化的两个晶体管（以三阱配置实现）来提供非常高的输出阻抗。可以使用高于典型的电源电压（如果需要）以适应电阻器和晶体管的电压降。

62. 发明申请

US20090011735A1 RF transmitter with stable on-chip PLL 失效
标题翻译： RF发射机具有稳定的片上PLL
公开(公告)号：US20090011735A1
公开(公告)日：2009-01-08
申请号：US11824663
申请日：2007-07-02
申请人： Alireza Zolfaghari , Hooman Darabi
发明人： Alireza Zolfaghari , Hooman Darabi
IPC分类号： H04B1/06
CPC分类号： H03L7/093 , H03L7/0891 , H03L7/18
摘要： A phase locked loop (PLL) a phase detector, a charge pump, a loop filter, a controlled oscillator, and a feedback divider. The phase detector is coupled to produce a difference signal based on a difference between phase of a reference oscillation and phase of a feedback oscillation. The charge pump is coupled to convert the difference signal into an up-signal or a down signal. The loop filter coupled to filter the up signal or the down signal to produce a control signal. The controlled oscillator is coupled to generate an output oscillation based on the control signal. The feedback divider is coupled to generate the feedback oscillation from the output oscillation based on a divider value. The loop filter includes a first resistor-capacitor circuit and a second resistor-capacitor circuit. The first resistor-capacitor circuit is calibrated using a first calibration technique and the second resistor-capacitor circuit is calibrated using a second calibration technique.
摘要翻译：锁相环（PLL），相位检测器，电荷泵，环路滤波器，受控振荡器和反馈分压器。相位检测器被耦合以基于参考振荡的相位与反馈振荡的相位之间的差产生差分信号。电荷泵被耦合以将差信号转换成上信号或下信号。该滤波器被耦合以对上行信号或下降信号进行滤波以产生控制信号。受控振荡器被耦合以基于控制信号产生输出振荡。反馈分压器被耦合以基于分频器值从输出振荡产生反馈振荡。环路滤波器包括第一电阻 - 电容电路和第二电阻 - 电容电路。使用第一校准技术校准第一电阻器电容器电路，并且使用第二校准技术校准第二电阻器电容器电路。

63. 发明授权

US07471142B2 Filter calibration with cell re-use 有权
标题翻译：过滤器校准与细胞再使用
公开(公告)号：US07471142B2
公开(公告)日：2008-12-30
申请号：US11430575
申请日：2006-05-09
申请人： Qiang (Tom) Li , Hooman Darabi
发明人： Qiang (Tom) Li , Hooman Darabi
IPC分类号： H03B1/00
CPC分类号： H03H11/0472 , H03F3/72 , H03F2200/381 , H03F2203/7221 , H03H11/0444 , H03H11/52 , H03H2210/025 , H03H2210/036 , H03H2210/04
摘要： Various embodiments are disclosed relating filter calibration with cell re-use. According to an example embodiment, an apparatus includes a first circuit, including a variable circuit element. The first circuit is adapted to output an output frequency signal during a calibration mode and to operate as a filter during a filter mode. A control circuit is coupled to the first circuit and is adapted to receive a reference frequency signal and to calibrate the first circuit by adjusting the variable circuit element based on the reference frequency signal and the output frequency signal during the calibration mode. The calibrated first circuit is configured to then operate as a filter during the filter mode.
摘要翻译：公开了关于过滤器校准与细胞再利用的各种实施例。根据示例实施例，一种装置包括包括可变电路元件的第一电路。第一电路适于在校准模式期间输出输出频率信号，并且在滤波器模式期间用作滤波器。控制电路耦合到第一电路，并且适于接收参考频率信号并且通过在校准模式期间基于参考频率信号和输出频率信号调整可变电路元件来校准第一电路。校准的第一电路被配置为在滤波器模式期间作为滤波器工作。

64. 发明授权

US07395098B2 Bias filtering module including MOS capacitors 有权
标题翻译：偏置滤波模块包括MOS电容
公开(公告)号：US07395098B2
公开(公告)日：2008-07-01
申请号：US11183446
申请日：2005-07-18
申请人： Hooman Darabi
发明人： Hooman Darabi
IPC分类号： H04B1/38 , H04M1/00
CPC分类号： H04W52/028 , Y02D70/122 , Y02D70/142 , Y02D70/144 , Y02D70/22
摘要： A bias filtering module with at least two capacitive levels satisfies both a settle time requirement and a filtering requirement using a voltage dependent filter module whose capacitance is a function of a voltage potential on the filtering circuitry output terminal. The final capacitance level is approximately three times larger than the initial capacitance level. MOS capacitors having a voltage dependent charge capacity within the bias filtering module are coupled between a plurality of bias lines and circuit common. In an alternate embodiment, a selectable first group of capacitors are switched into connection within the bias filtering module as a second group of capacitors approximately reach a fully charged state within a specified settle time to provide improved filtering.
摘要翻译：具有至少两个电容电平的偏置滤波模块满足稳定时间要求和使用电压依赖滤波器模块的滤波要求，其电容是滤波电路输出端上的电压电位的函数。最终电容电平大约是初始电容电平的三倍。偏置滤波模块内具有与电压无关的电荷容量的MOS电容器耦合在多个偏置线和电路之间。在替代实施例中，随着第二组电容器在指定的结算时间内大致达到完全充电状态，可选择的第一组电容器被切换成偏置滤波模块内的连接，以提供改进的滤波。

65. 发明申请

US20080146186A1 On-chip baseband-to-RF interface and applications thereof 有权
标题翻译：片上基带到RF接口及其应用
公开(公告)号：US20080146186A1
公开(公告)日：2008-06-19
申请号：US11641915
申请日：2006-12-19
申请人： Ahmadreza (Reza) Rofougaran , Maryam Rofougaran , Vafa James Rakshani , Claude G. Hayek , Frederic Christian Marc Hayem , Hooman Darabi , Nelson R. Sollenberger , Weidong Li
发明人： Ahmadreza (Reza) Rofougaran , Maryam Rofougaran , Vafa James Rakshani , Claude G. Hayek , Frederic Christian Marc Hayem , Hooman Darabi , Nelson R. Sollenberger , Weidong Li
IPC分类号： H04B1/28
CPC分类号： H04B1/3833 , H04B1/406 , H04W4/18
摘要： An on-chip baseband-to-RF interface includes a receive/transmit section, a control section, and a clock section. The receive/transmit section, when in a receive mode, provides the stream of inbound symbols from the RF circuit to the baseband processing module and, when in a transmit mode, provides the stream of outbound symbols from the baseband processing module to the RF circuit. The control section provides a control communication path between the baseband processing module and the RF circuit. The clock section provides a clock communication path between the baseband processing module and the RF circuit.
摘要翻译：片上基带到RF接口包括接收/发送部分，控制部分和时钟部分。接收/发送部分处于接收模式时，将来自RF电路的入站符号流提供给基带处理模块，并且当处于发送模式时，将来自基带处理模块的出站符号流提供给RF电路。控制部分提供基带处理模块和RF电路之间的控制通信路径。时钟部分提供基带处理模块和RF电路之间的时钟通信路径。

66. 发明申请

US20080146173A1 RF Transmitter front-end and applications thereof 有权
标题翻译：射频发射机前端及其应用
公开(公告)号：US20080146173A1
公开(公告)日：2008-06-19
申请号：US11638623
申请日：2006-12-13
申请人： Mohammad Nariman , Alireza Zolfaghari , Hooman Darabi
发明人： Mohammad Nariman , Alireza Zolfaghari , Hooman Darabi
IPC分类号： H04B7/00
CPC分类号： H04B1/0483
摘要： A radio frequency (RF) transmitter front-end includes a digital to analog conversion module and a power amplifier module. The digital to analog conversion module is coupled to convert amplitude information into analog amplitude adjust signals when a first mode is active and is coupled to convert power level information into analog power level signals when a second mode is active. The power amplifier module is coupled to amplify first phase modulated RF signals in accordance with the analog amplitude adjust signals to produce first outbound RF signals when the first mode is active and is coupled to amplify second phase modulated RF signals in accordance with the analog power level signals to produce second outbound RF signals when the second mode is active.
摘要翻译：射频（RF）发射机前端包括数模转换模块和功率放大器模块。当第一模式有效时，数模转换模块被耦合以将幅度信息转换为模拟幅度调整信号，并且当第二模式被激活时被耦合以将功率电平信息转换为模拟功率电平信号。功率放大器模块被耦合以根据模拟幅度调整信号放大第一相位调制RF信号，以在第一模式有效时产生第一出站RF信号，并且被耦合以根据模拟功率电平放大第二相位调制RF信号当第二模式有效时产生第二出站RF信号的信号。

67. 发明授权

US07375595B2 Method and apparatus for calibrating a phase locked loop in open-loop 有权
标题翻译：用于校准开环中的锁相环的方法和装置
公开(公告)号：US07375595B2
公开(公告)日：2008-05-20
申请号：US11540878
申请日：2006-09-29
申请人： Louie Serrano , Alireza Zolfaghari , Paul Lettieri , Hea Joung Kim , Hooman Darabi , Henrik Jensen , Behnam Mohammadi
发明人： Louie Serrano , Alireza Zolfaghari , Paul Lettieri , Hea Joung Kim , Hooman Darabi , Henrik Jensen , Behnam Mohammadi
IPC分类号： H03L7/08 , H03L7/099
CPC分类号： H03L7/0898 , H03L7/10 , H03L7/18
摘要： Methods and apparatus for calibrating a transitional loop, such as a phase locked loop, are disclosed. An example method includes performing an open loop calibration of a voltage controlled oscillator (VCO). The open loop calibration includes tuning the output oscillation frequency of the VCO to within a predetermined range of frequencies. The example method further includes determining a voltage offset and a gain error of an analog to digital converter (ADC) coupled with the phase locked loop. The example method also includes determining a gain offset of the open loop calibrated VCO using the voltage offset and the gain error of the ADC. In the example method, a signal provided by a charge pump of the PLL is adjusted based on the determined gain offset.
摘要翻译：公开了用于校准过渡环路的方法和装置，例如锁相环路。示例性方法包括执行压控振荡器（VCO）的开环校准。开环校准包括将VCO的输出振荡频率调谐到预定频率范围内。示例性方法还包括确定与锁相环耦合的模数转换器（ADC）的电压偏移和增益误差。示例性方法还包括使用电压偏移和ADC的增益误差来确定开环校准的VCO的增益偏移。在示例性方法中，基于所确定的增益偏移来调整由PLL的电荷泵提供的信号。

68. 发明申请

US20070190958A1 Receiver architecture for wireless transceiver 有权
标题翻译：无线收发器的接收机架构
公开(公告)号：US20070190958A1
公开(公告)日：2007-08-16
申请号：US11355818
申请日：2006-02-16
申请人： Hooman Darabi
发明人： Hooman Darabi
IPC分类号： H04B1/18
CPC分类号： H04B1/40 , H04B17/21
摘要： Various embodiments are disclosed relating to a wireless transceiver. In an example embodiment, a wireless transceiver may include a transmitter adapted to output a signal at an image frequency (e.g., a simulated image) for a channel during a first mode (e.g., calibration mode) of operation. The wireless transceiver also includes a receiver adapted to receive, via loopback from the transmitter, the (e.g., simulated) image frequency signal and to determine digitally a receiver in-phase/quadrature-phase (I/Q) signal calibration adjustment based on the (simulated) image frequency signal to improve a match in amplitude and a predetermined phase shift between I and Q signals of the receiver during the first (e.g., calibration) mode of operation. The I/Q calibration adjustment may be applied to received signals during a second mode (e.g., operation mode) of operation to improve image rejection.
摘要翻译：公开了关于无线收发器的各种实施例。在示例实施例中，无线收发器可以包括适于在操作的第一模式（例如，校准模式）期间输出用于信道的图像频率（例如，模拟图像）的信号的发射器。无线收发器还包括接收器，适于通过来自发射机的环回接收（例如，模拟的）图像频率信号，并且基于接收机的同相/正交相位（I / Q）信号校准调整来数字地接收（模拟）图像频率信号，以改善在第一（例如校准）操作模式期间接收机的I和Q信号之间的幅度匹配和预定的相移。可以在操作的第二模式（例如，操作模式）期间将I / Q校准调整应用于接收信号，以改善图像抑制。

69. 发明申请

US20070173207A1 Techniques to decrease fractional spurs for wireless transceivers 有权
$Techniques to decrease fractional spurs for wireless transceivers$
标题翻译：减少无线收发器分数刺激的技术
公开(公告)号：US20070173207A1
公开(公告)日：2007-07-26
申请号：US11336716
申请日：2006-01-20
申请人： Hooman Darabi
发明人： Hooman Darabi
IPC分类号： H04B1/40
CPC分类号： H04B1/406 , H04B1/0003
摘要： Various embodiments are disclosed relating to techniques to reduce spurs in wireless transceivers. In an example embodiment, a first fractional-N divide ratio for a first frequency synthesizer may be set based on a selected channel. A second fractional-N divide ratio for a second frequency synthesizer may be set to a fixed value independent of the selected channel. The second fractional-N divide ratio may be set to a value that is sufficiently distant from an integer value so as to decrease the likelihood of at least some type(s) of spurs.
摘要翻译：公开了关于减少无线收发器中的刺激的技术的各种实施例。在示例性实施例中，可以基于所选择的信道来设置用于第一频率合成器的第一分数N除法比。第二频率合成器的第二小数N分频比可以被设置为独立于所选频道的固定值。第二分数N分频比可以被设置为与整数值足够远的值，以便减少至少某种类型的刺激的可能性。

70. 发明授权

US07076232B2 Method and apparatus for DC offset cancellation 失效
公开(公告)号：US07076232B2
公开(公告)日：2006-07-11
申请号：US10138678
申请日：2002-05-03
申请人： Hooman Darabi
发明人： Hooman Darabi
IPC分类号： H04Q7/20
CPC分类号： H03G3/3052 , H04B1/406
摘要： A radio transceiver includes amplification circuitry that is coupled to receive a down converted signal and to provide infinite rejection of any DC component added by the down conversion circuitry. Specifically, an amplification stage includes a voltage integrator that is coupled within a feedback loop of the amplification circuitry to produce a DC charge having a magnitude that equals the added DC component but a polarity that is opposite. Accordingly, the voltage produced by the voltage integrator is added to the signal received from the down conversion circuitry to cause the amplification circuitry to merely amplify the wireless communication signals characterized by a frequency of oscillation. Logic circuitry is used for selectively coupling the voltage integrator to an output port of the amplification circuitry.

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