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    • 69. 发明授权
    • Thin film transistor, thin film transistor substrate including the same and method of manufacturing the same
    • 薄膜晶体管,包括其的薄膜晶体管基板及其制造方法
    • US07879662B2
    • 2011-02-01
    • US12573385
    • 2009-10-05
    • Yang-Ho BaeChang-Oh JeongByeong-Beom Kim
    • Yang-Ho BaeChang-Oh JeongByeong-Beom Kim
    • H01L21/00
    • H01L29/458H01L27/124
    • A thin film transistor showing desirable contact characteristics during contact with indium tin oxide (ITO) or indium zinc oxide (IZO), in which a first conductive pattern including a gate electrode and a second conductive pattern including a source electrode and a drain electrode are formed without an etching process, a TFT substrate including the TFTs, and a method of manufacturing the same. The thin film transistor includes a gate electrode formed of a first conductive layer, a gate insulating layer covering the gate electrode, a semiconductor layer forming a channel on the gate insulating layer; an ohmic contact layer formed on the semiconductor layer, and a source electrode and a drain electrode formed of a second conductive layer and of a third conductive layer. The second conductive layer includes an aluminum-nickel alloy and nitrogen and is formed on the semiconductor layer. The third conductive layer includes an aluminum-nickel alloy and is formed on the second conductive layer.
    • 在与铟锡氧化物(ITO)或铟锌氧化物(IZO)接触期间显示出期望的接触特性的薄膜晶体管,其中形成包括栅电极的第一导电图案和包括源电极和漏电极的第二导电图案 没有蚀刻处理,包括TFT的TFT基板及其制造方法。 薄膜晶体管包括由第一导电层形成的栅电极,覆盖栅电极的栅极绝缘层,在栅极绝缘层上形成沟道的半导体层; 形成在半导体层上的欧姆接触层,以及由第二导电层和第三导电层形成的源电极和漏电极。 第二导电层包括铝 - 镍合金和氮,并形成在半导体层上。 第三导电层包括铝镍合金,并形成在第二导电层上。