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61. 发明专利

JPH10191282A DATA TRANSMITTING METHOD, COMMUNICATION SYSTEM USING THE SAME, TRANSMISSION DEVICE AND RECEPTION DEVICE 失效
公开(公告)号：JPH10191282A
公开(公告)日：1998-07-21
申请号：JP34942296
申请日：1996-12-27
申请人： HITACHI LTD
发明人： KURIHARA HIROSHI , WAKAO SATOSHI
IPC分类号： H04N7/08 , H04N7/081 , H04N7/10
摘要： PROBLEM TO BE SOLVED: To re-transmit data from a transmission side and to permit a reception-side to securely receive data when data transmitted from the transmission-side are normally received on the reception side in the communication system of satellite communication, cable television and the like. SOLUTION: A transmitting station 106 adds attribute information for re- transmission to data to be transmitted and transmits it to a reception device. When the transmission station 106 transmits a command for indicating the reception processing of a re-transmission mode to the reception device 114, the reception device 114 records attribute information on data which are normally received in a memory 414. When the output indication of a reception result is given from the transmission station 106, the reception device 114 transmits the reception result recorded in the memory 414. The transmission station 106 generates a re-transmission file based on the result. The transmission station 106 transmits a re-transmission file transmission start instruction command and than transmits the re-transmission file.

62. 发明专利

JPH09258874A DISPLAY DEVICE WITH CONTROL FUNCTION 失效
公开(公告)号：JPH09258874A
公开(公告)日：1997-10-03
申请号：JP7175796
申请日：1996-03-27
申请人： HITACHI LTD , HITACHI VIDEO IND INF SYST INC
发明人： HIRUTA YUKIO , KATO NOBUTAKA , FURUHASHI TSUTOMU , MORI MASASHI , KURIHARA HIROSHI , MANO HIROYUKI
IPC分类号： G06F3/02 , G06F3/048 , G06F3/14 , G09G5/00
摘要： PROBLEM TO BE SOLVED: To improve operability in the adjustment operation of a display device by adjusting the display device having an adjusting function by means of the input device of a data processor so as to reduce the number of parts and executing usage in common with the input device so as to prevent the deterioration of operability in the adjustment operation, which is caused by means of enabling executing discrimination from an access operation as against a mainbody device. SOLUTION: The display device 1 is constituted by providing an interface part 11 receiving data from the input device 3, a change-over switch 12 changing-over the output destination of inputted data, a data analyzing part 13 analyzing inputted data so that the change-over switch 12 is changed-over so as to change-over an input from the input device 3 from the control of the mainbody device 2 into the adjustment of the display device 1 and input data is inputted to the data analyzing part 13. Then, various kinds of display adjusting means of the display device are also provided in configuration.

63. 发明专利

JPH09152848A LIQUID CRYSTAL DISPLAY CONTROLLER 失效
公开(公告)号：JPH09152848A
公开(公告)日：1997-06-10
申请号：JP31248395
申请日：1995-11-30
申请人： HITACHI LTD , HITACHI VIDEO IND INF SYST INC
发明人： FURUHASHI TSUTOMU , MAEDA TAKESHI , HIGA ATSUHIRO , OHARA TOSHIYUKI , KURIHARA HIROSHI , KASAI SHIGEHIKO
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36 , G09G5/00
摘要： PROBLEM TO BE SOLVED: To provide a liquid crystal display controller capable of expanding a display only by a memory of a low speed and small-capacity. SOLUTION: When a resolution of a video signal 105 is below a medium degree, an expansion processing is performed by a frame memory 110, a line memory 111, and an expansion processing control circuit 118. When an input and an output to and from the frame memory 110 are synchronized, only a capacity of two lines suffices that of the frame memory 110. When video signal 105 has the same high resolution as a liquid crystal display panel 124, the video signal 105(117) is outputted to a display timing generation circuit 120 through a gate circuit 109 and is displayed in a through mode. No processing is performed by the frame memory 110, etc.

64. 发明专利

JPH07262231A WIRING METHOD 失效
公开(公告)号：JPH07262231A
公开(公告)日：1995-10-13
申请号：JP4724694
申请日：1994-03-17
申请人： HITACHI LTD , HITACHI SOFTWARE ENG
发明人： KURIHARA HIROSHI , KUSUHARA JIRO , KIYOUHATA YOSHIHIRO
IPC分类号： G06F17/50 , H05K3/00
摘要： PURPOSE:To arrange through holes for guard at the periphery of signal pins at a decided rate and to realize wiring pattern design which is immune against noise. CONSTITUTION:In a step 1, all signal pins and idle grids on a substrate are registered. In a step 2, the number of the signal pins existing at the peripheries of the idle grids is counted, and the value is set to be an adjacent value. In a step 3, the through holes for guard are generated for the idle grids so that the rate with the signal pins becomes a decided ratio in order from the larger adjacent value. In a last step 4, the through holes provided by wiring are assumed and the through holes for guard are increased so that the decided rate can be kept even in such a case.

65. 发明专利

JPH0756539A DRIVING METHOD FOR MATRIX TYPE DISPLAY DEVICE 失效
公开(公告)号：JPH0756539A
公开(公告)日：1995-03-03
申请号：JP20615393
申请日：1993-08-20
申请人： HITACHI LTD
发明人： KURIHARA HIROSHI , FUJII TATSUHISA , KOSHI HIROBUMI , MANO HIROYUKI , NISHITANI SHIGEYUKI , IGARASHI YOICHI
IPC分类号： G02F1/133 , G09G3/36
摘要： PURPOSE:To display without dispersion of brightness by selecting a voltage level out of reference voltage and outputting it to a column electrode. CONSTITUTION:A column signal generating means 17 calculates display data of one row outputted from a column electrode driving means 18 in a next divided time. The column electrode driving means 18 takes in analog display data of one row, after that, simultaneously outputs data of one row. Also, row function generating means 22 writes a function of a row of a divided time a row electrode driving means 24, the row electrode driving means 24 outputs voltage corresponding to the value to the row electrode after writing. And in this case, row electrodes of N rows are divided into L, a voltage waveform corresponding to an orthogonal function having values of 1 and -1 is applied to row electrodes divided into L during only a K period out of one frame divided into T, a voltage waveform corresponding to a function having a value of '0' is applied during a period other than that, also, the column electrode driving means 18 selects one voltage value out of any three different voltage values or more and applies it to column electrodes.

66. 发明专利

JPH0713523A LIQUID CRYSTAL DRIVING METHOD AND LIQUID CRYSTAL DISPLAY DEVICE 失效
公开(公告)号：JPH0713523A
公开(公告)日：1995-01-17
申请号：JP15482693
申请日：1993-06-25
申请人： HITACHI LTD
发明人： KURIHARA HIROSHI
IPC分类号： G02F1/133 , G09G3/36
摘要： PURPOSE:To substantially improve display quality with simple constitution by successively taking in time serially inputted video signals for one line into a sampling/hold circuit irregularly changing these signals within a range of the level nearly corresponding to variations in output elements. CONSTITUTION:The sampling/hold circuit 105 takes in and holds the video signals S inputted by the sampling timing signals C1 to C5 corresponding to the time serially inputted video signals S. Voltage fluctuation circuits 107 are disposed for each of respective output circuits 106. These voltage fluctuation circuits 107 are controlled by a voltage fluctuation circuit control circuit 108. This voltage fluctuation circuit control circuit 108 forms the voltages irregularly generated within the range of the process variations in the output elements. As a result, the output signals outputted from the output circuit 106 are the signals formed by adding the irregular signals to the signal voltages held in the sampling/hold circuit 105.

67. 发明专利

JPH04157552A DATA TRANSFER DEVICE 失效
公开(公告)号：JPH04157552A
公开(公告)日：1992-05-29
申请号：JP28374090
申请日：1990-10-22
申请人： HITACHI LTD
发明人： KURIHARA HIROSHI , IGARASHI YOICHI
IPC分类号： G06F13/38 , G06F5/06
摘要： PURPOSE:To prevent data whose transfer is not completed yet from being mistransferred by starting the data transfer to a receptionside system after data corresponding to the length of a transfer block to the reception-side system are stored in a buffer RAM from a transmission-side system. CONSTITUTION:A data transfer control circuit transfers data between a system B like a magnetic disk controller and a system A such as a microprocessor MPU through the buffer RAM. The data transfer from the transmission-side system to the buffer RAM is performed corresponding to the block length of the data which is processed by the reception-side system and then the data transfer to the reception-side system is started after the data corresponding to the length of the transfer block to the reception-system are stored in the buffer RAM. Consequently, the data whose transfer is not completed yet are prevented from being mistransferred.

68. 发明专利

JPH0277828A DISK CONTROLLER 失效
公开(公告)号：JPH0277828A
公开(公告)日：1990-03-16
申请号：JP22864088
申请日：1988-09-14
申请人： HITACHI LTD
发明人： WATANABE KUNIO , TSUNEHIRO TAKASHI , IZEKI TOSHIYUKI , KURIHARA HIROSHI
IPC分类号： G06F13/10 , G06F3/06
摘要： PURPOSE:To speedily perform many and various kinds of control without rewriting a command buffer every time control is performed by setting the start address of a command sequence which is previously combined according to various controls in a start register. CONSTITUTION:A command start register 1-1 indicates the address of a start address RAM 1-2 where the command start address is stored and the contents of this indicated address, i.e., the start address is set in an address counter 1-3. The contents of a command buffer 1-4 corresponding to the address indicated by the address counter are read out and processed by a command processing circuit 1-5. Counter pulses are outputted from a command processing circuit 1-5 to a signal line 1-6 after the processing, the address counter 1-3 is increased, and the processing is continued similarly.

69. 发明专利

JP2006201805A Computer system and display device 有权
标题翻译：计算机系统和显示设备
公开(公告)号：JP2006201805A
公开(公告)日：2006-08-03
申请号：JP2006066904
申请日：2006-03-13
申请人： Hitachi Advanced Digital Inc , Hitachi Ltd , 株式会社日立アドバンストデジタル , 株式会社日立製作所
发明人： FURUHASHI TSUTOMU , MAEDA TAKESHI , HIGA ATSUHIRO , OHARA TOSHIYUKI , KURIHARA HIROSHI , KASAI SHIGEHIKO
IPC分类号： G09G5/00 , G09G3/20 , G09G3/36 , G09G5/36 , G09G5/391
摘要： PROBLEM TO BE SOLVED: To provide a liquid crystal display controller unit with which enlarged display is enabled even with a low-speed and low-capacity memory.
SOLUTION: If a video signal 105 is below middle resolution, enlargement processing is performed by a frame memory 110, a line memory 111, and an enlargement processing control circuit 118. When the input and output to the frame memory 110 are synchronized, the capacity of the frame memory 110 for two line components is sufficient. In the case where the video signal 105 is of the same high resolution as that of a liquid crystal display panel 124, the video signal105 (117) is outputted to a display timing generation circuit 120 through a gate circuit 109 and is displayed in a through mode. The processing by the frame memory 110 etc., is not performed.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供即使在低速和低容量存储器下也能够进行放大显示的液晶显示控制器单元。解决方案：如果视频信号105低于中分辨率，则由帧存储器110，行存储器111和放大处理控制电路118进行放大处理。当帧存储器110的输入和输出被同步时两帧线路分量的帧存储器110的容量就足够了。在视频信号105具有与液晶显示面板124相同的高分辨率的情况下，视频信号105（117）通过门电路109输出到显示定时发生电路120，并以直通方式模式。不执行帧存储器110等的处理。版权所有（C）2006，JPO＆NCIPI

70. 发明专利

JP2004287454A Computer system and display device 有权
公开(公告)号：JP2004287454A
公开(公告)日：2004-10-14
申请号：JP2004139308
申请日：2004-05-10
申请人： Hitachi Advanced Digital Inc , Hitachi Ltd , 株式会社日立アドバンストデジタル , 株式会社日立製作所
发明人： FURUHASHI TSUTOMU , MAEDA TAKESHI , HIGA ATSUHIRO , OHARA TOSHIYUKI , KURIHARA HIROSHI , KASAI SHIGEHIKO
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36 , G09G5/00 , G09G5/36
摘要： PROBLEM TO BE SOLVED: To provide a liquid crystal display controller capable of realizing an enlargement display even with a low-speed and low-capacity memory.
SOLUTION: When a video signal 105 has resolution below intermediate resolution, enlargement processing is carried out through a frame memory 110, a line memory 111, and an enlargement processing control circuit 118. The frame memory 110 needs to have only two-line capacity by synchronizing input to and output from the frame memory 110 with each other. When the video signal 105 has the same high resolution with a liquid crystal display panel 124, the video signal 105 (117) is outputted to a display timing generating circuit 120 through a gate circuit 109 and displayed in a through mode. Processing by the frame memory 110 etc. is not performed.
COPYRIGHT: (C)2005,JPO&NCIPI

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