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61. 发明授权

US07359607B2 Waveguide for thermo optic device 失效
标题翻译：波导用于光电装置
公开(公告)号：US07359607B2
公开(公告)日：2008-04-15
申请号：US10929271
申请日：2004-08-30
申请人： Guy T. Blalock , Howard E. Rhodes , Vishnu K. Agarwal , Gurtej Singh Sandhu , James S. Foresi , Jean-Francois Viens , Dale G. Fried
发明人： Guy T. Blalock , Howard E. Rhodes , Vishnu K. Agarwal , Gurtej Singh Sandhu , James S. Foresi , Jean-Francois Viens , Dale G. Fried
IPC分类号： G02B6/10
CPC分类号： G02F1/025 , G02B6/125 , G02B6/136 , G02B2006/12107 , G02B2006/12164 , G02F1/0147 , G02F2203/15
摘要： A waveguide and resonator are formed on a lower cladding of a thermo optic device, each having a formation height that is substantially equal. Thereafter, the formation height of the waveguide is attenuated. In this manner, the aspect ratio as between the waveguide and resonator in an area where the waveguide and resonator front or face one another decreases (in comparison to the prior art) thereby restoring the synchronicity between the waveguide and the grating and allowing higher bandwidth configurations to be used. The waveguide attenuation is achieved by photomasking and etching the waveguide after the resonator and waveguide are formed. In one embodiment the photomasking and etching is performed after deposition of the upper cladding. In another, it is performed before the deposition. Thermo optic devices, thermo optic packages and fiber optic systems having these waveguides are also taught.
摘要翻译：波导和谐振器形成在热光器件的下包层上，每个具有基本相等的形成高度。此后，波导的形成高度被衰减。以这种方式，波导和谐振器在波导和谐振器前面或彼此面对的区域（与现有技术相比）中的波导和谐振器之间的纵横比，从而恢复波导和光栅之间的同步性并允许更高的带宽配置要使用的。在形成谐振器和波导之后，通过光掩模和蚀刻波导来实现波导衰减。在一个实施例中，在沉积上部包层之后进行光掩模和蚀刻。另一方面，它是在沉积之前进行的。还教导了具有这些波导的热光器件，热光封装和光纤系统。

62. 发明授权

US07279766B2 Photodiode sensor and photosensor for use in an imaging device 有权
标题翻译：用于成像设备的光电二极管传感器和光电传感器
公开(公告)号：US07279766B2
公开(公告)日：2007-10-09
申请号：US11001293
申请日：2004-12-02
申请人： Howard E. Rhodes
发明人： Howard E. Rhodes
IPC分类号： H01L31/06
CPC分类号： H01L27/14643 , H01L27/14601 , H01L27/1463 , H01L27/14687 , H01L27/14689 , H01L31/035281 , H01L31/03529 , H01L31/103 , Y02E10/50
摘要： A multiple-trench photosensor for use in a CMOS imager having an improved charge capacity. The multi-trench photosensor may be either a photogate or photodiode structure. The multi-trench photosensor provides the photosensitive element with an increased surface area compared to a flat photosensor occupying a comparable area on a substrate. The multi-trench photosensor also exhibits a higher charge capacity, improved dynamic range, and a better signal-to-noise ratio. Also disclosed are processes for forming the multi-trench photosensor.
摘要翻译：一种用于具有改进的充电容量的CMOS成像器中的多沟道光电传感器。多沟道光电传感器可以是光栅或光电二极管结构。与平面光电传感器相比，多沟槽光电传感器提供的光敏元件具有增加的表面积，该平面光电传感器占据了基板上相当的面积。多沟道光电传感器还具有更高的充电容量，改善的动态范围和更好的信噪比。还公开了用于形成多沟槽光电传感器的工艺。

63. 发明授权

US07253020B2 Deuterium alloy process for image sensors 有权
标题翻译：图像传感器的氘合金工艺
公开(公告)号：US07253020B2
公开(公告)日：2007-08-07
申请号：US11029704
申请日：2005-01-04
申请人： Howard E. Rhodes
发明人： Howard E. Rhodes
IPC分类号： H01L21/00
CPC分类号： H01L27/14689 , H01L27/14643 , H01L31/18
摘要： A method of alloying an image sensor is disclosed. The method comprises forming various semiconductor devices in a semiconductor substrate. Then, an insulator layer is formed over the semiconductor devices. Finally, deuterium gas is used to alloy said image sensor after the insulator oxide layer has been formed and prior to formation of contact holes in the insulator oxide layer.
摘要翻译：公开了一种合成图像传感器的方法。该方法包括在半导体衬底中形成各种半导体器件。然后，在半导体器件上形成绝缘体层。最后，在形成绝缘体氧化物层之后和在形成绝缘体氧化物层内的接触孔之前，使用氘气合金所述图像传感器。

64. 发明授权

US07214575B2 Method and apparatus providing CMOS imager device pixel with transistor having lower threshold voltage than other imager device transistors 有权
标题翻译：为CMOS成像器件像素提供具有比其它成像器件晶体管具有更低阈值电压的晶体管的方法和装置
公开(公告)号：US07214575B2
公开(公告)日：2007-05-08
申请号：US10751439
申请日：2004-01-06
申请人： Howard E. Rhodes
发明人： Howard E. Rhodes
IPC分类号： H01L21/336 , H01L21/8234
CPC分类号： H01L27/14687 , H01L27/14609 , H01L27/14643
摘要： A transistor of a pixel cell for use in a CMOS imager with a low threshold voltage of about 0.3 V to less than about 0.7 V is disclosed. The transistor is provided with high dosage source and drain regions around the gate electrode and with the halo implanted regions and/or the lightly doped LDD regions and/or the enhancement implanted regions omitted from at least one side of the gate electrode. The low threshold transistor is electrically connected to a high voltage transistor with a high threshold voltage of about 0.7 V.
摘要翻译：公开了一种用于具有约0.3V至小于约0.7V的低阈值电压的CMOS成像器中的像素单元的晶体管。晶体管在栅极周围设置有高剂量源极和漏极区域，并且从栅电极的至少一侧省略了光晕注入区域和/或轻掺杂LDD区域和/或增强注入区域。低阈值晶体管电连接到具有约0.7V的高阈值电压的高压晶体管。

65. 发明授权

US07148528B2 Pinned photodiode structure and method of formation 有权
公开(公告)号：US07148528B2
公开(公告)日：2006-12-12
申请号：US10695160
申请日：2003-10-29
申请人： Howard E. Rhodes
发明人： Howard E. Rhodes
IPC分类号： H01L31/062
CPC分类号： H01L27/14643 , H01L27/14603 , H01L27/1463 , H01L27/14656 , H01L27/14689 , H01L27/14812
摘要： An imager having a photodiode with a shallow doping profile with respect to the top surface of a substrate is disclosed. An imager with a graded pinned surface layer, self-aligned to a gate stack is provided. A photodiode with a shallow doping profile with respect to the top surface of a substrate and a graded pinned surface layer, self-aligned to a gate stack is provided. These photodiodes exhibit reduced image lag, transfer gate leakage, and photodiode dark current generation.

66. 发明授权

US07120336B2 Resonator for thermo optic device 有权
公开(公告)号：US07120336B2
公开(公告)日：2006-10-10
申请号：US10231897
申请日：2002-08-29
申请人： Gurtej Singh Sandhu , Guy T. Blalock , Howard E. Rhodes
发明人： Gurtej Singh Sandhu , Guy T. Blalock , Howard E. Rhodes
IPC分类号： G02B6/26 , G02B6/42
CPC分类号： G02B6/132 , G02B6/12004 , G02B6/12007 , G02B6/136 , G02F1/011 , G02F1/0147 , G02F2203/15
摘要： A resonator for thermo optic devices is formed in the same process steps as a waveguide and is formed in a depression of a lower cladding while the waveguide is formed on a surface of the lower cladding. Since upper surfaces of the resonator and waveguide are substantially coplanar, the aspect ratio, as between the waveguide and resonator in an area where the waveguide and resonator front one another, decreases thereby increasing the bandwidth of the resonator. The depression is formed by photomasking and etching the lower cladding before forming the resonator and waveguide. Pluralities of resonators are also taught that are formed in a plurality of depressions of the lower cladding. To decrease resonator bandwidth, waveguide(s) are formed in the depression(s) of the lower cladding while the resonator is formed on the surface. Thermo optic devices formed with these resonators are also taught.

67. 发明授权

US07105793B2 CMOS pixels for ALC and CDS and methods of forming the same 有权
标题翻译：用于ALC和CDS的CMOS像素及其形成方法
公开(公告)号：US07105793B2
公开(公告)日：2006-09-12
申请号：US10689635
申请日：2003-10-22
申请人： Howard E. Rhodes
发明人： Howard E. Rhodes
IPC分类号： H01L27/00
CPC分类号： H01L27/14627 , H01L27/1462 , H01L27/14806 , H01L27/14887 , H04N5/3535 , H04N5/37457
摘要： Embodiments of the invention provide pixel cells that allow both automatic light control and correlated double sampling operations. The pixel cell includes first and second photo-conversion devices that can be separately read out. For example, the second photo-conversion device can be the pixel cells' floating diffusion region, with an area and doping profile suitable for photo-conversion. An image sensor may include an array of pixel cells, some or all of which have two photo-conversion devices, and peripheral circuitry for reading out signals from the pixel cells. The image sensor's readout circuitry may monitor charge generated by the second photo-conversion devices to determine when to read out signals from the first photo-conversion devices.
摘要翻译：本发明的实施例提供允许自动光控制和相关双重采样操作的像素单元。像素单元包括可以被单独读出的第一和第二光转换器件。例如，第二光转换装置可以是像素单元的浮动扩散区域，具有适于光转换的面积和掺杂分布。图像传感器可以包括像素单元的阵列，其中的一些或全部具有两个光转换装置，以及用于从像素单元读出信号的外围电路。图像传感器的读出电路可以监视由第二光转换装置产生的电荷，以确定何时从第一光转换装置读出信号。

68. 发明授权

US07102184B2 Image device and photodiode structure 有权
标题翻译：图像设备和光电二极管结构
公开(公告)号：US07102184B2
公开(公告)日：2006-09-05
申请号：US10694990
申请日：2003-10-29
申请人： Howard E. Rhodes
发明人： Howard E. Rhodes
IPC分类号： H01L31/062
CPC分类号： H01L27/14643 , H01L27/14603 , H01L27/14609 , H01L27/1463 , H01L27/14683 , H01L27/14689 , H01L31/0352 , Y10S257/905
摘要： The invention provides a photodiode with an increased charge collection area, laterally spaced from an adjacent isolation region. Dopant ions of a first conductivity type with a first impurity concentration form a region surrounding at least part of the isolation region. These dopant ions are further surrounded by dopant ions of the first conductivity type with a second impurity concentration. The resulting isolation region structure increases the capacitance of the photodiode by allowing the photodiode to possess a greater charge collection region while suppressing the generation of dark current.
摘要翻译：本发明提供了具有增加的电荷收集区域的光电二极管，与相邻隔离区域横向间隔开。具有第一杂质浓度的第一导电类型的掺杂离子形成围绕隔离区的至少一部分的区域。这些掺杂剂离子还被具有第二杂质浓度的第一导电类型的掺杂剂离子进一步包围。所得到的隔离区域结构通过允许光电二极管具有更大的电荷收集区域同时抑制暗电流的产生而增加了光电二极管的电容。

69. 发明授权

US07071531B2 Trench isolation for semiconductor devices 失效
标题翻译：半导体器件的沟槽隔离
公开(公告)号：US07071531B2
公开(公告)日：2006-07-04
申请号：US10848389
申请日：2004-05-19
申请人： Howard E. Rhodes
发明人： Howard E. Rhodes
IPC分类号： H01L29/00
CPC分类号： H01L27/1463 , H01L21/76237 , H01L27/14643 , H01L27/14689
摘要： A method of fabricating an integrated circuit includes forming an isolation trench in a semiconductor substrate and partially filling the trench with a dielectric material so that at least the sidewalls of the trench are coated with the dielectric material. Ions are implanted into the substrate in regions directly below the isolation trench after partially filling the trench with the dielectric material. The dielectric along the sidewalls of the trenches can serve as a mask so that substantially all of the ions implanted below the isolation trenches are displaced from the active regions. After the ions are implanted in the substrate below the trenches, the remainder of the trench can be filled with the same or another dielectric material. The trench isolation technique can be used to fabricate memory, logic and imager devices which can exhibit reduced current leakage and/or reduced optical cross-talk.
摘要翻译：一种制造集成电路的方法包括在半导体衬底中形成隔离沟槽，并用电介质材料部分地填充沟槽，使得至少沟槽的侧壁被电介质材料涂覆。在用介电材料部分地填充沟槽之后，将离子注入到隔离沟槽正下方的区域中的衬底中。沿着沟槽的侧壁的电介质可以用作掩模，使得注入到隔离沟槽下方的基本上所有的离子从活性区域移位。在离子注入到沟槽下方的衬底中之后，沟槽的其余部分可以用相同或另一种电介质材料填充。沟槽隔离技术可用于制造可以显示减少的电流泄漏和/或减少的光学串扰的存储器，逻辑和成像器件。

70. 发明授权

US06998657B2 Single poly CMOS imager 失效
标题翻译：单晶CMOS成像仪
公开(公告)号：US06998657B2
公开(公告)日：2006-02-14
申请号：US10688974
申请日：2003-10-21
申请人： Howard E. Rhodes
发明人： Howard E. Rhodes
IPC分类号： H01L27/148
CPC分类号： H01L27/14643 , H01L27/14689
摘要： More complete charge transfer is achieved in a CMOS or CCD imager by reducing the spacing in the gaps between gates in each pixel cell, and/or by providing a lightly doped region between adjacent gates in each pixel cell, and particularly at least between the charge collecting gate and the gate downstream to the charge collecting gate. To reduce the gaps between gates, an insulator cap with spacers on its sidewalls is formed for each gate over a conductive layer. The gates are then etched from the conductive layer using the insulator caps and spacers as hard masks, enabling the gates to be formed significantly closer together than previously possible, which, in turn increases charge transfer efficiency. By providing a lightly doped region on between adjacent gates, a more complete charge transfer is effected from the charge collecting gate.
摘要翻译：通过减小每个像素单元中的栅极之间的间隙和/或通过在每个像素单元中的相邻栅极之间提供轻掺杂区域，特别是至少在电荷之间，在CMOS或CCD成像器中实现更完整的电荷转移收集门和下游的门到电荷收集门。为了减小栅极之间的间隙，在导电层上为每个栅极形成在其侧壁上具有间隔物的绝缘体盖。然后使用绝缘体盖和间隔物作为硬掩模，从导电层蚀刻栅极，使得栅极能够形成得比先前可能的显着更靠近在一起，这又增加了电荷转移效率。通过在相邻栅极之间提供轻掺杂区域，从电荷收集栅极实现更完整的电荷转移。

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