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61. 发明申请

US20080188057A1 Trench isolation type semiconductor device which prevents a recess from being formed in a field region and method of fabricating the same 有权
标题翻译：防止在场区域形成凹部的沟槽隔离型半导体器件及其制造方法
公开(公告)号：US20080188057A1
公开(公告)日：2008-08-07
申请号：US12070808
申请日：2008-02-21
申请人： Ki-Seog Youn , Jong-Hyon Ahn , Deok-Hyung Lee , Sung-Gun Kang , Kong-Soo Cheong
发明人： Ki-Seog Youn , Jong-Hyon Ahn , Deok-Hyung Lee , Sung-Gun Kang , Kong-Soo Cheong
IPC分类号： H01L21/762
CPC分类号： H01L21/76224
摘要： A trench isolation type semiconductor device in which a recess is prevented from being formed in a field region and a method of fabricating the same are provided. The trench isolation type semiconductor device includes a semiconductor substrate defined by an active region and a field region, a trench formed in the field region, an oxide layer conformally formed along the inside of the trench, a liner layer conformally formed along the oxide layer, a field insulating layer formed inside the trench including the oxide layer and the liner layer, and a field protection layer formed on the field insulating layer so that a step difference does not occur on the semiconductor substrate.
摘要翻译：提供其中防止在场区域中形成凹部的沟槽隔离型半导体器件及其制造方法。沟槽隔离型半导体器件包括由有源区和场区定义的半导体衬底，在场区中形成的沟槽，沿着沟内部保形地形成的氧化物层，沿着氧化物层保形地形成的衬层，形成在包括氧化物层和衬垫层的沟槽内的场绝缘层，以及形成在场绝缘层上的场保护层，使得半导体衬底上不发生阶差。

62. 发明授权

US07326608B2 Fin field effect transistor and method of manufacturing the same 有权
标题翻译： Fin场效应晶体管及其制造方法
公开(公告)号：US07326608B2
公开(公告)日：2008-02-05
申请号：US11292261
申请日：2005-11-30
申请人： Deok-Hyung Lee , Yu-Gyun Shin , Jong-Wook Lee , Min-Gu Kang
发明人： Deok-Hyung Lee , Yu-Gyun Shin , Jong-Wook Lee , Min-Gu Kang
IPC分类号： H01L21/8238
CPC分类号： H01L29/7851 , H01L29/66795 , H01L29/7854
摘要： In a fin field effect transistor (FET), an active pattern protrudes in a vertical direction from a substrate and extends across the substrate in a first horizontal direction. A first silicon nitride pattern is formed on the active pattern, and a first oxide pattern and a second silicon nitride pattern are sequentially formed on the substrate and on a sidewall of a lower portion of the active pattern. A device isolation layer is formed on the second silicon nitride pattern, and a top surface of the device isolation layer is coplanar with top surfaces of the oxide pattern and the second silicon nitride pattern. A buffer pattern having an etching selectivity with respect to the second silicon nitride pattern is formed between the first oxide pattern and the second silicon nitride pattern. Internal stresses that can be generated in sidewalls of the active pattern are sufficiently released and an original shape of the first silicon nitride pattern remains unchanged, thereby improving electrical characteristics of the fin FET.
摘要翻译：在鳍状场效应晶体管（FET）中，有源图案在垂直方向上从基板突出，并且在第一水平方向上延伸穿过基板。第一氮化硅图案形成在有源图案上，并且第一氧化物图案和第二氮化硅图案依次形成在衬底上和活性图案的下部的侧壁上。在第二氮化硅图案上形成器件隔离层，器件隔离层的顶表面与氧化物图案和第二氮化硅图案的顶表面共面。在第一氧化物图案和第二氮化硅图案之间形成具有相对于第二氮化硅图案的蚀刻选择性的缓冲图案。可以在有源图案的侧壁中产生的内部应力被充分地释放，并且第一氮化硅图案的原始形状保持不变，从而改善了鳍式FET的电特性。

63. 发明申请

US20050272190A1 Methods of fabricating fin field-effect transistors having silicide gate electrodes and related devices 审中-公开
标题翻译：制造具有硅化物栅电极和相关器件的鳍式场效应晶体管的方法
公开(公告)号：US20050272190A1
公开(公告)日：2005-12-08
申请号：US11143561
申请日：2005-06-02
申请人： Deok-Hyung Lee , Yu-Gyun Shin , Jong-Wook Lee
发明人： Deok-Hyung Lee , Yu-Gyun Shin , Jong-Wook Lee
IPC分类号： H01L29/78 , H01L21/28 , H01L21/336 , H01L21/338 , H01L29/49 , H01L29/76 , H01L29/786
CPC分类号： H01L29/7851 , H01L21/28052 , H01L29/4908 , H01L29/66795
摘要： A method of fabricating a fin field-effect transistor includes forming a fin-shaped active region having first and second source/drain regions therein and a channel region therebetween vertically protruding from a semiconductor substrate, and forming a polysilicon gate electrode on sidewalls of the channel region. Opposing sidewalls of the polysilicon gate electrode are silicided towards a central region thereof to form a silicide gate electrode. Related devices are also discussed.
摘要翻译：制造鳍状场效应晶体管的方法包括：形成其中具有第一和第二源极/漏极区的鳍状有源区和在半导体衬底之间垂直突出的沟道区，以及在沟道的侧壁上形成多晶硅栅电极地区。将多晶硅栅极的相对侧壁朝向其中心区域硅化以形成硅化物栅电极。还讨论了相关设备。

64. 发明申请

US20050199948A1 Fin field effect transistors with epitaxial extension layers and methods of forming the same 审中-公开
标题翻译：具有外延延伸层的鳍式场效应晶体管及其形成方法
公开(公告)号：US20050199948A1
公开(公告)日：2005-09-15
申请号：US11074516
申请日：2005-03-08
申请人： Jong-Wook Lee , Deok-Hyung Lee
发明人： Jong-Wook Lee , Deok-Hyung Lee
IPC分类号： H01L21/336 , H01L29/417 , H01L29/76 , H01L29/786
CPC分类号： H01L29/7851 , H01L29/41791 , H01L2029/7858
摘要： A fin field-effect transistor (FinFET) device includes a fin-shaped semiconductor active region vertically protruding from a substrate and a gate structure on an upper surface and sidewalls of the fin-shaped semiconductor active region at a first portion thereof. The FinFET further includes a semiconductor epitaxial extension layer on the upper surface and sidewalls of the fin-shaped semiconductor active region at second portions thereof on opposite sides of the gate structure. The semiconductor epitaxial extension layer has a width that is greater than a width of the fin-shaped semiconductor active region at the first portion thereof. Related methods are also discussed.
摘要翻译：翅片场效应晶体管（FinFET）器件包括从基板垂直突出的鳍状半导体有源区和其上表面上的栅极结构以及鳍状半导体有源区的第一部分的侧壁。 FinFET还在栅极结构的相对侧上的第二部分处包括在半导体有源区的上表面上的半导体外延延伸层和鳍状半导体有源区的侧壁。半导体外延延伸层的宽度大于其第一部分的鳍状半导体有源区的宽度。还讨论了相关方法。

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