专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

61. 发明申请

US20080041382A1 Auto-Titration Bi-Level Pressure Support System and Method of Using Same 有权
公开(公告)号：US20080041382A1
公开(公告)日：2008-02-21
申请号：US11924259
申请日：2007-10-25
申请人： Greg Matthews , Winslow Duff , Daniel Martin , Uday Shankar , Heather Ressler
发明人： Greg Matthews , Winslow Duff , Daniel Martin , Uday Shankar , Heather Ressler
IPC分类号： A61M16/06
CPC分类号： A61M16/0051 , A61M16/0063 , A61M16/026 , A61M16/204 , A61M2016/0021 , A61M2016/0039 , A61M2230/04
摘要： A bi-level pressure support system and method of treating disordered breathing that optimizes the pressure delivered to the patient during inspiration and expiration to treat the disordered breathing while minimizing the delivered pressure for patient comfort. The pressure generating system generates a flow of breathing gas at an inspiratory positive airway pressure (IPAP) during inspiration and at an expiratory positive airway pressure (EPAP) during expirations. A controller monitor at least one of the following conditions: (1) snoring, (2) apneas, (3) hypopneas, or (4) a big leak in the pressure support system and adjusts the IPAP and the EPAP based on the occurrence of any one of these conditions.

62. 发明申请

US20070061072A1 System and method for the selection of a unique geographic feature 失效
标题翻译：用于选择独特地理特征的系统和方法
公开(公告)号：US20070061072A1
公开(公告)日：2007-03-15
申请号：US11224894
申请日：2005-09-12
申请人： Markus Wuersch , Christopher Frank , Daniel Martin
发明人： Markus Wuersch , Christopher Frank , Daniel Martin
IPC分类号： G01C21/30
CPC分类号： G01C21/20
摘要： The present invention includes a system and method for selecting a unique geographic feature, including a mobile device that uses position and orientation sensors to determine a user position and a user orientation. The mobile device is adapted for wireless communication with a database that houses or has access to data concerning geographic features, as well as processing and computing means for calculating specific geographic relations discussed in further detail below. The system of the present invention further includes means for selecting among those features that are topologically related to the polygon. These include means for defining the geometry of the polygon, means for filtering those features that should not be within the geometry of the polygon, and means for ranking those features within the polygon. The method of the present invention is operable in conjunction with the system through the system hardware and software.
摘要翻译：本发明包括用于选择唯一地理特征的系统和方法，包括使用位置和方向传感器来确定用户位置和用户取向的移动设备。移动设备适于与容纳或具有关于地理特征的数据的数据库的无线通信，以及用于计算下面进一步详细讨论的特定地理关系的处理和计算装置。本发明的系统还包括用于在与多边形拓扑相关的那些特征中进行选择的装置。这些包括用于定义多边形的几何形状的装置，用于过滤不应该在多边形几何中的那些特征的装置，以及用于对多边形内的这些特征进行排名的装置。本发明的方法可以通过系统硬件和软件与系统一起工作。

63. 发明授权

US07062606B2 Multi-threaded embedded processor using deterministic instruction memory to guarantee execution of pre-selected threads during blocking events 有权
标题翻译：多线程嵌入式处理器使用确定性指令存储器来保证在阻塞事件期间预先选择的线程的执行
公开(公告)号：US07062606B2
公开(公告)日：2006-06-13
申请号：US10431996
申请日：2003-05-07
申请人： Robert E. Ober , Roger D. Arnold , Daniel Martin , Erik K. Norden
发明人： Robert E. Ober , Roger D. Arnold , Daniel Martin , Erik K. Norden
IPC分类号： G06F12/00
CPC分类号： G06F9/3802 , G06F9/3851 , G06F12/126 , G06F2212/2515 , Y02D10/13
摘要： A multi-threaded embedded processor that includes an on-chip deterministic (e.g., scratch or locked cache) memory that persistently stores all instructions associated with one or more pre-selected high-use threads. The processor executes general (non-selected) threads by reading instructions from an inexpensive external memory, e.g., by way of an on-chip standard cache memory, or using other potentially slow, non-deterministic operation such as direct execution from that external memory that can cause the processor to stall while waiting for instructions to arrive. When a cache miss or other blocking event occurs during execution of a general thread, the processor switches to the pre-selected thread, whose execution with zero or minimal delay is guaranteed by the deterministic memory, thereby utilizing otherwise wasted processor cycles until the blocking event is complete.
摘要翻译：一种多线程嵌入式处理器，其包括持续存储与一个或多个预选高使用线程相关联的所有指令的片上确定性（例如，划伤或锁定的高速缓存）存储器。处理器通过从便宜的外部存储器读取指令（例如，通过片上标准高速缓冲存储器）或使用其他潜在的慢速非确定性操作（例如来自该外部存储器的直接执行）来执行通用（未选择）线程这可能导致处理器在等待指令到达时停止。当在一般线程的执行期间出现高速缓存未命中或其他阻塞事件时，处理器切换到预先选择的线程，该线程的执行以零或最小延迟由确定性存储器保证，从而利用其他浪费的处理器周期，直到阻塞事件做完了。

64. 发明授权

US07033431B2 Surfactant composition for gypsum plaster boards 有权
标题翻译：石膏板的表面活性剂组成
公开(公告)号：US07033431B2
公开(公告)日：2006-04-25
申请号：US10381232
申请日：2001-09-14
申请人： Daniel Martin , Robert Garcin , Serge Sabio
发明人： Daniel Martin , Robert Garcin , Serge Sabio
IPC分类号： C04B24/16 , C04B28/14 , C04B11/00 , B32B13/00 , B32B13/04
CPC分类号： C04B24/16 , C04B28/14 , C04B2103/40 , C04B2111/0062 , C04B38/106
摘要： A gypsum composition including gypsum, water, and a surfactant composition of alkyl sulfates of formula H(CH2)nOSO3−M+, in which n is from 6 to 16, the mean number of carbon atoms in the alkyl sulfate composition nm being between 10 and 11, and M is a monovalent cation. A process for the preparation of the gypsum composition and a gypsum board obtainable from this composition. Finally, a process for the manufacture of gypsum boards. Application for the manufacture of foamed gypsum boards.
摘要翻译：石膏组合物，包括石膏，水和式H（CH 2）2的烷基硫酸盐的表面活性剂组合物。其中n为6至16，烷基硫酸盐组合物中的平均碳原子数为10至11，和/或 M是一价阳离子。用于制备石膏组合物的方法和可由该组合物获得的石膏板。最后，制造石膏板的过程。泡沫石膏板的制造应用。

65. 外观设计

USD518923S1 Top portion of a welding helmet 有权
标题翻译：焊接头盔的顶部
公开(公告)号：USD518923S1
公开(公告)日：2006-04-11
申请号：US29217107
申请日：2004-11-12
申请人： Desmond T. Curran , Peter D. Lee , Daniel Martin
设计人： Desmond T. Curran , Peter D. Lee , Daniel Martin

66. 发明申请

US20050177819A1 Program tracing in a multithreaded processor 有权
标题翻译：在多线程处理器中进行程序跟踪
公开(公告)号：US20050177819A1
公开(公告)日：2005-08-11
申请号：US10774193
申请日：2004-02-06
申请人： Robert Ober , Daniel Martin , Roger Arnold , Erik Norden
发明人： Robert Ober , Daniel Martin , Roger Arnold , Erik Norden
IPC分类号： G06F9/38 , G06F9/44 , G06F9/48
CPC分类号： G06F9/3851 , G06F9/3824 , G06F9/3826 , G06F9/3861
摘要： A multithreaded processor includes a thread ID for each set of fetched bits in an instruction fetch and issue unit. The thread ID attaches to the instructions and operands of the set of fetched bits. Pipeline stages in the multithreaded processor stores the thread ID associated with each operand or instruction in the pipeline stage. The thread ID are used to maintain data coherency and to generate program traces that include thread information for the instructions executed by the multithreaded processor.
摘要翻译：多线程处理器包括在指令获取和发布单元中的每组提取位的线程ID。线程ID附加到获取位集合的指令和操作数。多线程处理器中的管道级存储与流水线级中的每个操作数或指令相关联的线程ID。线程ID用于维护数据一致性并生成包含由多线程处理器执行的指令的线程信息的程序跟踪。

67. 发明申请

US20050177703A1 Thread ID in a multithreaded processor 有权
标题翻译：多线程处理器中的线程ID
公开(公告)号：US20050177703A1
公开(公告)日：2005-08-11
申请号：US10774226
申请日：2004-02-06
申请人： Erik Norden , Robert Ober , Roger Arnold , Daniel Martin
发明人： Erik Norden , Robert Ober , Roger Arnold , Daniel Martin
IPC分类号： G06F9/38 , G06F9/48 , G06F9/30
CPC分类号： G06F9/3851 , G06F9/3802 , G06F9/3808
摘要： A multithreaded processor includes a thread ID for each set of fetched bits in an instruction fetch and issue unit. The thread ID attaches to the instructions and operands of the set of fetched bits. Pipeline stages in the multithreaded processor stores the thread ID associated with each operand or instruction in the pipeline stage. The thread ID are used to maintain data coherency and to generate program traces that include thread information for the instructions executed by the multithreaded processor.
摘要翻译：多线程处理器包括在指令获取和发布单元中的每组提取位的线程ID。线程ID附加到获取位集合的指令和操作数。多线程处理器中的管道级存储与流水线级中的每个操作数或指令相关联的线程ID。线程ID用于维护数据一致性并生成包含由多线程处理器执行的指令的线程信息的程序跟踪。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式