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    • 61. 发明授权
    • CMOS buffer circuit with controlled current source
    • CMOS缓冲电路具有受控电流源
    • US5455527A
    • 1995-10-03
    • US123647
    • 1993-09-17
    • Brian MurphyMartin Zibert
    • Brian MurphyMartin Zibert
    • G06F3/00H03K3/353H03K3/3565H03K19/003H03K19/0185H03K19/00H03K19/0175
    • H03K19/00361H03K19/01855H03K3/3565
    • An integrated buffer circuit configuration has two inverters which are mutually connected in series. A circuit node lies between the two inverters. At least the first inverter is a CMOS inverter for an input signal IN. The CMOS inverter has an n-channel transistor which is connected to a first supply potential. The source of a p-channel transistor is connected with a constant current source. A first enable transistor is connected between the n-channel transistor of the first inverter and the circuit node. A second enable transistor is connected in parallel to the configuration formed by the constant current source and the p-channel transistor of the first inverter. The gates of the enable transistors are connected with the enable input of the buffer circuit. An enable signal present at the enable input makes it possible to deactivate the buffer circuit in the case of disturbances with a known course over time. A MOS-transistor may function as the constant current source. The MOS-transistor is then connected to a second supply potential and its gate lies at reference potential with a value with always has a constant difference with respect to the second supply potential. During operation, the MOS-transistor is conducting.
    • 集成缓冲电路结构具有串联连接的两个反相器。 电路节点位于两个逆变器之间。 至少第一个逆变器是用于输入信号IN的CMOS反相器。 CMOS反相器具有连接到第一电源电位的n沟道晶体管。 p沟道晶体管的源极与恒流源连接。 第一使能晶体管连接在第一反相器的n沟道晶体管和电路节点之间。 第二使能晶体管与由第一反相器的恒流源和p沟道晶体管形成的配置并联连接。 使能晶体管的栅极与缓冲电路的使能输入相连。 存在于使能输入端的使能信号使得可以在具有已知过程的干扰的情况下停用缓冲电路。 MOS晶体管可以用作恒流源。 然后将MOS晶体管连接到第二电源电位,并且其栅极处于参考电位,其值总是具有相对于第二电源电位的恒定差值。 在运行期间,MOS晶体管导通。
    • 62. 发明授权
    • MOS output buffer circuit with controlled current source
    • MOS输出缓冲电路具有受控电流源
    • US5386157A
    • 1995-01-31
    • US123648
    • 1993-09-17
    • Brian MurphyMartin Zibert
    • Brian MurphyMartin Zibert
    • G06F3/00H03K3/353H03K3/3565H03K19/003H03K19/0185H03K19/0175H03K19/017
    • H03K19/01855H03K19/00361H03K3/3565
    • An integrated buffer circuit configuration has two inverters which are mutually connected in series. The first inverter includes an n-channel transistor and a constant current source. The source of the n-channel transistor is connected to a first supply potential. The drain of the transistor is connected with the constant current source through a first enable transistor. A second enable transistor is connected parallel to the constant current source. The gates of enable transistors are connected with the enable input of the buffer circuit. An enable signal present at the enable input makes it possible to deactivate the buffer circuit in the case of disturbances with a known course over time. A MOS transistor may function as the constant current source. The MOS transistor is then connected to a second supply potential and its gate lies at reference potential with a value with always has a constant difference with respect to the second supply potential. During operation, the MOS transistor is conducting.
    • 集成缓冲电路结构具有串联连接的两个反相器。 第一反相器包括n沟道晶体管和恒流源。 n沟道晶体管的源极连接到第一电源电位。 晶体管的漏极通过第一使能晶体管与恒流源连接。 第二使能晶体管与恒流源并联连接。 使能晶体管的栅极与缓冲电路的使能输入相连接。 存在于使能输入端的使能信号使得可以在具有已知过程的干扰的情况下停用缓冲电路。 MOS晶体管可以用作恒流源。 然后,MOS晶体管连接到第二电源电位,并且其栅极处于参考电位,其值总是具有相对于第二电源电位的恒定差值。 在运行期间,MOS晶体管导通。
    • 63. 发明授权
    • Integrated circuit for generating a reset signal
    • 用于产生复位信号的集成电路
    • US5166546A
    • 1992-11-24
    • US823860
    • 1992-01-22
    • Dominique SavignacDieter GleisBrian Murphy
    • Dominique SavignacDieter GleisBrian Murphy
    • H03K17/22
    • H03K17/223
    • An integrated circuit for generating a reset signal includes terminals for a first and a second supply potential. A serial RC network is connected between the terminals. The RC network has an ohmic component, a capacitive component and a first circuit node of the integrated circuit connected between the components. An initializing circuit is connected parallel to the RC network. The initializing circuit has an output forming a second circuit node of the integrated circuit carrying a potential with a maximum value specified by dimensioning the initializing circuit, when the first supply potential is applied. An inverter circuit is connected between the first circuit node and the terminal for the second supply potential in terms of supply voltage. The inverter circuit has an input connected to the second circuit node and an output forming a third circuit node of the integrated circuit. A transistor has a source-to-drain path connected between the second circuit node and the terminal for the second supply potential and has a gate connected to the third circuit node. An additional inverter has an input at the third circuit node and an output forming a fourth circuit node of the integrated circuit at which a reset signal is present during operation.
    • 用于产生复位信号的集成电路包括用于第一和第二电源电位的端子。 终端之间连接有一个串行RC网络。 RC网络具有连接在组件之间的集成电路的欧姆分量,电容分量和第一电路节点。 初始化电路与RC网络并联连接。 初始化电路具有形成集成电路的第二电路节点的输出,该第一电路节点在施加第一电源电位时承载具有由初始化电路的尺寸确定的最大值的电位。 在电源电压方面,逆变器电路连接在第一电路节点和用于第二电源电位的端子之间。 逆变器电路具有连接到第二电路节点的输入端和形成集成电路的第三电路节点的输出。 晶体管具有连接在第二电路节点和用于第二电源电位的端子之间的源极至漏极路径,并且具有连接到第三电路节点的栅极。 附加的反相器具有在第三电路节点处的输入和形成集成电路的第四电路节点的输出,在该输出端处在操作期间存在复位信号。
    • 66. 发明授权
    • Method and system for identifying objects of service
    • 用于识别服务对象的方法和系统
    • US08892582B2
    • 2014-11-18
    • US11885409
    • 2005-03-03
    • Brian CoxBrian Murphy
    • Brian CoxBrian Murphy
    • G06F7/00H04L12/24
    • H04L41/0233Y10S707/94
    • A method and system and related computer program products are described for identifying an object of service comprising the initial step of generating and storing a static composite identifier representing a state of the object of service. Then, whenever it is desired to identify the object of service, the steps are carried out of: generating a dynamic composite identifier representing a current state of the object of service; locating and retrieving the stored static composite identifier, and searching a database for a match with an object of service recorded therein using either the static or the dynamic composite identifiers, or both.
    • 描述了用于识别服务对象的方法和系统及相关的计算机程序产品,其包括生成和存储表示服务对象的状态的静态组合标识符的初始步骤。 然后,无论何时需要识别服务对象,步骤都执行以下步骤:生成表示服务对象的当前状态的动态组合标识符; 定位和检索存储的静态复合标识符,以及使用静态或动态复合标识符或二者在两者之间搜索与其中记录的服务对象的匹配的数据库。
    • 69. 发明授权
    • Thread synchronization methods and apparatus for managed run-time environments
    • 管理运行时环境的线程同步方法和设备
    • US08302099B2
    • 2012-10-30
    • US13412591
    • 2012-03-05
    • Tatiana ShpeismanAli-Reza Adl-TabatabaiBrian Murphy
    • Tatiana ShpeismanAli-Reza Adl-TabatabaiBrian Murphy
    • G06F9/46G06F12/00G06F17/30
    • G06F9/52Y10S707/99938
    • A example method disclosed herein comprises initiating a first optimistically balanced synchronization to acquire a lock of an object, the first optimistically balanced synchronization comprising a first optimistically balanced acquisition and a first optimistically balanced release to be performed on the lock by a same thread and at a same nesting level, releasing the lock after execution of program code covered by the lock if a stored state of the first optimistically balanced release indicates that the first optimistically balanced release is still valid, the stored state of the first optimistically balanced release being initialized prior to execution of the program code to indicate that the first optimistically balanced release is valid, and throwing an exception after execution of the program code covered by the lock if the stored state of the first optimistically balanced release indicates that the first optimistically balanced release is no longer valid.
    • 本文公开的示例性方法包括启动第一乐观平衡同步以获取对象的锁定,所述第一乐观平衡同步包括第一乐观平衡采集和第一乐观平衡释放,以通过相同线程在锁上执行 相同的嵌套级别,如果第一乐观平衡版本的存储状态指示第一乐观平衡版本仍然有效,则在执行锁定所涵盖的程序代码之后释放锁定,则第一乐观平衡版本的存储状态在 程序代码的执行以指示第一乐观平衡版本是有效的,并且如果第一乐观平衡版本的存储状态指示第一乐观平衡版本不再存在,则在执行锁定所涵盖的程序代码之后抛出异常 有效。