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    • 62. 发明授权
    • Semiconductor memory device with redundancy structure
    • 具有冗余结构的半导体存储器件
    • US5610865A
    • 1997-03-11
    • US480785
    • 1995-06-07
    • Choong-Sun ShinYoung-Sik Seok
    • Choong-Sun ShinYoung-Sik Seok
    • G11C29/00G11C7/00
    • G11C29/84
    • A semiconductor memory device with redundancy structure having a normal memory cell array having a plurality of normal memory cells arranged in row and column directions and a redundant memory cell array having a plurality of redundant memory cells, includes a redundant column selecting circuit for comparing an externally applied column address signal and a programmed defective column address signal to generate a redundant column selection signal. The redundant column selecting circuit has a programming circuit portion for producing the programmed defective column address signal by programming a defective column address corresponding to a defective column. A decoding circuit is provided for decoding the column address signals and producing a column decoding signal; and a normal column selecting circuit for receiving the column decoding signal and producing a normal column selection signal, and which has a disabling circuit for disabling the normal column selecting circuit and enabling the redundant column selecting circuit when the defective column address is applied. When a redundant column is substituted for a defective column with the present invention, since the normal column selection circuit can be operated independently of output signals of fusing boxes provided in a redundant column selection circuit, mal-operation of column and redundant selection circuits can be prevented and the gate passing time of a signal is shortened so as to achieve a high speed operation of the circuits.
    • 一种具有冗余结构的半导体存储器件,具有正常存储单元阵列,具有排列成行和列方向的多个正常存储单元,以及具有多个冗余存储单元的冗余存储单元阵列,包括冗余列选择电路,用于比较外部 应用列地址信号和编程的缺陷列地址信号以产生冗余列选择信号。 冗余列选择电路具有编程电路部分,用于通过对与缺陷列相对应的有缺陷的列地址进行编程来产生编程的缺陷列地址信号。 提供解码电路用于对列地址信号进行解码并产生列解码信号; 以及正常列选择电路,用于接收列解码信号并产生正常列选择信号,并且具有用于禁用正常列选择电路的禁止电路,并且当应用有缺陷列地址时使能冗余列选择电路。 当利用本发明代替缺陷列的冗余列时,由于可以独立于设置在冗余列选择电路中的定影盒的输出信号来操作正常列选择电路,所以列和冗余选择电路的错误操作可以是 并且信号的通过时间被缩短以便实现电路的高速操作。
    • 63. 发明授权
    • Multi-bit test circuit of semiconductor memory device
    • 半导体存储器件的多位测试电路
    • US5483493A
    • 1996-01-09
    • US343948
    • 1994-11-17
    • Choong-Sun Shin
    • Choong-Sun Shin
    • G01R31/28G11C11/401G11C29/00G11C29/34G11C29/38H01L27/00G11C7/00
    • G11C29/38G11C29/34
    • The present invention relates to a semiconductor memory device and more particularly to a multi-bit test circuit which is capable of testing a data access operation of a plurality of memory cells at the same time. A multi-bit test circuit of a semiconductor memory device according to the present invention includes a multiplexer for outputting data having the same logic level to a plurality of data buses at the same time, a first comparator for determining as to whether the data inputted from the data buses has the same logic level, a test controller for complementarily activating the multiplexer and the first comparator with combining a test enable signal and read/write signals, a plurality of data input/output lines commonly connected to one of the data buses through a writing path and a reading path, a second comparator for receiving logic levels of the data input/output lines, and a data input/output controller for connecting one of the writing path and the reading path of the data input/output lines to the data buses in a first operation mode, and for transmitting an output of the second comparator to the data buses.
    • 本发明涉及一种半导体存储器件,更具体地说,涉及能够同时测试多个存储器单元的数据存取操作的多位测试电路。 根据本发明的半导体存储器件的多位测试电路包括:多路复用器,用于同时向多个数据总线输出具有相同逻辑电平的数据;第一比较器,用于确定从 数据总线具有相同的逻辑电平,用于互补地激活多路复用器的测试控制器和组合测试使能信号和读/写信号的第一比较器,多个数据输入/输出线通常连接到数据总线之一,通过 写入路径和读取路径,用于接收数据输入/输出线的逻辑电平的第二比较器,以及用于将数据输入/输出线的写入路径和读取路径中的一个连接到数据输入/输出线的数据输入/输出控制器 数据总线处于第一操作模式,并且用于将第二比较器的输出发送到数据总线。
    • 66. 发明授权
    • Liquid crystal display device and method for manufacturing the same
    • 液晶显示装置及其制造方法
    • US08698971B2
    • 2014-04-15
    • US13208881
    • 2011-08-12
    • Kum Mi OhHan Seok LeeHee Sun ShinWon Keun Park
    • Kum Mi OhHan Seok LeeHee Sun ShinWon Keun Park
    • G02F1/136
    • H01L27/1214G02F1/13338G02F2001/136231H01L29/42384H01L29/78645H01L29/78696
    • Disclosed is a liquid crystal display device with a built-in touch screen, which facilitates enhanced driving performance, and reduces manufacturing cost by a simplified manufacturing process, and a method for manufacturing the same. The device comprises a first substrate with a plurality of pixel regions defined by gate lines and data lines; an active layer in each pixel region of the first substrate; a gate pattern including a plurality of gate electrodes, a portion of the gate electrodes overlapping with a predetermined portion of the active layer with an insulating layer interposed in-between; a plurality of channel regions in the areas of the active layer overlapped with the plurality of gate electrodes; a plurality of lightly doped drain regions in the active layer and directly adjacent to the plurality of channel regions; and a data electrode electrically connected to the active layer.
    • 公开了一种具有内置触摸屏的液晶显示装置及其制造方法,该液晶显示装置有助于提高驱动性能,并且通过简化的制造工艺降低制造成本。 该器件包括具有由栅线和数据线限定的多个像素区的第一衬底; 在所述第一基板的每个像素区域中的有源层; 包括多个栅电极的栅极图案,一部分栅电极与有源层的预定部分重叠,绝缘层位于其间; 所述有源层的区域中的多个沟道区域与所述多个栅电极重叠; 在有源层中并且直接与多个沟道区相邻的多个轻掺杂漏极区; 和与活性层电连接的数据电极。
    • 68. 发明授权
    • Liquid crystal display device and method for manufacturing the same
    • 液晶显示装置及其制造方法
    • US08531616B2
    • 2013-09-10
    • US13239680
    • 2011-09-22
    • Hee Sun ShinKum Mi OhHan Seok Lee
    • Hee Sun ShinKum Mi OhHan Seok Lee
    • G02F1/1335G02F1/1343
    • G06F3/0412G02F1/13338G02F2001/134318G06F3/044
    • An LCD device includes a substrate including an active region and a dummy region; gate and data lines disposed on the substrate crossing each other to define a plurality of pixel regions in the active region; a pixel electrode disposed in each of the plural pixel regions; a common electrode which is patterned in the active region to define common electrode pattern portions, respective common electrode pattern portions and the pixel electrodes each forming an electric field; a first sensing line disposed on the common electrode and electrically connected with the common electrode to sense a user's touch; and at least one dummy electrode disposed in the dummy region adjacent one of the common electrode pattern portions.
    • 一种LCD装置,包括:基板,包括有源区域和虚拟区域; 设置在所述基板上的栅极和数据线彼此交叉以限定所述有源区域中的多个像素区域; 设置在所述多个像素区域的每一个中的像素电极; 在有源区域中构图以形成公共电极图案部分的公共电极,各自的公共电极图案部分和各自形成电场的像素电极; 第一感测线,设置在公共电极上并与公共电极电连接以感测用户的触摸; 以及设置在与所述公共电极图案部分中的一个相邻的所述虚拟区域中的至少一个虚设电极。