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61. 发明专利

JP2012209976A Reconfigurable communication circuit 审中-公开
标题翻译：可重构通信电路
公开(公告)号：JP2012209976A
公开(公告)日：2012-10-25
申请号：JP2012160115
申请日：2012-07-19
申请人： Agere Systems Inc , アギアシステムズインコーポレーテッド
发明人： NICOL CHRISTOPHER JOHN , PROKOP TOMASZ T , YIP DOMINIC WING-KIN
IPC分类号： H04B7/08 , H04J99/00
CPC分类号： H04B7/0845 , H04B7/0857 , H04B7/0871 , H04B7/0874 , H04B7/0891 , Y02D70/00 , Y02D70/1242 , Y02D70/444
摘要： PROBLEM TO BE SOLVED: To reduce integrated area of an equalizer filter unit and to decrease electric power consumption, in a receiver capable of being operated by switching a first mode which uses a diversity function and a second mode which does not use the diversity function.SOLUTION: A communication circuit comprises: N sets of equalizer filter units 106; a coupling circuit 114; and N sets of a post equalizer processor 112. During operating in a first mode, the coupling circuit is constituted so as to couple output of N sets of the equalizer filter units to input of N sets of the post equalizer processors by corresponding the output with the input. During operating in a second mode, the coupling circuit is constituted so as to couple the output of N sets of the equalizer filter units to the input of L sets (L is smaller than N) of the post equalizer processors among the N sets of the post equalizer processors.
摘要翻译：要解决的问题为了减少均衡器滤波器单元的集成面积并降低电力消耗，在能够通过切换使用分集功能的第一模式和不使用分集功能的第二模式来操作的接收机中多样性功能。解决方案：通信电路包括：N组均衡滤波器单元106; 耦合电路114; 和N组后置均衡器处理器112.在第一模式下操作期间，耦合电路被构造成将N组均衡器滤波器单元的输出耦合到N组后置均衡器处理器的输入，输入。在第二模式下工作时，耦合电路被构造成将N组均衡滤波器单元的输出耦合到N组的均衡器处理器的L组输入（L小于N）后均衡器处理器。版权所有（C）2013，JPO＆INPIT

62. 发明专利

JP2012054588A Aluminium pad power bus for integrated circuit device using copper technology interconnection structure, and signal routing technology 审中-公开
标题翻译：使用铜技术互连结构和信号路由技术的集成电路设备的铝箔电源总线
公开(公告)号：JP2012054588A
公开(公告)日：2012-03-15
申请号：JP2011236296
申请日：2011-10-27
申请人： Agere Systems Inc , アギアシステムズインコーポレーテッド
发明人： SEUNG H KANG , KREBS ROLAND P , KURT GEORGE STEINER , AYUKAWA MICHAEL C , MERCHANT SAILESH M
IPC分类号： H01L21/3205 , H01L23/52 , H01L21/768 , H01L21/82 , H01L23/528 , H01L23/532
CPC分类号： H01L23/5286 , H01L23/53214 , H01L23/53228 , H01L2224/45144 , H01L2224/48091 , H01L2224/49171 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device by less steps for power bus interconnection structure.SOLUTION: A first passivation stack 149 is formed on conductive runners 132 and 134 and a dielectric layer 162. An opening is formed by penetrating and defining the first passivation stack using normal lithography technology and dielectric etching technology. A conductive barrier layer 166 is formed on an exposed surface. The opening is filled by blanket-depositing an aluminum layer. An aluminum pad 170 is formed in the opening by patterning/etching steps. A conductive via 172 that contacts conductively with the runner 134 is formed in the opening. A power bus 174 is also formed in the aluminum layer, in the patterning/etching steps identical with that used for forming the aluminum pad.
摘要翻译：解决的问题：为了提供一种用于电力总线互连结构的较少步骤来制造半导体器件的方法。解决方案：第一钝化堆叠149形成在导电流道132和134以及介电层162上。通过使用常规光刻技术和电介质蚀刻技术穿透和限定第一钝化堆叠而形成开口。导电阻挡层166形成在暴露表面上。通过毯子沉积铝层填充开口。通过图案化/蚀刻步骤在开口中形成铝焊盘170。在开口中形成有与流道134导电接触的导电通路172。在与用于形成铝焊盘的图案/蚀刻步骤相同的图案化/蚀刻步骤中，也在铝层中形成电源总线174。版权所有（C）2012，JPO＆INPIT

63. 发明专利

JP2011101392A Mobile communication apparatus with stereoscopic image creating function 审中-公开
标题翻译：具有立体图像创建功能的移动通信装置
公开(公告)号：JP2011101392A
公开(公告)日：2011-05-19
申请号：JP2010275482
申请日：2010-12-10
申请人： Agere Systems Inc , アギアシステムズインコーポレーテッド
发明人： CHAMBERS MICHAEL J , KIESSLING MICHAEL
IPC分类号： H04N5/225 , G03B17/04 , G03B35/08 , H04N13/02
摘要： PROBLEM TO BE SOLVED: To provide a generally accepted mobile communication apparatus, in more detail, a communication apparatus (e.g., radio telephone) capable of creating a stereoscopic image. SOLUTION: In one embodiment, a mobile communication apparatus includes: (1) a body; (2) first and second camera modules rotatably mounted in the body; and (3) a driving structure coupled to the first and the second camera modules and configured to rotate the first and the second camera modules around corresponding first and second rotary axes with respect to the body. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种普遍接受的移动通信装置，更详细地说，能够创建立体图像的通信装置（例如无线电话）。解决方案：在一个实施例中，移动通信设备包括：（1）身体; （2）可旋转地安装在本体中的第一和第二相机模块; 以及（3）驱动结构，其联接到所述第一和第二相机模块并且被配置为使所述第一和第二相机模块围绕相对于所述主体的相应的第一和第二旋转轴线旋转。版权所有（C）2011，JPO＆INPIT

64. 发明专利

JP2010277570A User interface apparatus and method for electronic device touchscreen 审中-公开
标题翻译：用户界面设备和电子设备触摸屏的方法
公开(公告)号：JP2010277570A
公开(公告)日：2010-12-09
申请号：JP2009281153
申请日：2009-12-11
申请人： Agere Systems Inc , アギアシステムズインコーポレーテッド
发明人： FRATTI ROGER A
IPC分类号： G06F3/041 , G06F3/048
CPC分类号： G06F3/167 , G06F3/0488 , G06F3/04886 , G06F3/04895
摘要： PROBLEM TO BE SOLVED: To provide an improved end-user interface configured to input alphameric character information or other information to an electronic device through a display unit touchscreen of a device. SOLUTION: The user interface includes a system for entering end user information into an electronic device. The system includes a display unit with a touchscreen having a plurality of locations. The touchscreen is configured to detect the presence of an end user object proximal to one of the touchscreen locations and to detect when an end user object makes contact with one of the touchscreen locations. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供改进的最终用户界面，其被配置为通过设备的显示单元触摸屏将电视设备输入字符字符信息或其他信息。解决方案：用户接口包括用于将最终用户信息输入电子设备的系统。该系统包括具有多个位置的触摸屏的显示单元。触摸屏被配置为检测靠近触摸屏位置之一的最终用户对象的存在，并且检测最终用户对象何时与触摸屏位置之一接触。版权所有（C）2011，JPO＆INPIT

65. 发明专利

JP2010261931A Circuit device including removable bond pad extension 有权
标题翻译：电路设备，包括可拆卸的BOND PAD EXTENSION
公开(公告)号：JP2010261931A
公开(公告)日：2010-11-18
申请号：JP2009234710
申请日：2009-10-09
申请人： Agere Systems Inc , アギアシステムズインコーポレーテッド
发明人： FRATTI ROGER A
IPC分类号： G01R31/28 , G11C29/12 , H01L21/822 , H01L27/04
CPC分类号： G01R31/31905 , G01R31/2822 , G01R31/2884 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a reusable, removable bond pad extension without giving any additional parasitic effects to an electric circuit device. SOLUTION: A test pad 14 of the bond pad extension is removably coupled to one of electric components of the electric circuit device 22, such as a bond pad 12. Since the test pad of the bond pad extension is disconnected from the electric components when not tested, the test pad of the bond pad extension test does not give any additional parasitic effects to the corresponding electric circuit device. An electric circuit arrangement automatically detects when a test voltage is applied to the test pad of the bond pad extension, then connects the test pad of the bond pad extension in response to the detection of the applied test voltage. When no test voltages are being applied to the test pad of the bond pad extension, the electric circuit arrangement disconnects the test pad from the associated electric components. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供可重复使用的可移除的接合焊盘扩展，而不会给电路设备带来额外的寄生效应。解决方案：接合焊盘延伸部的测试焊盘14可移除地耦合到诸如焊盘12的电路装置22的电气部件中的一个。由于接合焊盘延伸部的测试焊盘与电未测试组件时，焊盘扩展测试的测试焊盘不会对相应的电路设备产生任何额外的寄生效应。电路装置自动检测何时将测试电压施加到接合焊盘延伸部的测试焊盘，然后响应于检测所施加的测试电压而连接焊盘扩展部分的测试焊盘。当没有测试电压施加到接合焊盘扩展的测试焊盘时，电路装置将测试焊盘与相关联的电气部件断开。版权所有（C）2011，JPO＆INPIT

66. 发明专利

JP2010232676A Copper silicide passivation for improved reliability 审中-公开
标题翻译：铜硅氧化物钝化改善可靠性
公开(公告)号：JP2010232676A
公开(公告)日：2010-10-14
申请号：JP2010137862
申请日：2010-06-17
申请人： Agere Systems Inc , アギアシステムズインコーポレーテッド
发明人： BRADSHAW ROBERT WAYNE , GILKES DANIELE , MERCHANT SAILESH M , RAMAPPA DEEPAK A , STEINER KURT G
IPC分类号： H01L21/3205 , H01L21/768 , H01L23/52 , H01L23/522
CPC分类号： H01L21/76843 , H01L21/76849 , H01L21/76856 , H01L21/76864 , H01L21/76867 , H01L21/76886
摘要： PROBLEM TO BE SOLVED: To provide a method of directly passivating exposed Cu surfaces of a Cu interconnect structure by converting the surfaces to copper silicide.
SOLUTION: A silane passivation process, carried out in-situ together with the formation of a subsequent dielectric film, converts the exposed Cu surfaces of the Cu interconnect structure, to copper silicide. The copper silicide suppresses Cu diffusion and electromigration and serves as a barrier material in the regions where contact to further conductive material is made. An entire copper surface of the copper interconnect structure may be silicided, or a local portion of the surface may be silicided after an opening is formed in an overlying dielectric to expose a portion of the copper surface.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供通过将表面转化为硅化铜直接钝化Cu互连结构的暴露的Cu表面的方法。解决方案：与形成随后的电介质膜一起原位进行的硅烷钝化工艺将Cu互连结构的暴露的Cu表面转化为硅化铜。铜硅化物抑制Cu扩散和电迁移，并且在与另外的导电材料接触的区域中用作阻挡材料。铜互连结构的整个铜表面可以被硅化，或者在覆盖电介质中形成开口以暴露铜表面的一部分之后，可以将表面的局部部分硅化。版权所有（C）2011，JPO＆INPIT

67. 发明专利

JP2010062574A Circuit connection architecture of vertical type transistor 有权
标题翻译：垂直型晶体管的电路连接结构
公开(公告)号：JP2010062574A
公开(公告)日：2010-03-18
申请号：JP2009234206
申请日：2009-10-08
申请人： Agere Systems Inc , アギアシステムズインコーポレーテッド
发明人： II-FEN CHAN , JOHN MICHAEL HAGENROSER , MONROE DONALD P
IPC分类号： H01L27/10 , H01L29/78 , H01L21/336 , H01L21/768 , H01L21/8234 , H01L21/8238 , H01L21/8244 , H01L27/092 , H01L27/11
CPC分类号： H01L29/66666 , H01L21/76895 , H01L21/823885 , H01L27/11 , H01L27/1104 , H01L29/7827
摘要： PROBLEM TO BE SOLVED: To provide an architecture for connection between regions in or adjacent a semiconductor layer.
SOLUTION: A semiconductor device 204 includes a first layer 112 of a semiconductor material and a first field effect transistor 180 having a first source/drain region 116 formed in the first layer. A channel region 160 is formed over the first layer and an associated second source/drain region 164 is formed over the channel region. The device also includes a second field effect transistor 190 having a first source/drain region 118 formed in the first layer 114. A channel region 162 is formed over the first layer and an associated second source/drain region 166 is formed over the channel region. A conductive layer 120 comprising a metal is positioned between the first source/drain region of each transistor to conduct a current from one first source/drain region to the other first source/drain region.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供用于在半导体层中或邻近半导体层之间的区域之间的连接的架构。解决方案：半导体器件204包括半导体材料的第一层112和形成在第一层中的第一源/漏区116的第一场效应晶体管180。沟道区域160形成在第一层之上，并且在沟道区域上形成相关联的第二源极/漏极区域164。器件还包括具有形成在第一层114中的第一源极/漏极区域118的第二场效应晶体管190.沟道区域162形成在第一层上，并且相关联的第二源极/漏极区域166形成在沟道区域上。包括金属的导电层120位于每个晶体管的第一源极/漏极区域之间，以将电流从一个第一源极/漏极区域传导到另一个第一源极/漏极区域。版权所有（C）2010，JPO＆INPIT

68. 发明专利

JP2010049696A Linear pipelined processing array for processor element for performing matrix calculationpipelined linear array of processor element for performing matrix computation 有权
标题翻译：用于执行矩阵计算的处理器元件的线性管道处理阵列用于执行矩阵计算的处理器元件的线性阵列
公开(公告)号：JP2010049696A
公开(公告)日：2010-03-04
申请号：JP2009234277
申请日：2009-10-08
申请人： Agere Systems Inc , アギアシステムズインコーポレーテッド
发明人： ALAN JOEL GREENBERGER
IPC分类号： G06F17/16 , G06F1/02 , G06F7/48 , G06F7/52 , G06F9/38 , G06F15/16 , G06F15/80
CPC分类号： G06F7/4806 , G06F1/02 , G06F7/49936 , G06F9/3879 , G06F17/16 , G06F2101/08 , G06F2207/3884
摘要： PROBLEM TO BE SOLVED: To provide an efficient processor element architecture, which is suitable to execute matrix-related operations.
SOLUTION: The linear array includes a head processor element and a set of regular processor elements, the head processor element being interconnected with nearest neighbor processor elements in the array and having a feedback path from a non-neighbor regular processor element back to the head processor element. Each processor element includes an arithmetic circuit for performing multiplication, combining and accumulating operations, and a register file. The head processor element, further, includes a non-linear function generator. Each processor element is pipelined, such that the latency for an arithmetic operation to complete is a multiple of the period, with which new operations can be initiated. A very large instruction word (VLIW) program or other type of program can be used to control the array.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种适用于执行矩阵相关操作的高效处理器元件架构。线性阵列包括头处理器元件和一组常规处理器元件，头处理器元件与阵列中的最近邻处理器元件互连，并且具有从非相邻规则处理器元件返回至头处理器元件。每个处理器元件包括用于执行乘法，组合和累加操作的运算电路和寄存器文件。头处理器元件还包括非线性函数发生器。每个处理器元素被流水线化，使得用于完成的算术运算的等待时间是可以启动新操作的周期的倍数。可以使用非常大的指令字（VLIW）程序或其他类型的程序来控制阵列。版权所有（C）2010，JPO＆INPIT

69. 发明专利

JP2008124442A Method and apparatus for overvoltage detection circuit 有权
标题翻译：用于过电压检测电路的方法和装置
公开(公告)号：JP2008124442A
公开(公告)日：2008-05-29
申请号：JP2007247329
申请日：2007-09-25
申请人： Agere Systems Inc , アギアシステムズインコーポレーテッド
发明人： CRAIN GARY CARLOS , LOPATA DOUGLAS D
IPC分类号： H01L21/822 , H01L23/60 , H01L27/04
CPC分类号： H04M19/00
摘要： PROBLEM TO BE SOLVED: To provide a method and apparatus for embedding a detecting/recording function of over-limit voltage on a silica wafer of an integrated circuit, and detecting, protecting and recording the overvoltage exceeding the pre-set voltage limit. SOLUTION: A detector circuit and a recorder circuit are placed in series or in parallel on an electrical connection between an integrated circuit device and voltage pins connected to an outside power source. When a voltage source is connected and an overvoltage condition is detected, the detector circuit short-circuits the connection while the recorder circuit records the event for later investigation. COPYRIGHT: (C)2008,JPO&INPIT

70. 发明专利

JP2008056232A Automatic turn signalling device 审中-公开
标题翻译：自动转向信号装置
公开(公告)号：JP2008056232A
公开(公告)日：2008-03-13
申请号：JP2007223379
申请日：2007-08-30
申请人： Agere Systems Inc , アギアシステムズインコーポレーテッド
发明人： LANDSCHAFT ASSAF , MAUGUEE LAURENT
IPC分类号： B60Q1/38 , B60R11/02 , G01C21/00 , G08G1/0969
CPC分类号： G01C21/3688 , B60Q1/34 , B60Q1/346 , G01C21/265 , G01C21/3626
摘要： PROBLEM TO BE SOLVED: To provide an automatic turn signalling device and a method of using the same. SOLUTION: In one embodiment, the device is equipped with (1) a navigation module with a map information database for defining a route to a predetermined destination and determining a position of a vehicle, and (2) an associated control module for automatically activating the vehicle's turn signal based on its position. COPYRIGHT: (C)2008,JPO&INPIT

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