专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

51. 实用新型

JPS5582813U 失效
公开(公告)号：JPS5582813U
公开(公告)日：1980-06-07
申请号：JP17102078
申请日：1978-12-01
IPC分类号： H03D1/06 , H03D1/02 , H03D1/18 , H03F1/30

52. 实用新型

JPS54148418U 失效
公开(公告)号：JPS54148418U
公开(公告)日：1979-10-16
申请号：JP4627678
申请日：1978-04-08
IPC分类号： H04B1/16 , H03D1/00 , H03D1/02 , H03G3/20

53. 发明专利

JPS495254A 失效
公开(公告)号：JPS495254A
公开(公告)日：1974-01-17
申请号：JP4307272
申请日：1972-04-28
IPC分类号： H03D1/02 , H03D1/06 , H03D1/18

54. 发明申请

WO99039270A1 POLYNOMIAL CALCULATOR DEVICE, AND METHOD THEREFOR 审中-公开
标题翻译：多项式计算器装置及其方法
公开(公告)号：WO99039270A1
公开(公告)日：1999-08-05
申请号：PCT/US1998/027153
申请日：1998-12-18
IPC分类号： G06G7/20 , G06F7/544 , G06F17/10 , G06F11/10 , G06K9/40 , H03D1/02 , H04L5/12
CPC分类号： G06F7/5443
摘要： A polynomial calculator device is applied to calibrate a sensing device. Preferably the sensing device (100) includes a sensing element (102) with an output coupled to a signal conditioning circuit (104). The signal conditioning circuit (104) is adapted to be highly computationally efficient and operable for compensating for temperature and part-to-part variation on the sensing element output for providing a useable sensor output signal. A calibration method relies on a unique polynomial calculator (118) that is implemented as part of the signal conditioning circuit (104). The sensor is preferably manufactured and packaged prior to calibration so as to avoid any post-calibration processing error. The packaged sensor is calibrated and a number of calibration values are retained in a memory (114) and accessed by the calibration method during sensing element signal processing.
摘要翻译：应用多项式计算器装置校准感测装置。优选地，感测装置（100）包括具有耦合到信号调节电路（104）的输出的感测元件（102）。信号调理电路（104）适于高度计算效率并且可操作用于补偿感测元件输出端上的温度和部件间变化，以提供可用的传感器输出信号。校准方法依赖于被实现为信号调理电路（104）的一部分的唯一多项式计算器（118）。传感器优选在校准之前制造和封装，以避免任何后校准处理错误。校准了封装的传感器，并且在感测元件信号处理期间，将多个校准值保留在存储器（114）中并通过校准方法访问。

55. 发明申请

WO2018128506A3 저전력용 광대역 전치증폭 진폭 편이 변복조 통신 시스템 审中-公开
公开(公告)号：WO2018128506A3
公开(公告)日：2018-07-12
申请号：PCT/KR2018/000369
申请日：2018-01-08
申请人： 윌커슨벤자민피
发明人： 윌커슨벤자민피
IPC分类号： H04L27/02 , H04L25/49 , H03D1/02 , H04L25/03
摘要： 저전력용 광대역 PEASK 변복조 통신 시스템의 변복조 방법과 그 회로의 구성에 관한 것이다. PEASK 변복조 회로의 구성에 있어서, 고속으로 전송할 이진 데이터 신호의 고주파 성분을 강조하기 위해 상기 이진 데이터 신호의 레벨(Level)을 키운t(n) 신호와 상기 이진 데이터 신호를 반전하여 클럭 한 주기인 Tb만큼 지연시킨 t(n-1) 신호를 합성하여 생성한 전치증폭 데이터 신호를 베이스밴드(Baseband)로 진폭 편이 변조하고, 상기 변조된 전치증폭 진폭 변조 베이스밴드(Pre-Emphasis Amplitude Shift Keying Baseband) 신호를 Radio Frequency(RF) Mixer와 송신측 BPF를 통해서 송신하고자 하는 송신주파수로 변환한 PEASK RF 신호를 송신하는 전치증폭 진폭 편이 변조 송신부; 상기 PEASK RF 송신신호가 유선 경로(Wire Channel), 또는 무선 경로(Wireless Channel)를 통해 왜곡되어 전송될 수 있는 전송부; 및 상기 전송부를 통해 왜곡될 수 있는 전송된 신호, 즉 고주파 성분을 강조되어 전송 경로에서 생길 수 있는 고주파 성분의 손실과 수신측 BPF를 통하면서 생길 수 있는 대역폭 제한과 포락선 검파에서 생기는 심볼간섭(ISI)의 문제를 해결하여 비트 에라(Bit Error)를 줄일 수 있는 PEASK RF 수신신호로부터 RF Carrier Mixer와 Baseband BPF를 통해 PEASK Baseband 신호를 생성하여 클럭을 복원하고, 상기 PEASK Baseband 신호로부터 저전력인 비동기 포락선 검파를 통해 복조된 이진 데이터를 상기 클럭에 동기시켜 이진 데이터를 복원하는 비동기 포락선 검파 수신 및 클럭 데이터 복원부를 포함하는 저전력용 광대역 전치증폭 진폭 편이 변복조 통신 시스템이 제공될 수 있다.

56. 发明专利

JP2007537631A Third-order modulation offset variable circuit 审中-公开
公开(公告)号：JP2007537631A
公开(公告)日：2007-12-20
申请号：JP2007511819
申请日：2005-05-12
申请人：シリフィックワイヤレスコーポレーション
发明人：マンク，タジンダー
IPC分类号： H03F3/34 , H03B1/04 , H03C1/06 , H03D1/02 , H03D7/14 , H03F1/32 , H03F3/18 , H03F3/45 , H03K5/01 , H03K5/02 , H03K5/1252 , H04B1/04 , H04B1/12 , H04B1/40 , H04B15/06
CPC分类号： H03K5/1252 , H03D7/1441 , H03D7/1458 , H03D7/1491 , H03F1/3211 , H03F1/3223 , H03F3/24 , H03F3/45183 , H03F2200/372 , H03F2200/87 , H03F2203/45318 , H03F2203/45366 , H03F2203/45498 , H03F2203/45544 , H03K5/02 , H04B1/0475 , H04B1/123 , H04B2001/0441
摘要：三次相互変調を相殺するＣＭＯＳトランスコンダクタを提供する。トランスコンダクタは、トランスコンダクタンス回路及び可変ひずみ回路を含む。トランスコンダクタンス回路は入力電圧を受けて、トランスコンダクタンス成分とＩＭ３成分を有する出力電流を生成する。ひずみ回路は同一の入力電圧を受けて、トランスコンダクタンス回路のＩＭ３成分と同振幅かつ逆位相のＩＭ３成分を有する電流を生成する。制御回路はトランスコンダクタンス回路のＩＭ３の振幅とほぼ等しくなるようにそのＩＭ３成分を調節するようにひずみ回路を調整する。ひずみ回路及びトランスコンダクタンス回路はその出力電流を総和するように構成され、それによりトランスコンダクタンスを比較的変化させずに、ＩＭ３成分を効果的に相殺する。
【選択図】図２

57. 发明专利

JP2005137006A Digital demodulator due to low sampling frequency 审中-公开
标题翻译：具有低采样频率的数字解调器
公开(公告)号：JP2005137006A
公开(公告)日：2005-05-26
申请号：JP2004315941
申请日：2004-10-29
申请人： Stmicroelectronics Sa , Univ D'aix-Marseille I , エステーミクロエレクトロニクスソシエテアノニム , ユニヴェルスィテデクス−マルセイユ Iuniversite D´Aix−Marseille I
发明人： ENGUENT JEAN-PIERRE , ARTIGUE OLIVIER , TETELIN CLAUDE
IPC分类号： H03D1/02 , H04L27/06
CPC分类号： H04L27/06 , H03D1/02
摘要： PROBLEM TO BE SOLVED: To decrease a sampling frequency of an analog-to-digital converter upstream of an amplitude demodulator, and a phase demodulator in some cases. SOLUTION: This digital modulator is provided with an amplitude demodulation method, and a converter for sampling an input signal having its sampling frequency corresponding to three times a demodulation carrier frequency. The demodulator comprises a means for calculating an amplitude A of a symbol of an input signal applying a formula (4), where ei designates the value of a digitized sample of a rank (i) among three successive samples provided by (the) converter, and where (k) designates a constant. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：在一些情况下，降低幅度解调器上游的模数转换器的采样频率和相位解调器。解决方案：该数字调制器具有幅度解调方法，以及用于对其采样频率对应于解调载波频率三倍的输入信号进行采样的转换器。解调器包括用于计算应用公式（4）的输入信号的符号的振幅A的装置，其中ei表示由（）转换器提供的三个连续样本中的等级（i）的数字化样本的值，其中（k）表示常数。版权所有（C）2005，JPO＆NCIPI

58. 发明专利

JP2880843B2 失效
公开(公告)号：JP2880843B2
公开(公告)日：1999-04-12
申请号：JP870192
申请日：1992-01-21
申请人： NIPPON DENKI KK , NIPPON DENKI ENJINIARINGU KK
发明人： OGATA YUKIO , SANO SHOICHI
IPC分类号： H03D1/02 , H04L27/00

59. 发明专利

JPH0730460A TEMPERATURE COEFFICIENT CONTROL RADIO FREQUENCY SIGNAL DETECTOR MECHANISM 失效
公开(公告)号：JPH0730460A
公开(公告)日：1995-01-31
申请号：JP8526294
申请日：1994-04-01
申请人： MOTOROLA INC
发明人： AREKISANDAA DABURIYUU HIITARA , TOROI ERU SUTOTSUKUSUTATSUDO , ROBAATO ERU BAIN
IPC分类号： H04B1/18 , H03D1/02 , H03D1/10 , H03D1/18 , H04B1/40
摘要： PURPOSE: To provide an RF signal detection circuit having high stability against variation over the wide ranges of temperature and power supply voltage. CONSTITUTION: The RF sigal detection circuit 211 has a positive coefficient current source 303, a negative coefficient current source 305 and a current mirror 301 for generating substantially identical compensation mirror currents IM1 , IMP2 by totalizing a positive coefficient current I+ and a negative coefficient current I-. A clamp prevention current mirror 309 outputs the mirror currents Ia1, Ia2 of a compensation current Im2. These currents are inputted to a diode detector 311 consisting of two Schottky diodes to bias respective diodes. One of the two diodes in the detector 311 applies half-wave rectification to an RF feedback signal 212 and generates a power level signal 229 compensated at its temperature and voltage. The signal 229 has a DC level proportional to the output level of an RF output signal.

60. 发明专利

JPS57107615A PEAK DETECTOR 失效
公开(公告)号：JPS57107615A
公开(公告)日：1982-07-05
申请号：JP18028081
申请日：1981-11-10
申请人： HEWLETT PACKARD YOKOGAWA
发明人： DAAWAADO ETSUCHI PURIIBU
IPC分类号： H03D1/00 , G01R19/04 , H03D1/02 , H03D1/06 , H03D1/10
摘要： PURPOSE:To allow a peak detection with high fidelity and broad band, by obtaining a signal relating to the difference between the 1st and 2nd detecting signals, and correcting a voltage drop produced at a diode. CONSTITUTION:Input sections 10, 12 of the 1st detection circuit 4 consisting of diodes 6, 8, a capacitor 20 and a resistor 22 and the 2nd detection circuit consisting of a diode 14, a capacitor 16, and a resistor 18, are connected to an input terminal 15. When an input signal VIN is applied, outputs Vout1, Vout2 obtained at output terminals 24, 26 are expressed as equations, where (VFD1)PK, (VFD2)PK, (VFD3)PK are peak voltage drops produced at diodes 6, 8, 14, and (VIN)PK is a peak voltage of the input signal. The characteristics of the diodes 6, 8, 14 are made equal, the difference (VFD3)PK between the inputs Vout1 and Vout2 is applied to the output Vout2, and the same output signal as the input signal (VIN)PK is obtained.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式