专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

51. 发明申请

US20160072446A1 OPERATIONAL AMPLIFYING CIRCUIT AND SEMICONDUCTOR DEVICE COMPRISING THE SAME 有权
标题翻译：操作放大电路和包含该放大电路的半导体器件
公开(公告)号：US20160072446A1
公开(公告)日：2016-03-10
申请号：US14798675
申请日：2015-07-14
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Ji-Yong JEONG , Jin-Soo KIM , Seung-Hwan BAEK , Ha-Joon SHIN
IPC分类号： H03F1/02 , H03F3/45 , H03F1/34
CPC分类号： H03F3/303 , G09G2310/0291 , G09G2320/0252 , G09G2330/021 , H03F3/45219 , H03F2203/30015 , H03F2203/30021 , H03F2203/45112 , H03F2203/45116 , H03F2203/45244 , H03F2203/45274 , H03F2203/45512
摘要： An operational amplifying circuit are provided. The operational amplifying circuit includes a control circuit, pull-up and pull-down transistors, first and second bias circuits, and a bias voltage generating circuit. The control circuit includes first and second input terminals, and is configured to change, when an input voltage transitions to a first level, a voltage level of a pull-up node and a pull-down node to a second level different from the first level. The pull-up transistor provides a power supply voltage to the output terminal. The pull-down transistor connects the output terminal to a ground voltage. The first bias circuit provides a first bias current to the control circuit. The bias voltage generating circuit generates a bias voltage when the voltage level of at least one of the pull-up and pull-down nodes reaches a threshold voltage level, and the second bias circuit provides a second bias current to the control circuit.
摘要翻译：提供了一种运算放大电路。运算放大电路包括控制电路，上拉和下拉晶体管，第一和第二偏置电路以及偏置电压产生电路。控制电路包括第一和第二输入端，并且被配置为当输入电压转变到第一电平时，将上拉节点和下拉节点的电压电平改变到与第一电平不同的第二电平。上拉晶体管向输出端提供电源电压。下拉晶体管将输出端子连接到接地电压。第一偏置电路向控制电路提供第一偏置电流。当所述上拉和下拉节点中的至少一个的电压电平达到阈值电压电平时，所述偏置电压产生电路产生偏置电压，并且所述第二偏置电路向所述控制电路提供第二偏置电流。

52. 发明申请

US20150270811A1 OPERATIONAL AMPLIFIER AND DRIVING CIRCUIT 有权
标题翻译：操作放大器和驱动电路
公开(公告)号：US20150270811A1
公开(公告)日：2015-09-24
申请号：US14468338
申请日：2014-08-26
申请人： Novatek Microelectronics Corp.
发明人： Ji-Ting Chen
IPC分类号： H03F1/02 , H03F3/45
CPC分类号： H03F3/45237 , H03F3/3028 , H03F3/45 , H03F2200/411 , H03F2203/30021 , H03F2203/45054 , H03F2203/45124 , H03F2203/45646 , H03F2203/45648
摘要： An operational amplifier, including an input stage circuit, an output stage circuit and a constant-gm circuit is provided. The input stage circuit provides a driving voltage according to an input voltage. Input terminals of the output stage circuit receive the driving voltage, and an output terminal of the output stage circuit provides an output voltage according to the driving voltage. The constant-gm circuit includes a constant-gm switch circuit, a current mirror circuit and a current mirror switch circuit. The constant-gm switch circuit controls the operation of the constant-gm circuit. The constant-gm switch circuit allows the current mirror circuit to operate during a transient time when the driving voltage is transited according to the driving voltage, so as to provide a compensated current for the input stage circuit. When the driving voltage is during a non-transient time, the current mirror switch circuit turns off the current mirror circuit.
摘要翻译：提供了一种运算放大器，包括输入级电路，输出级电路和恒流电路。输入级电路根据输入电压提供驱动电压。输出级电路的输入端接收驱动电压，输出级电路的输出端根据驱动电压提供输出电压。恒流电路包括恒定gm开关电路，电流镜电路和电流镜开关电路。恒定开关电路控制恒流电路的工作。恒流开关电路允许电流镜电路在驱动电压根据驱动电压转换的瞬态时间内操作，以便为输入级电路提供补偿电流。当驱动电压处于非瞬时时间时，电流镜开关电路关闭电流镜电路。

53. 发明申请

US20140035665A1 Two-Stage Class AB Operational Amplifier 有权
公开(公告)号：US20140035665A1
公开(公告)日：2014-02-06
申请号：US14002416
申请日：2012-02-27
申请人： Germano Nicollini , Carlo Pinna
发明人： Germano Nicollini , Carlo Pinna
IPC分类号： H03F3/45 , H03H11/12
CPC分类号： H03F3/45264 , H03F3/3028 , H03F3/45 , H03F3/4565 , H03F3/45663 , H03F2200/297 , H03F2200/453 , H03F2200/456 , H03F2203/30015 , H03F2203/30021 , H03F2203/30081 , H03F2203/30114 , H03F2203/45311 , H03F2203/45626 , H03F2203/45648 , H03F2203/45674 , H03F2203/45696 , H03F2203/45702 , H03H11/1213
摘要： The invention relates to a two stage class AB operational amplifier (200) for driving a load (L), comprising at least an input stage (201) comprising differential input terminals (IN+, IN−) and an output terminal (N) to provide a driving signal (VN). In addition, the operational amplifier comprises an output stage (202) comprising a first (A) and second (B) input terminals operatively associated to the input stage (201) to be driven on the basis of said driving signal (VN) and a driving circuit (203) operatively interposed between said input stage (201) and the output stage (202). The operational amplifier is characterised in that the driving circuit (203) comprises a first portion (204) comprising at least one resistor (R1) operatively connected between a first reference potential (Vcc) via a first circuitry block (MT, M11) comprising a PMOS transistor (MT) and a second reference potential (GND) via a second circuitry block (M12, MS) comprising a NMOS transistor (MS). The voltage drop (VR1) on said at least a first resistor (R1) is fixed to a value depending on said first (Vcc) and second (GND) reference potentials and the gate-source voltages of said PMOS (MT) and NMOS (MS) transistors, respectively. The driving circuit further comprises a second portion (205) comprising a first resistor (R2) and a second resistor (R2′) having first terminals connected one another in a common terminal (P) which is connected to the output terminal (N) of the input stage. Said first resistor (R2) has a second terminal connected the first input terminal (A) of the output stage and said second resistor (R2′) has a second terminal connected to the second input terminal (B) of the output stage. Said second terminals (A, B) of the first (R2) and second resistors (R2′) are connected to the first reference potential (Vcc) via a third circuitry block (MW, M9) and to the second reference potential (GND) via a fourth circuitry block (M10, MX), respectively. Said third (MW, M9) and fourth (M10, MX) circuitry blocks are arranged to be operatively connected to said first (MT, M11) and second (M12, MS) circuitry blocks, respectively, so that the voltage drop (VR2) between the second terminals (A, B) is substantially equal to the value of the voltage drop (VR1) across said at least one resistor (R1).

54. 发明授权

US08638250B2 Amplifier, fully-differential amplifier and delta-sigma modulator 有权
标题翻译：放大器，全差分放大器和Δ-Σ调制器
公开(公告)号：US08638250B2
公开(公告)日：2014-01-28
申请号：US13590491
申请日：2012-08-21
申请人： Chen-Yen Ho , Chi-Lun Lo , Hung-Chieh Tsai , Yu-Hsin Lin
发明人： Chen-Yen Ho , Chi-Lun Lo , Hung-Chieh Tsai , Yu-Hsin Lin
IPC分类号： H03M3/00
CPC分类号： H03F1/0205 , H03F3/265 , H03F3/30 , H03F3/3023 , H03F3/45071 , H03F3/45179 , H03F3/45183 , H03F3/45475 , H03F2200/18 , H03F2203/30021 , H03F2203/30033 , H03F2203/45022 , H03F2203/45134 , H03F2203/45138 , H03M3/39 , H03M3/50
摘要： An amplifier, a fully-differential amplifier and a delta-sigma modulator are disclosed. The disclosed amplifier includes a front-end gain stage, an AC-coupled push-pull output stage and a compensation circuit. The compensation circuit is coupled between the front-end gain stage and an output terminal of the amplifier. The AC-coupled push-pull output stage uses an AC-coupled capacitor (which is a passive two terminal electrical component rather than a stray or parasitic capacitance of a transistor) to couple the front-end gain stage to a gate of a top or bottom transistor of a push-pull structure introduced in the AC-coupled push-pull output stage, and uses a resistance component to couple a gate of the top or bottom transistor (depending on which one is coupled to the AC-coupled capacitor) to a bias voltage level.
摘要翻译：公开了放大器，全差分放大器和Δ-Σ调制器。所公开的放大器包括前端增益级，AC耦合推挽输出级和补偿电路。补偿电路耦合在前端增益级与放大器的输出端之间。交流耦合推挽输出级使用交流耦合电容器（其是无源双端电气元件而不是晶体管的杂散或寄生电容），以将前端增益级耦合到顶部的栅极或引入到AC耦合推挽输出级中的推挽结构的底部晶体管，并且使用电阻分量将顶部或底部晶体管的栅极（取决于耦合到AC耦合电容器的栅极）耦合到偏置电压电平。

55. 发明申请

US20130194039A1 DIFFERENTIAL AMPLIFIER CIRCUIT WITH ULTRALOW POWER CONSUMPTION PROVIDED WITH ADAPTIVE BIAS CURRENT GENERATOR CIRCUIT 有权
标题翻译：具有自适应偏置电流发生器电路的超低功耗的差分放大器电路
公开(公告)号：US20130194039A1
公开(公告)日：2013-08-01
申请号：US13752919
申请日：2013-01-29
申请人： SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTER
发明人： Tetsuya HIROSE , Yuji OSAKI , Yumiko TSURUYA , Osamu KOBAYASHI
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F1/0261 , H03F3/3028 , H03F3/45183 , H03F2203/30021 , H03F2203/45244 , H03F2203/45454 , H03F2203/45626
摘要： A differential amplifier circuit includes a differential operational amplifier that includes a differential pair circuit and operates based on a constant bias current supplied from a bias current source circuit, and the differential amplifier circuit includes a bias current generator circuit. A current monitor circuit detects two currents flowing through the differential pair circuit in correspondence with differential input voltages inputted to the differential pair circuit, and detect a minimum current of the two currents for a difference voltage of the differential input voltages as a monitored current. A current comparator circuit compares the monitored current with the constant bias current. A current amplifier circuit amplifies a voltage corresponding to the comparison result, and controls currents flowing through the differential pair circuit based on an amplified voltage, and the bias current generator circuit performs negative feedback adaptive control such that the bias current increases as the monitored current decreases.
摘要翻译：差分放大器电路包括差分运算放大器，其包括差分对电路，并且基于从偏置电流源电路提供的恒定偏置电流进行操作，并且差分放大器电路包括偏置电流发生器电路。电流监视电路检测对应于输入到差分对电路的差分输入电压流过差分对电路的两个电流，并且检测差分输入电压的差分电压的两个电流的最小电流作为监视电流。电流比较器电路将监控的电流与恒定偏置电流进行比较。电流放大器电路放大对应于比较结果的电压，并且基于放大的电压控制流过差分对电路的电流，并且偏置电流发生器电路执行负反馈自适应控制，使得偏置电流随监视电流减小而增加。

56. 发明授权

US08159302B2 Differential amplifier circuit 有权
标题翻译：差分放大电路
公开(公告)号：US08159302B2
公开(公告)日：2012-04-17
申请号：US12975824
申请日：2010-12-22
申请人： Sung-Yau Yeh , Kuo-Jen Hsu
发明人： Sung-Yau Yeh , Kuo-Jen Hsu
IPC分类号： H03F3/45
CPC分类号： H03F3/45219 , H03F1/0205 , H03F3/3028 , H03F2200/297 , H03F2203/30021
摘要： A differential amplifier circuit includes: P-type and N-type differential input units outputting respectively first and second outputs in response to first and second input voltages; a P-type current mirror circuit driven by the second output; an N-type current mirror circuit driven by the first output; an output unit outputting an output voltage in response to control outputs from the P-type and N-type current mirror circuits; a first sub-current source including first and second P-type transistors connected in series; and a second sub-current source including first and second N-type transistors connected in series. Control ends of the second P-type and second N-type transistors receive the control outputs from the P-type and N-type current mirror circuits, respectively. Control ends of the first P-type and first N-type transistors are coupled to a common node between the first and second P-type transistors, and a common node between the first and second N-type transistors, respectively.
摘要翻译：差分放大电路包括：P型和N型差分输入单元，响应于第一和第二输入电压分别输出第一和第二输出; 由第二输出驱动的P型电流镜电路; 由第一输出驱动的N型电流镜电路; 输出单元响应于来自P型和N型电流镜电路的控制输出而输出输出电压; 包括串联连接的第一和第二P型晶体管的第一子电流源; 以及包括串联连接的第一和第二N型晶体管的第二子电流源。第二P型和第二N型晶体管的控制端分别从P型和N型电流镜电路接收控制输出。第一P型和第N型晶体管的控制端分别耦合到第一和第二P型晶体管之间的公共节点，以及第一和第二N型晶体管之间的公共节点。

57. 发明申请

US20120013400A1 Current Control Circuit, Class AB Operational Amplifier System and Current Control Method 有权
标题翻译：电流控制电路，AB类运算放大器系统和电流控制方法
公开(公告)号：US20120013400A1
公开(公告)日：2012-01-19
申请号：US12895830
申请日：2010-09-30
申请人： Ming-Hung Chang , Che-Hung Lin
发明人： Ming-Hung Chang , Che-Hung Lin
IPC分类号： H03F3/68 , H03G3/00
CPC分类号： H03F3/45183 , H03F1/0233 , H03F1/0272 , H03F3/3022 , H03F3/45632 , H03F2200/78 , H03F2203/30021 , H03F2203/45681
摘要： A current control circuit for controlling a bias current of a class AB operational amplifier includes: a low current source, for generating a low bias current; a high current source, for generating a high bias current, which is greater than the low bias current; and a comparing and selecting unit, coupled to an output terminal of the class AB operational amplifier, for selecting one of the low bias current and the high bias current to output as the bias current according to an output voltage of the class AB OP.
摘要翻译：用于控制AB类运算放大器的偏置电流的电流控制电路包括：用于产生低偏置电流的低电流源; 高电流源，用于产生大于低偏置电流的高偏置电流; 以及比较选择单元，其耦合到AB类运算放大器的输出端，用于根据AB类的输出电压选择低偏置电流和高偏置电流之一作为偏置电流输出。

58. 发明授权

US07528660B2 Power amplifier circuit and test apparatus 失效
标题翻译：功率放大器电路和测试仪器
公开(公告)号：US07528660B2
公开(公告)日：2009-05-05
申请号：US11648126
申请日：2006-12-28
申请人： Satoshi Kodera
发明人： Satoshi Kodera
IPC分类号： H03F3/26
CPC分类号： H03F3/183 , H03F3/3076 , H03F2203/30021 , H03F2203/30078 , H03F2203/30111
摘要： There is provided a power amplifier circuit that applies an output voltage according to a given input voltage to a load, the power amplifier circuit includes an amplifying section of which an output port is connected to the load and that outputs the output voltage according to the input voltage, a source-side power source path that supplies an electric current output from the amplifying section via the output port to the amplifying section, a sink-side power source path that supplies an electric current drawn from the amplifying section via the output port to the amplifying section, a source-side capacitor that is connected between the output port of the amplifying section and the source-side power source path, and a sink-side capacitor that is connected between the output port of the amplifying section and the sink-side power source path.
摘要翻译：提供了一种功率放大器电路，其将根据给定输入电压的输出电压施加到负载，功率放大器电路包括放大部分，其输出端口连接到负载，并且根据输入端输出输出电压电压，源极侧电源路径，其将从放大部分经由输出端口输出的电流提供给放大部分;宿侧电源路径，其将从放大部分经由输出端口抽取的电流提供给放大部分，连接在放大部分的输出端口和源极侧电源路径之间的源极侧电容器和连接在放大部分的输出端口与吸收侧电容器之间的吸收侧电容器，侧电源路径。

59. 发明授权

US07403072B2 Integrated circuit devices having a control circuit for biasing an amplifier output stage and methods of operating the same 有权
标题翻译：具有用于偏置放大器输出级的控制电路的集成电路器件及其操作方法
公开(公告)号：US07403072B2
公开(公告)日：2008-07-22
申请号：US11271058
申请日：2005-11-10
申请人： Jae Hyuck Woo , Kyu Young Chung
发明人： Jae Hyuck Woo , Kyu Young Chung
IPC分类号： H03F3/26
CPC分类号： H03F3/45475 , H03F1/0261 , H03F1/0277 , H03F3/211 , H03F3/3022 , H03F3/42 , H03F3/72 , H03F2203/30021 , H03F2203/7206
摘要： An integrated circuit device includes an amplifier circuit that generates an output voltage. A bias control circuit is configured to generate a bias control voltage or the output voltage at an output thereof based on a state of a control signal. An output stage driver circuit that is responsive to the voltage generated at the output of the bias control circuit.
摘要翻译：集成电路器件包括产生输出电压的放大器电路。偏置控制电路被配置为基于控制信号的状态产生偏置控制电压或其输出处的输出电压。输出级驱动电路，其响应于在偏置控制电路的输出处产生的电压。

60. 发明申请

US20070164974A1 OUTPUT BUFFER WITH IMPROVED OUTPUT DEVIATION AND SOURCE DRIVER FOR FLAT PANEL DISPLAY HAVING THE OUTPUT BUFFER 有权
标题翻译：具有改进的输出缓冲器的输出缓冲器和用于具有输出缓冲器的平板显示器的源驱动器
公开(公告)号：US20070164974A1
公开(公告)日：2007-07-19
申请号：US11619709
申请日：2007-01-04
申请人： Dong-ryul Chang , Soo-cheol Lee
发明人： Dong-ryul Chang , Soo-cheol Lee
IPC分类号： G09G3/36
CPC分类号： H03F3/4521 , G09G3/3648 , G09G3/3688 , H03F3/3001 , H03F3/45183 , H03F2203/30021 , H03F2203/30081 , H03F2203/30114 , H03F2203/45366 , H03F2203/45684
摘要： An output buffer with an improved output deviation and a source driver of a flat panel display which employs the output buffer wherein the output buffer includes a first input terminal to which a first differential input signal is applied, a second input terminal to which a second differential input signal is applied, an output terminal that generates an output signal based on the second differential input signal and feeds back the output signal to the first input terminal as the first input signal, a first power supply terminal to which a first power supply voltage is applied, a second power supply terminal to which a second power supply voltage is applied, and an amplification unit that amplifies a difference between the first differential input signal and the second differential input signal, pulls up the output signal to the first power supply voltage or pulls down the output signal to the second power supply voltage, and includes a plurality of transistors.
摘要翻译：具有改进的输出偏差的输出缓冲器和使用输出缓冲器的平板显示器的源极驱动器，其中输出缓冲器包括施加有第一差分输入信号的第一输入端，第二差分输入端施加输入信号，输出端子，其基于第二差分输入信号生成输出信号，并将输出信号反馈到作为第一输入信号的第一输入端子;第一电源端子，第一电源电压为施加第二电源电压的第二电源端子和放大第一差分输入信号和第二差分输入信号之间的差的放大单元，将输出信号拉至第一电源电压或将输出信号下拉到第二电源电压，并且包括多个晶体管。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式