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51. 发明公开

EP1770854A3 Voltage controlled oscillator circuitry 审中-公开
标题翻译：压控振荡器
公开(公告)号：EP1770854A3
公开(公告)日：2009-12-16
申请号：EP06017084.2
申请日：2006-08-16
申请人： Altera Corporation
发明人： Kwasniewski, Tad , Bereza, William , Wang, Shoujun , Usama, Muhammad
IPC分类号： H03B19/00 , H03B5/12 , H03L7/099
CPC分类号： H03L7/0995 , H03B5/1212 , H03B5/1228 , H03B5/1253 , H03B19/00 , H03B2200/0078 , H03L7/099 , H03L2207/06
摘要： Voltage controlled oscillator ("VCO") circuitry includes LC tank or ring VCO circuitry and frequency divider circuitry that divides the frequency output by the oscillator circuitry by a selectable integer factor that is at least 2 in the case of a ring oscillator or at least 4 in the case of an LC tank oscillator. This arrangement allows the oscillator circuitry to operate at frequencies that are higher than the desired final output frequencies, which has such advantages as reducing the size and power consumption of the oscillator circuitry, and allowing the circuitry as a whole to have a wide range of operating frequencies while reducing the frequency range over which the oscillator circuitry may be required to operate.

52. 发明公开

EP1297616A1 A QUADRATURE MICROWAVE OSCILLATOR WITH ISOLATING AMPLIFIER 审中-公开
标题翻译：与隔离放大器求积微波振荡器
公开(公告)号：EP1297616A1
公开(公告)日：2003-04-02
申请号：EP01945288.7
申请日：2001-06-19
申请人： Koninklijke Philips Electronics N.V.
发明人： VAN DER TANG, Johan, D. , KASPERKOVITZ, Wolfdietrich, G
IPC分类号： H03B5/20 , H03B5/12
CPC分类号： H03B5/20 , H03B5/04 , H03B5/1209 , H03B5/1221 , H03B5/1231 , H03B5/1243 , H03B2200/0078
摘要： Described is a quadrature HF ring oscillator (1) comprising at least two cascaded filters (2, 3) each having a filter output (O1, O2) to be coupled to a quadrature load (ZI, ZQ), each of the two filters (2, 3) comprises an isolating amplifier (T5-T8) coupled between the filter output (O1, O2) and the quadrature load (ZI, ZQ). Advantageously the isolating amplifier forms a buffer between the oscillating core of the oscillator oscillating in the GHz range and the quadrature load, so that output frequency and amplitude are less influenced by the load.

53. 发明公开

EP0654894A1 Integrated oscillator circuits 失效
标题翻译： Integrierte Oszillatorschaltungen。
公开(公告)号：EP0654894A1
公开(公告)日：1995-05-24
申请号：EP94308389.9
申请日：1994-11-14
申请人： PLESSEY SEMICONDUCTORS LIMITED
发明人： Lawton, Rodney James
IPC分类号： H03B5/24 , H03K3/282
CPC分类号： H03K3/2821 , H03B5/24 , H03B27/00 , H03B2200/0078
摘要： A stable sine wave oscillator circuit comprising two pairs of cross-coupled bipolar transistors in cascode, the collector electrodes of the transistors of each pair being interconnected by way of respective capacitors. Output signals in phase quadrature may be obtained from across these two capacitors.
摘要翻译：一个稳定的正弦波振荡器电路，包括两对共模共轭交叉耦合双极晶体管，每对晶体管的集电极通过相应的电容器相互连接。可以从这两个电容器中获得相位正交的输出信号。

54. 发明授权

EP0448835B1 Phasenteiler 失效
标题翻译：相分离器。
公开(公告)号：EP0448835B1
公开(公告)日：1994-10-12
申请号：EP90125313.8
申请日：1990-12-22
申请人： TEMIC TELEFUNKEN microelectronic GmbH
发明人： Tränkle, Günther, Dipl.-Phys.
IPC分类号： H03D1/22 , H03B27/00 , H03K5/15
CPC分类号： H03D7/165 , H03B27/00 , H03B2200/0064 , H03B2200/0078 , H03D1/2245 , H03D5/00 , H03D2200/0019

55. 发明公开

EP0401771A2 Schaltungsanordnung zur Frequenzumsetzung 失效
标题翻译： Schaltungsanordnung zur Frequenzumsetzung。
公开(公告)号：EP0401771A2
公开(公告)日：1990-12-12
申请号：EP90110655.9
申请日：1990-06-06
申请人： TEMIC TELEFUNKEN microelectronic GmbH
发明人： Tränkle, Günter, Dipl.-Ing. , Deckenbach, Gottfried, Dipl.-Ing. (FH)
IPC分类号： H03D1/22 , H03B27/00
CPC分类号： H03K5/15 , H03B2200/0078 , H03D1/2245 , H03D5/00 , H03D7/1458 , H03D7/165 , H03D2200/0019
摘要： Zur Frequenzumsetzung eines Nutzsignals mit einem Überlagerungssignal nach dem Prinzip der Quadratursignalverarbeitung in einem Modulator oder Demodulator, wird zur Erzeugung von Quadratur-Überlagerungssignalen ein Überlagerungssignalgenerator (TG) mit einem Regelkreis zur Stabilisierung der 90°-Phasenverschiebung der beiden Ouadratur-Überlagerungssignale (Tl, TQ) vorgesehen.
Der Überlagerungssignalgenerator enthält einen Verstärker (LV) der durch ein Oszillatorsignal (LO) angesteuert ist. Über einen weiteren Regelkreis mit einem Symmetriedetektor (SD) wird das Tastverhältnis des Verstärkerausgangssignals detektiert und auf ein Tastverhältnis von 0,5 geregelt.
摘要翻译：本发明描述了一种用于通过正交外差信号进行频率转换的电路装置，其在非常高的频率下也表现出非常小的正交误差，并且可以与一些外部电路单片集成。 ... ...

56. 发明公开

EP0371549A1 Controllable quadrature oscillator 失效
标题翻译： Regelbarer Quadraturoszillator。
公开(公告)号：EP0371549A1
公开(公告)日：1990-06-06
申请号：EP89202963.8
申请日：1989-11-22
申请人： Philips Electronics N.V.
发明人： Kasperkovitz, Wolfdietrich Georg
IPC分类号： H03B5/20
CPC分类号： H03B5/20 , H03B5/24 , H03B27/00 , H03B2200/0062 , H03B2200/0066 , H03B2200/0078 , H03B2201/02
摘要： Controllable quadrature oscillator having a pair of oscillator outputs (01, 02) for supplying a pair of phase quadrature oscillator signals, and a cascade circuit of two quadrature sections (A, B), which circuit is incorporated in a regenerative loop, one (B) of the two quadrature sections being arranged between the two oscillator outputs and realising a 90 o phase shift in the regenerative state of the loop. In order to increase the frequency control range of such a controllable quadrature oscillator and to provide the possibility of integration, at least the said quadrature section comprises a cascade circuit of two stages (B1, B2) arranged in a signal path between an input terminal and an output terminal, one stage (B1) comprising a first amplifier having a low-pass characteristic and the other stage comprising a second amplifier (B2) having a low-pass characteristic, said second amplifier having a feedback path, and the gain of at least one of the two amplifiers being controllable for controlling the frequency of the pair of phase quadrature oscillator signals.
摘要翻译：具有用于提供一对相位正交振荡器信号的一对振荡器输出（01,02）的可控正交振荡器和两个正交部分（A，B）的级联电路，该电路并入再生回路中，一个（B ）被布置在两个振荡器输出之间并且在回路的再生状态下实现90°的相移。为了增加这种可控正交振荡器的频率控制范围并且提供集成的可能性，至少所述正交部分包括布置在输入端和输入端之间的信号路径中的两级（B1，B2）的级联电路输出端子，一级（B1），包括具有低通特性的第一放大器，另一级包括具有低通特性的第二放大器（B2），所述第二放大器具有反馈路径，并且在两个放大器中的至少一个可控制以控制该对相位正交振荡器信号的频率。

57. 发明授权

EP0225218B1 Procédé de synthèse de fréquence, et appareil synthétiseur utilisant ce procédé 失效
标题翻译：使用这种方法的频率合成方法和合成装置
公开(公告)号：EP0225218B1
公开(公告)日：1990-05-16
申请号：EP86402345.2
申请日：1986-10-20
申请人： THOMSON-CSF
发明人： Kantorowicz, Gérard
IPC分类号： H03B19/00 , H04L27/12
CPC分类号： H04L27/2025 , H03B19/00 , H03B27/00 , H03B2200/0072 , H03B2200/0078
摘要： 1. A method of frequency synthesis which consists of multiplying two signals which are in quadrature relative to a carrier frequency Fc respectively by two signals which are in quadrature in relation to a jump frequency Fr and of adding the results of these two multiplying operations in order to obtain a signal of the frequency Fc incremented by the jump value Fr with a positive or negative prefix sign in accordance with that belonging to the quadrature signals relative to this jump frequency, characterized in that the said jump frequency signals correspond to a base frequency Fr multiplied by a coefficient "n" to which there may be attributed by control any integral value desired for operation and comprised between the minimum value of 1 and a predetermined value of N, the jump frequency thus corresponding to the said base frequency or indeed to the n-order harmonic, the said jump frequency being supplied by performing at least one set of operations of multiplication and summation, each set of operations comprising the multiplication of a first pair of jump quadrature signals (S1 and S2j) of a frequency m Fr (with m being an integral equal to or greater than 1) by a second pair of quadrature jump signals (S3j and S4j) with a frequency of p Fr (with p being an integral equal to or greater than 1) and summating the results of such multiplication operations with the given prefix sign in order to provide a third pair of quadrature jump signals (S5j and S6j) with a frequency of (m+p)Fr, said set of operations of multiplication and summation being repeated if necessary replacing the "m" coefficient by the "m+p" coefficient which has just been produced and possibly modifying the "p" coefficient in such a manner as to arrive at the +- n Fr frequency desired for the jump signals to be multiplied by the said carrier frequency signals (sin Fc and cos Fc ).
摘要翻译： 1.一种频率合成方法，其包括通过相对于跳跃频率Fr正交的两个信号分别相对于载波频率Fc相乘的两个信号相乘，并且按顺序将这两个乘法运算的结果相加根据属于相对于该跳跃频率的正交信号的正或负前缀符号来获得增加了跳跃值Fr的频率Fc的信号，其特征在于，所述跳频信号对应于基本频率Fr 乘以系数“n”，通过控制可以归因于操作所需的任何积分值，并且包括在最小值1和预定值N之间，因此对应于所述基本频率的跳跃频率或者实际上与 n阶谐波，所述跳跃频率通过执行乘法和求和的至少一组操作来提供，ea ch组操作，包括通过第二对正交跳转信号（S3j和S4j）乘以频率m Fr（m等于或大于1的积分）的第一对跳跃正交信号（S1和S2j）的乘法），其频率为p Fr（p为整数等于或大于1），并且将这种乘法运算的结果与给定的前缀符号相加，以便提供第三对正交跳转信号（S5j和S6j）与（m + p）Fr的频率，如果需要，则必须将“m”系数替换为刚刚产生的“m + p”系数，并且可能将“p”系数修改为这样一种方式来达到跳频信号所需的+ -n Fr频率乘以所述载波频率信号（sin Fc和cos Fc）。

58. 发明公开

EP0319851A1 Digitale Phaseneinstellung für digital generierte Signale 失效
标题翻译： Digitale Phaseneinstellung数字总成信号。
公开(公告)号：EP0319851A1
公开(公告)日：1989-06-14
申请号：EP88120101.6
申请日：1988-12-02
申请人： TELEFUNKEN Sendertechnik GmbH
发明人： Kriegge, Gerd-Rudolf, Dipl.-Ing.
IPC分类号： H03L7/08 , H03L7/18 , H04H1/00 , H03B27/00
CPC分类号： H03L7/18 , H03B27/00 , H03B2200/0078 , H03L7/081 , H04H20/34 , H04H2201/13
摘要： Die Erfindung betrifft eine Anordnung zum Einstellen der Phase eines oder mehrerer digital generierter Signale mit einem vorzugsweise digitalen Phasenstellglied (5, 6, 11, 12), bei der die Einstellung der Phase digital erfolgt. Die Phase ist zwischen 0 und m2π in Einheiten von 2π/n oder Bruchteilen davon beliebig einstellbar mit m, n gleich ganzen positiven Zahlen und m≧1 und n≧2.
摘要翻译：本发明涉及一种用于通过数字相位控制部件（5,6,11,12）控制一个或多个数字产生的信号的相位的装置，其中以数字方式执行相位控制。相位可以根据需要设置在0和m2 pi之间，单位为2 pi / n或其分数，其中m，n为积分正数，m> / = 1且n> / = 2。

59. 发明公开

KR1020090073173A 전압 제어 발진기 无效
标题翻译：电压控制振荡器
公开(公告)号：KR1020090073173A
公开(公告)日：2009-07-02
申请号：KR1020097007958
申请日：2007-09-10
申请人： 아이티아이 스코틀랜드 리미티드
发明人： 윌슨데이비드
IPC分类号： H03B5/08 , H03B5/06 , H03B5/12
CPC分类号： H03L3/00 , H03B5/06 , H03B5/1212 , H03B5/1221 , H03B5/1228 , H03B5/1243 , H03B27/00 , H03B2200/0078
摘要： A voltage controlled oscillator comprises first and second voltage controlled oscillator cores (4, 6) for generating I and Q quadrature components respectively. Each of the voltage controlled oscillator cores comprises an inductor (41, 61). A connecting member (70) is electrically coupled to each of said inductors, thereby forcing the same common mode level in the I and Q core of the VCO. The invention has the advantage of providing a simple method of ensuring that the same common mode level is used in the I and Q cores of a cross-coupled VCO, and is particularly advantageous at high operating frequencies. The invention also has the advantage of overcoming potential start up issues, and reduces the sensitivity to device mismatch effects which become more apparent when designing in small geometry processes such as 130nm CMOS, as the smaller device sizes can often result in greater mismatches.
摘要翻译：压控振荡器包括用于分别产生I和Q正交分量的第一和第二压控振荡器磁芯（4,6）。每个压控振荡器芯包括电感器（41,61）。连接构件（70）电耦合到每个所述电感器，从而在VCO的I和Q核中强制相同的共模电平。本发明的优点在于提供一种确保在交叉耦合VCO的I和Q核中使用相同共模电平的简单方法，并且在高工作频率下是特别有利的。本发明还具有克服潜在的启动问题的优点，并且降低了在诸如130nm CMOS的小几何处理中设计时变得更加明显的器件失配效应的灵敏度，因为较小的器件尺寸通常会导致更大的失配。

60. 发明公开

KR1020090031260A 위상 및 진폭 불일치 보상기를 갖는 ＬＣ 직교 발진기 有权
标题翻译：具有相位和幅度误差补偿器的LC QUADRATURE振荡器
公开(公告)号：KR1020090031260A
公开(公告)日：2009-03-25
申请号：KR1020080091480
申请日：2008-09-18
申请人： 삼성전기주식회사
发明人： 변상진 , 이창호 , 김학선 , 라스카조이
IPC分类号： H03B27/00 , H03B5/10
CPC分类号： H03B27/00 , H03B5/1215 , H03B5/1228 , H03B5/1243 , H03B2200/0078
摘要： An LC quadrature oscillator having phase and an amplitude mismatch compensator is provided to compensate mismatch of the clock and phase of I/Q signal by compensating mismatch between two LC resonant. An LC quadrature oscillator includes a first LC generator(110), a second LC generator(120), and a mismatch compensator(125). The first LC generator produce at lest a first clock signal(CLK90,CLK270), and the second LC generator generates at least clock signal(CLK0,CLK180). At least one first clock signal and at least one second clock signal form an I/Q clock signal, and the first and the second generator are intersected with each other. A mismatch compensator compensates the phase and amplitude of the I/Q clock signal while having an amplitude compensator(130), which detects the first clock signal and the second clock signal.
摘要翻译：提供具有相位和幅度失配补偿器的LC正交振荡器，以通过补偿两个LC谐振之间的失配来补偿I / Q信号的时钟和相位的失配。 LC正交振荡器包括第一LC发生器（110），第二LC发生器（120）和不匹配补偿器（125）。第一个LC发生器产生第一个时钟信号（CLK90，CLK270），第二个LC发生器至少产生时钟信号（CLK0，CLK180）。至少一个第一时钟信号和至少一个第二时钟信号形成I / Q时钟信号，并且第一和第二发生器彼此相交。失配补偿器补偿I / Q时钟信号的相位和幅度，同时具有检测第一时钟信号和第二时钟信号的幅度补偿器（130）。

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