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51. 发明专利

GB2438286B Phase selector for data transmitting device 未知
公开(公告)号：GB2438286B
公开(公告)日：2008-06-25
申请号：GB0708050
申请日：2007-04-25
申请人： REALTEK SEMICONDUCTOR CORP
发明人： HSU CHENG-CHUNG
IPC分类号： H04L7/033
摘要： A phase selector is disclosed. The phase selector is utilized for outputting an output clock to a flip-flop according to an input data signal latched by the flip-flop. The phase selector includes: a clock phase adjustor, for adjusting the delay of an input clock to generate a first clock and a second clock, wherein the clock phases of the first clock and the second clock are different; a phase detector, for detecting phase relation between the input data signal and the first clock to generate a detecting signal; a decision circuit, coupled to the phase detector, for generating a selecting signal according to the detecting signal; and a selection circuit, coupled to the decision circuit, for selecting the input clock or the second clock to generate the output clock to the flip-flop according to the selecting signal.

52. 发明专利

GB2436405B ESD protection circuit and method thereof 未知
公开(公告)号：GB2436405B
公开(公告)日：2008-04-09
申请号：GB0705638
申请日：2007-03-23
申请人： REALTEK SEMICONDUCTOR CORP
发明人： CHEN TZUNG-MING , CHAN KA-UN , LIN YING-HSI
IPC分类号： H01L27/02 , H02H9/04
摘要： An electrostatic discharge (ESD) protection circuit and method thereof is provided. The circuit comprises a clamping circuit, an inductor, a diode and a diode string. In order for a voltage swing of an output voltage to get rid of the influence of the ESD protection circuit, the number of diodes in the diode string must be greater than or equal to the voltage swing divided by the turn-on voltage of the diodes.

53. 发明专利

GB2430565B Self-calibrating continuous-time delta-sigma modulator 未知
公开(公告)号：GB2430565B
公开(公告)日：2008-03-19
申请号：GB0618527
申请日：2006-09-20
申请人： REALTEK SEMICONDUCTOR CORP
发明人： HSIEH HONG-YEAN , LIN CHIA-LIANG
IPC分类号： H03M1/10 , H03M3/00
摘要： A self-calibrating continuous-time delta-sigma modulator determines whether time constants of its internal integrators are too large or too small by injecting a calibrating sequence into the modulator and examining a correlation between the calibrating sequence and a modulator output sequence. Then the time constants of the internal integrators are adjusted accordingly. In one embodiment, the correlation is exploited based on matching a noise transfer function of the modulator using an adaptive filter based on a least mean square (LMS) algorithm.

54. 发明专利

DE102007021975A1 未知
公开(公告)号：DE102007021975A1
公开(公告)日：2008-01-24
申请号：DE102007021975
申请日：2007-05-10
申请人： REALTEK SEMICONDUCTOR CORP
发明人： LEE CHAO-CHENG , TZENG TZU-CHIEN
IPC分类号： H03K19/094 , H03K19/0948
摘要： A power managing apparatus is utilized to control a first supply voltage, a second supply voltage, and a substrate voltage of a digital circuit. The power managing apparatus includes a voltage generating device, for generating a first reference voltage and a second reference voltage; and a voltage switching device, coupled to the voltage generating device, for adjusting the first supply voltage, the second supply voltage, and the substrate voltage. When the digital circuit operates in a first operating mode, the voltage switching device outputs the second reference voltage to be the first supply voltage and the substrate voltage; and when the digital circuit operates in a second operating mode, the voltage switching device outputs the first reference voltage to be the first supply voltage, and outputs the second reference voltage to be the second supply voltage.

55. 发明专利

GB2436952A Switched gain low noise amplifier 未知
公开(公告)号：GB2436952A
公开(公告)日：2007-10-10
申请号：GB0706495
申请日：2007-04-03
申请人： REALTEK SEMICONDUCTOR CORP
发明人： LIN YING-YAO , LEE CHAO-CHENG , LIN YING-HSI
IPC分类号： H03G1/00 , H03F1/32
摘要： The disclosed amplifier includes a bias voltage adjusting circuit 302 and an amplifier circuit 304. The voltage adjusting circuit includes switched current sources 3021 which pass a controllable current through transistor Mc (3022). The amplifying circuit includes amplifying transistors M1 to Mk and switching transistors S1 to Sk. The switching transistors selectively connect the amplifying transistors to load 3041. The circuit provides improved stability, input impedance and saturation characteristics when switched between high and low gain.

56. 发明专利

DE102004005081B4 未知
公开(公告)号：DE102004005081B4
公开(公告)日：2007-09-06
申请号：DE102004005081
申请日：2004-02-02
申请人： REALTEK SEMICONDUCTOR CORP
发明人： LIN CHIA-LIANG
IPC分类号： H03M1/44 , H03M1/08 , H03M1/16
摘要： An analog-to-digital converter (ADC) includes N stages implemented within a single integrated circuit and connected in series to form a pipeline. The first stage of the pipeline receives the analog signal as its input, and each of the first N-1 stages of the pipeline supplies an analog residue signal as input to a next succeeding stage of the pipeline. Each stage includes an amplifier for amplifying its input signal to produce a sample voltage stored in an internal sampling capacitor and generates output data indicating an approximate magnitude of its stored sample voltage. The magnitude of the analog residue signal produced by each stage indicates a difference between the voltage represented by that stage's output data and its sample voltage. The amplifiers of the first N-M stages of the pipeline are powered by a higher supply voltage than the amplifiers of the last M stages of the pipeline to maximize the sample voltages in the first N-M stages, thereby reducing the influence of thermal noise on the sample voltages in those stages.

57. 发明专利

GB0709530D0 Method for compressing instruction codes 未知
公开(公告)号：GB0709530D0
公开(公告)日：2007-06-27
申请号：GB0709530
申请日：2007-01-03
申请人： REALTEK SEMICONDUCTOR CORP

58. 发明专利

GB2433366A Mixer including common mode feedback path 未知
公开(公告)号：GB2433366A
公开(公告)日：2007-06-20
申请号：GB0624991
申请日：2006-12-14
申请人： REALTEK SEMICONDUCTOR CORP
发明人： LIN YING-YAO , LIN YING-HSI
IPC分类号： H03D7/14
摘要： A mixer comprises: a switching circuit 104, having a first pair of differential signal nodes and a second pair of differential signal nodes, for switching according to a local oscillation signal Lo; an amplifying stage circuit 102, for receiving an input signal and amplifying the input signal Vip/Vin; a load circuit 106, for serving as the loading of the mixer and generating an output signal Von/Vop of the mixer; a common-mode feedback circuit 108, for receiving the output signal and generating a feedback signal Vfb according to the output signal; a first current source M3, for receiving the feedback signal and generating a first current according to the feedback signal; and a second current source M4, for receiving the feedback signal and generating a second current according to the feedback signal.

59. 发明专利

GB2432691A Two dimensional error correction 未知
公开(公告)号：GB2432691A
公开(公告)日：2007-05-30
申请号：GB0623309
申请日：2006-11-22
申请人： REALTEK SEMICONDUCTOR CORP
发明人： CHANG HUI-HUANG , CHEN CHIEN-CHIH
IPC分类号： G06F11/10 , G11B20/18
摘要： Data stored on a storage medium, such as a digital versatile disc (DVD) 201, is coded using an error correction scheme comprising an inner code parity (PI) and an outer code parity (PO). The data is decoded using a two pass decoding method. During the first pass, data is passed through the PO error correction unit 231 into a buffer 234. The PI error correction is carried out by the PI decoding unit 236. The PO error values and locations are calculated by the PO decoding unit 237 and stored in the PO error information register 233. On the second pass, the PO dynamic correction unit 232 corrects the PO errors. The PI decoding unit may take the data from the buffer or may take it directly from the PO error correction unit.

60. 发明专利

GB0706201D0 Apparatus and method for bandwidth control 未知
公开(公告)号：GB0706201D0
公开(公告)日：2007-05-09
申请号：GB0706201
申请日：2007-03-29
申请人： REALTEK SEMICONDUCTOR CORP
摘要： An apparatus and method for bandwidth control is provided to keep the bandwidth more stable. The apparatus includes an interval signal generator, a storage unit, and a control circuit. The interval signal generator outputs a plurality of interval signals which are evenly or approximately evenly distributed over a time interval. The value of the storage unit corresponds to a transmittable data size. The control circuit adjusts the value of the storage unit according to the interval signals.

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