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    • 52. 发明授权
    • Method and apparatus for surface treatment
    • 表面处理方法和装置
    • US07146744B2
    • 2006-12-12
    • US10832439
    • 2004-04-27
    • Yasuo Kobayashi
    • Yasuo Kobayashi
    • F26B19/00
    • H01L21/02063H01J37/32082H01J2237/2001H01L21/02046H01L21/31116
    • The present invention provides method and apparatus for surface treatment which, when employed in process steps of manufacturing semiconductor devices, can result in the final products having enhanced reliability. According to the surface processing method, an obeject to be processed W is introduced in a processing vessel 10, which is then supplied with ClF3 gas serving as cleaning gas from a supply unit 26. The ClF3 gas is bound to the surface of the object to be processed W, and although the supply of the gas to the processing vessel is interrupted, the ClF3 gas bound to the surface of the object to be processed W serves to clean the surface of the object to be processed. Next, reducing gas is introduced into the processing vessel W to remove chlorine from the object to be processed W, the chlorine being derived from the ClF3 gas. After that, the introduction of the reducing gas is interrupted, and the cleaned object to be processed W is exported from the processing vessel 10. In addition to that, a surface processing apparatus 1 and other processing devices are arranged in a cluster device so that an object to be processed therein is transported among them from one to another under a vacuum environment.
    • 本发明提供了用于表面处理的方法和装置,当在制造半导体器件的工艺步骤中使用时,可以使最终产品具有增强的可靠性。 根据表面处理方法,待处理对象W被引入处理容器10中,然后从供应单元26向其供应用作清洁气体的ClF 3 3气体。 ClF 3气体被结合到待处理物体W的表面,并且尽管向处理容器供应的气体被中断,但是ClF 3 3气体被束缚 待被处理物体的表面W用于清洁待处理物体的表面。 接下来,将还原性气体引入处理容器W中以从被处理物W除去氯,氯源自ClF 3气体。 之后,还原气体的引入被中断,被处理物体W从处理容器10输出。 除此之外,表面处理装置1和其他处理装置布置在集束装置中,使得其中的处理对象在真空环境之间从一个传送到另一个。
    • 53. 发明申请
    • Plasma film-forming method and plasma film-forming apparatus
    • 等离子体成膜法和等离子体成膜装置
    • US20060251828A1
    • 2006-11-09
    • US10549859
    • 2004-03-24
    • Yasuo KobayashiKohei KawamuraAkira AsanoYasuhiro TeraiKenichi Nishizawa
    • Yasuo KobayashiKohei KawamuraAkira AsanoYasuhiro TeraiKenichi Nishizawa
    • H05H1/24C23C16/00
    • H01J37/32192C23C16/511H01J37/3244H01L21/0212H01L21/02274H01L21/3127
    • A plasma-assisted deposition system for carrying out a plasma-assisted deposition method has a processing vessel defining a vacuum chamber and having an open upper end, a dielectric member covering the open upper end of the processing vessel, and a flat antenna member placed on the upper surface of the dielectric member. A coaxial waveguide has one end connected to the upper surface of the flat antenna member and the other end connected to a microwave generator. The flat antenna member is provided with many slots of a length corresponding to half the wavelength of a microwave arranged on concentric circles. For example, a circularly polarized microwave is radiated from the slots into a processing space to produce a source gas plasma. Electron temperature in the plasma in terms of mean square velocity is 3 eV or below and the electron density in the plasma is 5×1011 electrons per cubic centimeter or above. The plasma is used for depositing a fluorine-containing carbon film. Preferably, the process pressure is 19.95 Pa or below. Under such process conditions for depositing a fluorine-containing carbon film by using the plasma, the source gas, such as C5F8 gas, is decomposed properly to form a structure of long CF chains. A interlayer insulation film thus formed has a small relative dielectric constant and permits only a low leakage current.
    • 用于执行等离子体辅助沉积方法的等离子体辅助沉积系统具有限定真空室并具有敞开的上端的处理容器,覆盖处理容器的敞开的上端的电介质构件和放置在 电介质构件的上表面。 同轴波导的一端连接到平坦天线构件的上表面,另一端连接到微波发生器。 扁平天线构件设置有多个长度对应于布置在同心圆上的微波的一半波长的槽。 例如,圆形极化微波从狭缝辐射到处理空间中以产生源气体等离子体。 等离子体中的平均电子速度的电子温度为3eV以下,等离子体中的电子密度为每立方厘米以上5×10 11电子。 等离子体用于沉积含氟碳膜。 优选地,工艺压力为19.95Pa或更低。 在通过使用等离子体沉积含氟碳膜的这种工艺条件下,诸如C 5 F 8气体的源气体被适当地分解以形成结构 的长CF链。 这样形成的层间绝缘膜具有小的相对介电常数,并且仅允许低的漏电流。
    • 54. 发明授权
    • Upper body structure of motor vehicle
    • 机动车上身结构
    • US06517144B2
    • 2003-02-11
    • US09855729
    • 2001-05-16
    • Yasuo Kobayashi
    • Yasuo Kobayashi
    • B60R2104
    • B60R21/04B60R2021/0442
    • An impact absorbing member is composed of a first impact absorbing portion disposed between a roof side panel and a roof head lining, a second impact absorbing portion disposed between the roof head lining and a region that is in a reinforcement and that is spaced from the roof side panel towards a central portion of the roof, and a third impact absorbing portion connecting the first impact absorbing portion to the second impact absorbing portion. The third impact absorbing portion is thinner than the first impact absorbing portion and the second impact absorbing portion.
    • 冲击吸收构件由设置在屋顶侧板和屋顶衬里之间的第一冲击吸收部分构成,第二冲击吸收部分设置在屋顶顶部衬里和位于加强件中并与屋顶间隔开的区域 侧板朝向屋顶的中心部分,以及将第一冲击吸收部分连接到第二冲击吸收部分的第三冲击吸收部分。 第三冲击吸收部分比第一冲击吸收部分和第二冲击吸收部分薄。
    • 59. 发明授权
    • Semiconductor memory device
    • 半导体存储器件
    • US08503214B2
    • 2013-08-06
    • US13034901
    • 2011-02-25
    • Yasuo Kobayashi
    • Yasuo Kobayashi
    • G11C17/00
    • G11C7/18G11C16/24G11C16/26
    • A semiconductor memory device provided with a new bit line hierarchization method that enables further reduction of power consumption is provided. The semiconductor memory device includes multiple memory blocks provided in a matrix configuration and multiple main bit lines provided in correspondence with the memory blocks. Each of the memory blocks includes: multiple memory cells provided in a matrix configuration; multiple sub bit lines provided on a column-by-column basis; multiple word lines provided with respect to each of columns and rows and common to multiple memory blocks; and a switch circuit that couples a corresponding main bit line to any of the sub bit lines. In the operation of reading a target cell as the target of read, a main bit line corresponding to the target cell is selected, a sub bit line corresponding to the column of the target cell is selected through the switch circuit; and a word line corresponding to the column and the row of the target cell is selected from among the word lines.
    • 提供了具有能够进一步降低功耗的新的位线分层方法的半导体存储器件。 半导体存储器件包括以矩阵配置提供的多个存储器块和与存储块对应地提供的多个主位线。 每个存储块包括:以矩阵配置提供的多个存储单元; 以逐列为单位提供多个子位线; 相对于列和行中的每一列提供多个字线并且与多个存储器块共同; 以及将相应的主位线耦合到任何子位线的开关电路。 在读取目标单元作为读取对象的操作中,选择与目标单元对应的主位线,通过开关电路选择与目标单元列对应的子位线; 并且从字线中选择与目标单元格的列和行对应的字线。