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51. 发明授权

US07436067B2 Methods for forming conductive structures and structures regarding same 失效
标题翻译：形成导电结构和结构的方法
公开(公告)号：US07436067B2
公开(公告)日：2008-10-14
申请号：US11146827
申请日：2005-06-07
申请人： Cem Basceri , Gurtej Sandhu
发明人： Cem Basceri , Gurtej Sandhu
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L28/75 , H01L21/76888 , H01L28/55 , H01L28/84
摘要： A method for forming a metal/metal oxide structure that includes forming metal oxide regions, e.g., ruthenium oxide regions, at grain boundaries of a metal layer, e.g., platinum. Preferably, the metal oxide regions are formed by diffusion of oxygen through grain boundaries of the metal layer, e.g., platinum, to oxidize a metal layer thereon, e.g., ruthenium layer. The structure is particularly advantageous for use in capacitor structures and memory devices, such as dynamic random access memory (DRAM) devices.
摘要翻译：一种形成金属/金属氧化物结构的方法，其包括在金属层例如铂的晶界处形成金属氧化物区域，例如氧化钌区域。优选地，金属氧化物区域通过氧气通过金属层例如铂的晶界的扩散而形成，以氧化其上的金属层，例如钌层。该结构对于用于诸如动态随机存取存储器（DRAM）器件的电容器结构和存储器件尤为有利。

52. 发明申请

US20070267689A1 ONE-TRANSISTOR COMPOSITE-GATE MEMORY 有权
标题翻译：单晶体复合栅存储器
公开(公告)号：US20070267689A1
公开(公告)日：2007-11-22
申请号：US11782442
申请日：2007-07-24
申请人： Cem Basceri , Gurtej Sandhu
发明人： Cem Basceri , Gurtej Sandhu
IPC分类号： H01L29/792
CPC分类号： G11C11/5671 , G11C8/12 , G11C16/0416 , G11C16/0466 , H01L29/513 , H01L29/792
摘要： One-transistor memory devices facilitate nonvolatile data storage through the manipulation of oxygen vacancies within a trapping layer of a field-effect transistor (FET), thereby providing control and variation of threshold voltages of the transistor. Various threshold voltages may be assigned a data value, providing the ability to store one or more bits of data in a single memory cell. To control the threshold voltage, the oxygen vacancies may be manipulated by trapping electrons within the vacancies, freeing trapped electrons from the vacancies, moving the vacancies within the trapping layer and annihilating the vacancies.
摘要翻译：单晶体管存储器件通过操纵场效应晶体管（FET）的俘获层内的氧空位来促进非易失性数据存储，从而提供晶体管的阈值电压的控制和变化。可以为各种阈值电压分配数据值，提供将一个或多个位数据存储在单个存储器单元中的能力。为了控制阈值电压，可以通过在空位内捕获电子来操纵氧空位，从空位释放被俘获的电子，移动捕获层内的空位并湮灭空位。

53. 发明申请

US20070134934A1 Methods of forming capacitor constructions 审中-公开
标题翻译：形成电容器结构的方法
公开(公告)号：US20070134934A1
公开(公告)日：2007-06-14
申请号：US11602580
申请日：2006-11-20
申请人： Cem Basceri , Gurtej Sandhu
发明人： Cem Basceri , Gurtej Sandhu
IPC分类号： H01L21/31
CPC分类号： H01L21/0228 , C23C16/409 , C23C16/45525 , C23C16/45531 , H01L21/28562 , H01L21/3141 , H01L21/31691
摘要： The invention includes atomic layer deposition (ALD) methods for forming crystalline materials. The crystalline materials can have a first atomic arrangement within one layer, and a second atomic arrangement within another layer; with the first and second atomic arrangements having different crystallographic orientations relative to one another. Alternatively, or additionally, the crystalline materials can have a first portion with a first concentration of a particular element, and a second portion with a second concentration of the particular element which is different than the first concentration.
摘要翻译：本发明包括用于形成结晶材料的原子层沉积（ALD）方法。结晶材料可以在一层内具有第一原子排列，在另一层内可以具有第二原子排列; 第一和第二原子排列相对于彼此具有不同的晶体取向。或者或另外，结晶材料可以具有具有特定元素的第一浓度的第一部分和具有不同于第一浓度的特定元素的第二浓度的第二部分。

54. 发明申请

US20060266235A1 Supercritical fluid-assisted direct write for printing integrated circuits 失效
公开(公告)号：US20060266235A1
公开(公告)日：2006-11-30
申请号：US11135453
申请日：2005-05-24
申请人： Gurtej Sandhu , Cem Basceri
发明人： Gurtej Sandhu , Cem Basceri
IPC分类号： B41F5/18
CPC分类号： B41F33/00 , B33Y40/00 , H01L21/288 , H01L21/76838 , H01L23/5328 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： High resolution patterns provided on a surface of a semiconductor substrate and methods of direct printing of such high resolution patterns are disclosed. The high resolution patterns may have dimensions less than 0.1 micron and are formed by a direct writing method employing a supercritical fluid comprising nanometer-sized particles, which may be optionally electrically charged.

55. 发明申请

US20060258071A1 Methods of forming field effect transistors 有权
公开(公告)号：US20060258071A1
公开(公告)日：2006-11-16
申请号：US11490681
申请日：2006-07-21
申请人： Gurtej Sandhu , H. Manning , Cem Basceri
发明人： Gurtej Sandhu , H. Manning , Cem Basceri
IPC分类号： H01L21/337
CPC分类号： H01L29/66666 , H01L29/7827
摘要： A mass of material is formed over a semiconductor substrate. Semiconductive material is formed laterally proximate the mass of material. A space is provided laterally between the mass of material and the semiconductive material. The space comprises an outermost portion and a portion immediately adjacent thereto. The outermost portion has a maximum lateral width which is greater than that of the adjacent portion. Gate dielectric material and conductive gate material are formed within the space. The gate dielectric material and the conductive gate material in combination fill the adjacent portion of the space but do not fill the outermost portion of the space. At least the conductive gate material is etched from at least a majority of the outermost portion of the space. Source/drain regions are formed operatively proximate the conductive gate material and the semiconductive material is used as a channel region of the field effect transistor.

56. 发明申请

US20060249778A1 Constructions comprising hafnium oxide 有权
标题翻译：包含氧化铪的构造
公开(公告)号：US20060249778A1
公开(公告)日：2006-11-09
申请号：US11485592
申请日：2006-07-11
申请人： Cem Basceri , F. Gealy , Gurtej Sandhu
发明人： Cem Basceri , F. Gealy , Gurtej Sandhu
IPC分类号： H01L29/94 , H01L29/00
CPC分类号： H01G4/33 , H01G4/1209 , H01G4/1272 , H01L21/31645 , H01L27/10852 , H01L28/60 , H01L28/65 , H01L28/90 , H01L28/91 , H01L29/7833
摘要： The invention includes methods of forming hafnium-containing materials, such as, for example, hafnium oxide. In one aspect, a semiconductor substrate is provided, and first reaction conditions are utilized to form hafnium-containing seed material in a desired crystalline phase and orientation over the substrate. Subsequently, second reaction conditions are utilized to grow second hafnium-containing material over the seed material. The second hafnium-containing material is in a crystalline phase and/or orientation different from the crystalline phase and orientation of the hafnium-containing seed material. The second hafnium-containing material can be, for example, in an amorphous phase. The seed material is then utilized to induce a desired crystalline phase and orientation in the second hafnium-containing material. The invention also includes capacitor constructions utilizing hafnium-containing materials, and circuit assemblies comprising the capacitor constructions.
摘要翻译：本发明包括形成含铪材料的方法，例如氧化铪。在一个方面，提供了半导体衬底，并且利用第一反应条件来形成在衬底上所需的结晶相和取向的含铪种子材料。随后，利用第二反应条件在种子材料上生长第二含铪材料。第二含铪材料处于与含铪种子材料的结晶相和取向不同的结晶相和/或取向。第二含铪材料可以是例如非晶相。然后将种子材料用于在第二含铪材料中诱导所需的结晶相和取向。本发明还包括使用含铪材料的电容器结构和包括电容器结构的电路组件。

57. 发明申请

US20060051941A1 Methods of forming a layer comprising epitaxial silicon, and methods of forming field effect transistors 有权
标题翻译：形成包含外延硅的层的方法以及形成场效应晶体管的方法
公开(公告)号：US20060051941A1
公开(公告)日：2006-03-09
申请号：US11035298
申请日：2005-01-12
申请人： Eric Blomiley , Gurtej Sandhu , Cem Basceri , Nirmal Ramaswamy
发明人： Eric Blomiley , Gurtej Sandhu , Cem Basceri , Nirmal Ramaswamy
IPC分类号： H01L21/20
CPC分类号： H01L29/66787 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/0262 , H01L21/02642
摘要： The invention includes methods of forming layers comprising epitaxial silicon. In one implementation, an opening is formed within a first material received over a monocrystalline material. Opposing sidewalls of the opening are lined with a second material, with monocrystalline material being exposed at a base of the second material-lined opening. A silicon-comprising layer is epitaxially grown from the exposed monocrystalline material within the second material-lined opening. At least a portion of the second material lining is in situ removed. Other aspects and implementations are contemplated.
摘要翻译：本发明包括形成包含外延硅的层的方法。在一个实施方案中，在通过单晶材料接收的第一材料内形成开口。开口的相对侧壁衬有第二材料，其中单晶材料暴露在第二材料衬里开口的基部处。在第二材料衬里的开口内从暴露的单晶材料外延生长含硅层。第二材料衬里的至少一部分被原位去除。考虑了其他方面和实现。

58. 发明申请

US20060046618A1 Methods and systems for determining physical parameters of features on microfeature workpieces 审中-公开
标题翻译：用于确定微特征工件特征物理参数的方法和系统
公开(公告)号：US20060046618A1
公开(公告)日：2006-03-02
申请号：US10930307
申请日：2004-08-31
申请人： Gurtej Sandhu , Cem Basceri
发明人： Gurtej Sandhu , Cem Basceri
IPC分类号： B24B49/00
CPC分类号： B24B37/005 , B24B49/12
摘要： Methods and systems for determining physical parameters of features on microfeature workpieces. In one embodiment, a method includes directing a substantially coherent probe beam at a selected area of a feature on the microfeature workpiece to produce a reflected probe beam having phase information of different points within the selected area. The selected area can be only a portion of the workpiece. The method further includes determining a physical parameter of the feature at the different points within the selected area of the workpiece based on the reflected probe beam. The physical parameter can be a depth, height, thickness, width, or other dimension of a layer, trench, hole, projection, or other feature on the workpiece.
摘要翻译：用于确定微特征工件特征物理参数的方法和系统。在一个实施例中，一种方法包括将基本相干的探测光束引导到微特征工件上的特征的选定区域，以产生具有所选区域内的不同点的相位信息的反射探测光束。所选区域只能是工件的一部分。该方法还包括基于反射的探测光束在工件的选定区域内的不同点处确定特征的物理参数。物理参数可以是工件上的层，沟槽，孔，突起或其他特征的深度，高度，厚度，宽度或其他尺寸。

59. 发明申请

US20060046395A1 Forming a vertical transistor 有权
标题翻译：形成垂直晶体管
公开(公告)号：US20060046395A1
公开(公告)日：2006-03-02
申请号：US11256424
申请日：2005-10-20
申请人： Nirmal Ramaswamy , Gurtej Sandhu , Cem Basceri , Eric Blomiley
发明人： Nirmal Ramaswamy , Gurtej Sandhu , Cem Basceri , Eric Blomiley
IPC分类号： H01L21/336 , H01L21/20
CPC分类号： H01L29/66787 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/0262 , H01L29/66553 , H01L29/66666 , H01L29/7827 , H01L29/78642
摘要： The invention includes methods of forming epitaxial silicon-comprising material and methods of forming vertical transistors. In one implementation, a method of forming epitaxial silicon-comprising material includes providing a substrate comprising monocrystalline material. A first portion of the monocrystalline material is outwardly exposed while a second portion of the monocrystalline material is masked. A first silicon-comprising layer is epitaxially grown from the exposed monocrystalline material of the first portion and not from the monocrystalline material of the masked second portion. After growing the first silicon-comprising layer, the second portion of the monocrystalline material is unmasked. A second silicon-comprising layer is then epitaxially grown from the first silicon-comprising layer and from the unmasked monocrystalline material of the second portion. Other aspects and implementations are contemplated.
摘要翻译：本发明包括形成外延含硅材料的方法和形成垂直晶体管的方法。在一个实施方案中，形成外延含硅材料的方法包括提供包括单晶材料的衬底。单晶材料的第一部分向外暴露，而单晶材料的第二部分被掩蔽。第一含硅层从第一部分的暴露的单晶材料而不是被掩蔽的第二部分的单晶材料外延生长。在生长第一含硅层之后，单晶材料的第二部分被未掩蔽。然后从第一含硅层和第二部分的未掩模的单晶材料外延生长第二含硅层。考虑了其他方面和实现。

60. 发明申请

US20060046392A1 Methods of forming vertical transistor structures 审中-公开
标题翻译：形成垂直晶体管结构的方法
公开(公告)号：US20060046392A1
公开(公告)日：2006-03-02
申请号：US10928467
申请日：2004-08-26
申请人： H. Manning , Kunal Parekh , Cem Basceri , Gurtej Sandhu
发明人： H. Manning , Kunal Parekh , Cem Basceri , Gurtej Sandhu
IPC分类号： H01L21/336 , H01L21/3205 , H01L21/425 , H01L21/8242
CPC分类号： H01L29/66787 , H01L27/10808 , H01L27/10876
摘要： The invention includes methods in which an angled implant is utilized to self-align a source/drain region implant with the top edge of a gateline of a vertical transistor structure. The invention also includes methods in which an angled implant is utilized to implant dopant beneath the gateline of a vertical transistor structure. Vertical transistor structures formed in accordance with methodology of the present invention can be incorporated into various types of integrated circuitry, including, for example, DRAM arrays.
摘要翻译：本发明包括这样的方法，其中使用成角度的注入来使源极/漏极区域注入与垂直晶体管结构的天线的顶部边缘自对准。本发明还包括其中使用成角度的植入物以在垂直晶体管结构的栅极下注入掺杂剂的方法。根据本发明的方法形成的垂直晶体管结构可以结合到各种类型的集成电路中，包括例如DRAM阵列。

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