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51. 发明授权

US5845247A Reproducing apparatus 失效
标题翻译：再现装置
公开(公告)号：US5845247A
公开(公告)日：1998-12-01
申请号：US711930
申请日：1996-09-11
申请人： Shuji Miyasaka
发明人： Shuji Miyasaka
IPC分类号： G10L19/02 , G10L21/003 , G10L21/04 , G10L21/047 , G11B20/02 , H04B1/66 , H04N19/00 , H04N19/102 , H04N19/162 , H04N19/63 , G10L9/16
CPC分类号： G10L21/01 , H04B1/667
摘要： The reproducing apparatus of the invention reproduces a plurality of band signals which have been subjected to a band division and includes a time-scale modifier which receives the plurality of band signals and time-axis compresses the respective band signals at the same ratio, thereby outputting a plurality of time-axis compressed band signals and a synthesis filter bank for synthesizing the plurality of time-axis compressed band signals.
摘要翻译：本发明的再现装置再现了已经进行了带分割的多个频带信号，并且包括时间刻度修改器，其接收多个频带信号，并且时间轴以相同的比率压缩各个频带信号，从而输出多个时间轴压缩频带信号和用于合成多个时间轴压缩频带信号的合成滤波器组。

52. 发明授权

US08694326B2 Communication terminal and communication method 有权
标题翻译：通信终端和通信方式
公开(公告)号：US08694326B2
公开(公告)日：2014-04-08
申请号：US13590243
申请日：2012-08-21
申请人： Shuji Miyasaka , Kosuke Nishio , Ichiro Kawashima
发明人： Shuji Miyasaka , Kosuke Nishio , Ichiro Kawashima
IPC分类号： G10L21/00 , H04B1/38 , H04M1/00 , H04M3/42 , H04M9/08 , G06F3/00 , G06F15/16 , G06F11/00
CPC分类号： H04M9/082 , H04B3/23
摘要： A communication terminal includes a decoder which decodes an input bitstream received from another communication terminal, to generate an output audio signal and outputs the generated output audio signal to a speaker; and an echo canceller which obtains an input audio signal representing sound captured by a microphone placed in a space to which the speaker outputs the sound, and removes, for respective subbands, an echo component included in the obtained input audio signal and corresponding to the output audio signal, to generate an audio signal for transmission. An encoder codes the audio signal for transmission to generate an output bitstream and transmits the generated output bitstream to another communication terminal; and a control unit controls, for the respective subbands, echo cancellation processing according to a reproduction band of at least one of the output audio signal and the audio signal for transmission.
摘要翻译：通信终端包括解码器，其对从另一通信终端接收的输入比特流进行解码，以产生输出音频信号，并将所生成的输出音频信号输出到扬声器; 以及回波消除器，其获得表示放置在扬声器输出声音的空间中的麦克风捕获的声音的输入音频信号，并且针对各个子带去除包含在所获得的输入音频信号中并对应于输出的回波分量音频信号，以产生用于传输的音频信号。编码器对音频信号进行编码以进行传输以产生输出比特流，并将生成的输出比特流发送到另一通信终端; 并且控制单元根据输出音频信号和音频信号中的至少一个的再现频带对各个子带进行回波消除处理，以进行传输。

53. 发明授权

US07984243B2 Cache memory and method for cache entry replacement based on modified access order 有权
标题翻译：基于修改的访问顺序的缓存内存和缓存条目替换方法
公开(公告)号：US07984243B2
公开(公告)日：2011-07-19
申请号：US10577133
申请日：2004-11-02
申请人： Hazuki Kawai , Ryuta Nakanishi , Tetsuya Tanaka , Shuji Miyasaka
发明人： Hazuki Kawai , Ryuta Nakanishi , Tetsuya Tanaka , Shuji Miyasaka
IPC分类号： G06F12/00
CPC分类号： G06F12/126 , G06F12/121
摘要： A cache memory according to the present invention includes a W flag setting unit that modifies order data indicating an access order per cache entry that holds a data unit of a cache so as to reflect an actual access order and a replace unit that selects a cache entry for replacement based on the modified order data and replaces the cache entry.
摘要翻译：根据本发明的高速缓冲存储器包括：W标志设置单元，其修改指示保存高速缓存的数据单元的每个高速缓存条目的访问顺序的顺序数据，以反映实际的访问顺序;以及替换单元，其选择高速缓存条目根据修改的订单数据进行替换，并替换高速缓存条目。

54. 发明授权

US07848931B2 Audio encoder 有权
标题翻译：音频编码器
公开(公告)号：US07848931B2
公开(公告)日：2010-12-07
申请号：US11659949
申请日：2005-08-18
申请人： Shuji Miyasaka , Yoshiaki Takagi , Naoya Tanaka , Mineo Tsushima
发明人： Shuji Miyasaka , Yoshiaki Takagi , Naoya Tanaka , Mineo Tsushima
IPC分类号： G10L19/00
CPC分类号： G11B27/022 , G10L19/008 , G11B20/00007
摘要： An audio encoder, which is capable of encoding multiple-channel signals so that only a downmixed signal is decoded and of further generating specific auxiliary information necessary for dividing the downmixed signal, is provided.An audio encoder (10), which compresses and encodes audio signals of N-channels (N>1), includes a downmixed signal encoding unit (11) which encodes the downmixed signal obtained by downmixing the audio signals, and an auxiliary information generation unit (12a) which generates auxiliary information necessary for decoding the downmixed signal encoded by the downmixed signal encoding unit (11) into N-channel audio signals. The auxiliary information generation unit (12a) includes transformation units (121) and (122) which transform audio signals respectively into frequency domain signals, a detection unit (123) which detects phase difference information and gain ratio information each indicates a degree of difference between frequency domain signals, and a quantization unit (125) which quantizes, for each frequency band, the phase difference information and gain ratio information detected by the detection unit (123) using the quantization precision setting table (124). The quantization precision setting table (124) functions as a division unit which divides a frequency band of a frequency domain signal into plural sub-bands.
摘要翻译：一种音频编码器，其能够对多声道信号进行编码，使得只下降混合信号被解码，并且进一步产生分割下混合信号所需的特定辅助信息。对N声道（N> 1）的音频信号进行压缩编码的音频编码器（10）包括下混合信号编码单元（11），其对通过降低音频信号而获得的下混合信号进行编码，以及辅助信息生成单元（12a），其生成将由下混合信号编码单元（11）编码的下混合信号解码为N声道音频信号所需的辅助信息。辅助信息生成单元（12a）包括将音频信号分别变换为频域信号的变换单元（121）和（122），检测单元（123），检测相位差信息和增益比信息，每个都表示频域信号，以及量化单元（125），其对于每个频带，使用量化精度设定表（124）对由检测单元（123）检测的相位差信息和增益比信息进行量化。量化精度设定表（124）作为将频域信号的频带划分为多个子带的分割单位起作用。

55. 发明申请

US20090207775A1 SIGNAL PROCESSING APPARATUS 有权
标题翻译：信号处理装置
公开(公告)号：US20090207775A1
公开(公告)日：2009-08-20
申请号：US12438996
申请日：2007-11-29
申请人： Shuji Miyasaka , Michihiro Matsumoto
发明人： Shuji Miyasaka , Michihiro Matsumoto
IPC分类号： H04H20/71 , H04L12/56 , G10L19/00
CPC分类号： G10L19/167 , G10L21/038 , G11B2020/00028 , H04Q11/0428
摘要： When a coded signal having a layer structure is generated, insertion of header information in a sub-layer in each frame increases the bit rate. In contrast, when the header information is only inserted at regular intervals, a reproducer sometimes cannot obtain information necessary in a reproduction start point.The signal processing apparatus inserts the header information in a frame to probably be the reproduction start point by including: the first (100) and the second (101) coding units that code an input signal per frame; the first header inserting unit (103) that inserts the SBR header indicating management information of the coded signal represented by a sequence of frames, in each frame at a regular interval within the coded signal; the control unit (105) that determines a frame in which the SBR header is inserted, independent of the frames in which the first header inserting unit inserts the SBR header; and the second header inserting unit (104) that singly inserts the SBR header in the frame determined by the control unit.
摘要翻译：当产生具有层结构的编码信号时，标题信息在每个帧中的子层中的插入增加了位速率。相反，当标题信息仅以规则的间隔插入时，再现器有时不能获得再现开始点所需的信息。信号处理装置通过包括：对每帧输入信号进行编码的第一（100）和第二（101）个编码单元，将标题信息插入到可能是再现开始点的帧中; 第一标题插入单元，以编码信号内的规则间隔插入指示由帧序列表示的编码信号的管理信息的SBR标题; 控制单元（105），其独立于第一报头插入单元插入SBR报头的帧，确定其中插入SBR报头的帧; 以及在由控制单元确定的帧中单独地插入SBR头部的第二头插入单元（104）。

56. 发明申请

US20080225173A1 SIGNAL PROCESSING APPARATUS 审中-公开
标题翻译：信号处理装置
公开(公告)号：US20080225173A1
公开(公告)日：2008-09-18
申请号：US12046087
申请日：2008-03-11
申请人： Shuji Miyasaka , Yuji Sugisawa , Akihiro Kato , Futoshi Morie
发明人： Shuji Miyasaka , Yuji Sugisawa , Akihiro Kato , Futoshi Morie
IPC分类号： H04N5/14
CPC分类号： H04N19/42 , H04N19/70 , H04N19/91
摘要： A signal processing apparatus capable of efficiently processing bitstream in a small circuit scale includes an input buffer in which a bitstream is stored, a first processor which generates a program for processing a signal B corresponding to a signal A by taking out the signal A from the bitstream stored in the input buffer and by using at least one related signal included in the signal A, the related signal being related to the signal B; and a second processor which acquires the program generated by the first processor and executes the acquired program to process the signal B corresponding to the signal A.
摘要翻译：能够以小电路规模有效地处理比特流的信号处理装置包括其中存储比特流的输入缓冲器，产生用于处理与信号A相对应的信号B的程序的第一处理器，通过从比特流存储在输入缓冲器中并且通过使用包括在信号A中的至少一个相关信号，相关信号与信号B相关; 以及第二处理器，其获取由第一处理器生成的程序，并执行所获取的程序以处理与信号A相对应的信号B.

57. 发明授权

US07284241B2 Compiler, compiler apparatus and compilation method 有权
标题翻译：编译器，编译器和编译方法
公开(公告)号：US07284241B2
公开(公告)日：2007-10-16
申请号：US10630705
申请日：2003-07-31
申请人： Taketo Heishi , Toshiyuki Sakata , Hajime Ogawa , Ryoko Miyachi , Shuji Miyasaka , Tomokazu Ishikawa
发明人： Taketo Heishi , Toshiyuki Sakata , Hajime Ogawa , Ryoko Miyachi , Shuji Miyasaka , Tomokazu Ishikawa
IPC分类号： G06F9/45
CPC分类号： G06F8/443 , G06F8/425 , G06F8/427 , G06F8/4441
摘要： An operator definition file 102 and the like included in a source program 101 and a compiler 100 that translates the source program 101 into a machine language program 105 are provided. The operator definition file 102 includes definitions of various fixed point type operators by class definitions. The compiler 100 can generate effectively advanced and specific instructions that a processor executes and make improvements through expanding functions and the like without repeating frequently upgrading of the version of the compiler itself. The compiler 100 is made up of an intermediate code generation unit 121 that generates intermediate codes, a machine language instruction substitution unit 122 that substitutes the intermediate codes referring to classes defined by the operator definition file 102 with machine language instructions and an optimization unit 130 that performs optimization targeting the intermediate codes including the substituted machine language instructions.
摘要翻译：提供包括在源程序101中的操作者定义文件102等以及将源程序101转换为机器语言程序105的编译器100。操作者定义文件102包括通过类定义的各种定点类型操作符的定义。编译器100可以生成有效的高级特定指令，处理器执行并通过扩展功能等进行改进，而不会重复频繁升级编译器本身的版本。编译器100由生成中间代码的中间代码生成单元121构成，机器语言指令替换单元122，其使用机器语言指令代替参考由操作者定义文件102定义的类别的中间代码和优化单元130，执行针对包括替代机器语言指令的中间代码的优化。

58. 发明授权

US07260540B2 Encoding device, decoding device, and system thereof utilizing band expansion information 有权
标题翻译：编码装置，解码装置及其系统利用频带扩展信息
公开(公告)号：US07260540B2
公开(公告)日：2007-08-21
申请号：US10288364
申请日：2002-11-06
申请人： Shuji Miyasaka , Tomokazu Ishikawa , Yoshiaki Sawada
发明人： Shuji Miyasaka , Tomokazu Ishikawa , Yoshiaki Sawada
IPC分类号： G10L19/00
CPC分类号： G10L19/18 , G10L19/24
摘要： A decoding device (30a) comprises a narrow-band decoding unit (31) operable to reproduce a PCM signal (P1) from a narrow-band bit stream included in a wide-band bit stream (S0), a wide-band decoding unit (32) operable to reproduce a PCM signal (P2) having a frequency band which is wider than that of the PCM signal (P1) reproduced by the narrow-band decoding unit (31) from the narrow-band bit stream and a band expanding bit stream included in the wide band bit stream (S0) and a selecting unit (34) operable to select either the PCM signal (P1) reproduced by the narrow-band decoding unit (31) or the PCM signal (P2) reproduced by the wide-band decoding unit (32), and to output the selected sound digital signal.
摘要翻译：解码装置（30a）包括窄带解码单元（31），用于从包括在宽带比特流（S 0）中的窄带比特流再现PCM信号（P 1）频带解码单元（32），用于从窄带位重放具有比由窄带解码单元（31）再现的PCM信号（P 1）的频带宽的频带的PCM信号（P 2）流和包括在宽带比特流（S 0）中的频带扩展比特流和选择单元（34），其可操作以选择由窄带解码单元（31）或PCM再现的PCM信号（P 1）信号（P 2），并输出所选择的声音数字信号。

59. 发明申请

US20050182902A1 Signal processing apparatus 审中-公开
标题翻译：信号处理装置
公开(公告)号：US20050182902A1
公开(公告)日：2005-08-18
申请号：US11052979
申请日：2005-02-09
申请人： Shuji Miyasaka
发明人： Shuji Miyasaka
IPC分类号： G06F12/08 , G06F12/12 , H03M7/42
CPC分类号： G06F12/121 , G06F12/126 , H03M7/425
摘要： A signal processing apparatus (1) performs decoding using a first memory area (11) of a main memory (10), a first table (13) of a second memory area (12) and a second table (14). The signal processing apparatus (1) has a cache memory (34) for temporarily storing data of the first table (13) and the second table (14), a processor (20) which reads out the data by accessing at least one of the first memory area (11) and the second memory area (12) via the cache memory (34), and a control unit (51) which allocates a space in the cache memory (34) when there is no space for temporarily storing in the cache memory (34). The control unit (51) allocates the space in the cache memory (34) into which the data in the first memory area (11) is stored preferentially to the data in the second memory area (12).
摘要翻译：信号处理装置（1）使用主存储器（10）的第一存储区域（11），第二存储区域（12）和第二表格（14）的第一表格（13）进行解码。信号处理装置（1）具有用于临时存储第一表（13）和第二表（14）的数据的高速缓存存储器（34），处理器（20），其通过访问至少一个第一存储区域（11）和第二存储器区域（12），以及控制单元（51），当没有用于临时存储的空间时，在高速缓冲存储器（34）中分配空间缓存存储器（34）。控制单元（51）将优先存储第一存储区域（11）中的数据的高速缓冲存储器（34）中的空间分配给第二存储区域（12）中的数据。

60. 发明授权

US06898615B2 Signal processing unit and signal processing method including using an exponent part and a mantissa part for power generation 失效
标题翻译：信号处理单元和信号处理方法，包括使用指数部分和尾数部分进行发电
公开(公告)号：US06898615B2
公开(公告)日：2005-05-24
申请号：US09909971
申请日：2001-07-23
申请人： Shuji Miyasaka , Takeshi Norimatsu , Mineo Tsushima , Tomokazu Ishikawa , Yoshiaki Sawada
发明人： Shuji Miyasaka , Takeshi Norimatsu , Mineo Tsushima , Tomokazu Ishikawa , Yoshiaki Sawada
IPC分类号： G06F1/03 , G06F7/556 , G06F1/02
CPC分类号： G06F1/0307 , G06F7/483 , G06F7/556
摘要： An exponent part extraction section extracts a bit series from the exponent part of an inputted floating point data. A mantissa part extraction section extracts the uppermost K bits from the mantissa part of the floating point data. A first conversion section inputs the output e from the exponent part extraction section and outputs the value of a function X(e) thereof. A second conversion section inputs the output f from the mantissa part extraction section and outputs the value of a function Y(f) thereof. A multiplier section multiplies together these values. By setting suitable tables in advance in the first and the second conversion sections, the calculation of the v^p for an item v of floating point data can be performed.
摘要翻译：指数部分提取部分从输入的浮点数据的指数部分中提取比特序列。尾数部分提取部分从浮点数据的尾数部分提取最上面的K位。第一转换部分输入来自指数部分提取部分的输出e，并输出其函数X（e）的值。第二转换部分输入来自尾数部分提取部分的输出f并输出其函数Y（f）的值。乘数部分将这些值相乘。通过预先在第一和第二转换部分中设置合适的表，可以执行浮点数据的项目v的v ^ p的计算。

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