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51. 发明申请

US20150095546A1 SYSTEM AND METHOD FOR BANK LOGICAL DATA REMAPPING 有权
标题翻译：银行逻辑数据重读系统与方法
公开(公告)号：US20150095546A1
公开(公告)日：2015-04-02
申请号：US14044548
申请日：2013-10-02
申请人： Alan Bennett , Sergey Anatolievich Gorobets
发明人： Alan Bennett , Sergey Anatolievich Gorobets
IPC分类号： G06F3/06
CPC分类号： G06F12/00 , G06F3/0649 , G06F12/0246 , G06F12/0292 , G06F2212/1036 , G06F2212/7201 , G06F2212/7208 , G06F2212/7211
摘要： A method and system are disclosed for remapping logical addresses between memory banks of discrete or embedded multi-bank storage device. The method may include a controller of a storage device tracking a total erase count for a storage device, determining if an erase count imbalance greater than a threshold exists between banks, and then remapping logical address ranges from the highest erase count bank to the lowest erase count bank to even out wear between the banks. The system may include a controller that may maintain a bank routing table, an erase counting mechanism and execute instructions for triggering a remapping process to remap an amount of logical addresses such that an address range is reduced for a hotter bank and increased for a colder bank.
摘要翻译：公开了用于重新映射离散或嵌入式多存储存储设备的存储体之间的逻辑地址的方法和系统。该方法可以包括跟踪存储设备的总擦除计数的存储设备的控制器，确定在存储体之间是否存在大于阈值的擦除计数不平衡，然后将逻辑地址范围从最高擦除计数存储区重新映射到最低擦除计数银行甚至在银行之间穿戴。系统可以包括可以维护银行路由表，擦除计数机制和执行指令的控制器，用于触发重映射处理以重新映射逻辑地址的数量，使得对于较热的银行减少地址范围并且对于较冷的银行而言增加。

52. 发明授权

US08775722B2 Storing data in parallel in a flash storage device using on chip page shifting between planes 有权
标题翻译：在闪存存储设备中并行存储数据，使用片上页面在平面之间切换
公开(公告)号：US08775722B2
公开(公告)日：2014-07-08
申请号：US13341543
申请日：2011-12-30
申请人： Steven Sprouse , Sergey Anatolievich Gorobets
发明人： Steven Sprouse , Sergey Anatolievich Gorobets
IPC分类号： G06F12/00
CPC分类号： G11C7/1012 , G11C11/5621 , G11C16/10
摘要： Methods and systems are disclosed herein for storing data in a memory device. Data for multiple pages is written in parallel using plane interleaving. For example, in a four plane write, a first set of four pages are written in the following sequence: 0, 1, 2, 3. A second set of four pages, after plane interleaving, are written in the following sequent: 7, 4, 5, 6. After writing the data, the pages of written data are read, page swapped if necessary, and then written into another portion of memory (such as MLC).
摘要翻译：本文公开了用于将数据存储在存储器件中的方法和系统。使用平面交错并行写入多页数据。例如，在四平面写入中，按照以下顺序写入第一组四页：0,1,2,3。在平面交织之后的第二组四页被写入随后的后续步骤：7，写入数据后，读取写入数据的页面，如果需要，页面交换，然后写入存储器的另一部分（如MLC）。

53. 发明授权

US08621323B2 Pipelined data relocation and improved chip architectures 有权
标题翻译：流水线数据迁移和改进的芯片架构
公开(公告)号：US08621323B2
公开(公告)日：2013-12-31
申请号：US12353185
申请日：2009-01-13
申请人： Sergey Anatolievich Gorobets , Kevin M. Conley
发明人： Sergey Anatolievich Gorobets , Kevin M. Conley
IPC分类号： G11C29/00 , G06F3/00
CPC分类号： G06F12/0246 , G06F11/1008 , G11C7/1039 , G11C7/1051 , G11C16/3436
摘要： The present invention presents methods and architectures for the pipelining of read operation with write operations. In particular, methods are presented for pipelining data relocation operations that allow for the checking and correction of data in the controller prior to its being re-written, but diminish or eliminate the additional time penalty this would normally incur. A number of architectural examples are described to facilitate these methods, including: introducing two registers on the memory where each is independently accessible by the controller; allowing a first memory register to be written from while a second register is written to; introducing two registers on the memory where the contents of the registers can be swapped.
摘要翻译：本发明提出了用于具有写入操作的读取操作的流水线的方法和架构。特别地，提出了用于流水线数据迁移操作的方法，其允许在控制器被重写之前检查和校正控制器中的数据，但是减少或消除通常会产生的额外时间损失。描述了许多架构示例来促进这些方法，包括：在存储器中引入两个寄存器，每个寄存器可由控制器独立访问; 允许在写入第二个寄存器时写入第一个存储器寄存器; 在存储器中引入两个寄存器，其中寄存器的内容可以交换。

54. 发明授权

US08208322B2 Non-volatile memory control 有权
标题翻译：非易失性存储器控制
公开(公告)号：US08208322B2
公开(公告)日：2012-06-26
申请号：US13108477
申请日：2011-05-16
申请人： Sergey Anatolievich Gorobets
发明人： Sergey Anatolievich Gorobets
IPC分类号： G11C7/00
CPC分类号： G06F13/1615 , G06F3/0625 , G06F3/0659 , G06F3/0688 , G06F13/4239 , G11C7/1039 , Y02D10/154
摘要： Methods and apparatus for use in a memory system having a non-volatile memory and a controller for limiting the number of non-volatile memory arrays from a plurality of available arrays accessed at one time are useful in the control of concurrent access of memory arrays. One method includes implementing a pipelining sequence for transferring data to and from the non-volatile memory arrays and limiting the number of active arrays operating at one time. The controller is configured to wait for the at least one of the arrays to complete before initiating a transfer to and from a further array.
摘要翻译：在具有非易失性存储器的存储器系统中使用的方法和装置以及用于从一次访问的多个可用阵列限制非易失性存储器阵列的数量的控制器在对存储器阵列的并发访问的控制中是有用的。一种方法包括实现用于将数据传送到非易失性存储器阵列和从非易失性存储器阵列传送数据的流水线序列，并限制一次操作的有源阵列的数量。控制器被配置为等待至少一个数组完成，然后开始向另一阵列传送数据。

55. 发明申请

US20110310683A1 NON-VOLATILE MEMORY CONTROL 有权
标题翻译：非易失性存储器控制
公开(公告)号：US20110310683A1
公开(公告)日：2011-12-22
申请号：US13108477
申请日：2011-05-16
申请人： Sergey Anatolievich Gorobets
发明人： Sergey Anatolievich Gorobets
IPC分类号： G11C7/00
CPC分类号： G06F13/1615 , G06F3/0625 , G06F3/0659 , G06F3/0688 , G06F13/4239 , G11C7/1039 , Y02D10/154
摘要： Methods and apparatus for use in a memory system having a non-volatile memory and a controller for limiting the number of non-volatile memory arrays from a plurality of available arrays accessed at one time are useful in the control of concurrent access of memory arrays. One method includes implementing a pipelining sequence for transferring data to and from the non-volatile memory arrays and limiting the number of active arrays operating at one time. The controller is configured to wait for the at least one of the arrays to complete before initiating a transfer to and from a further array.
摘要翻译：在具有非易失性存储器的存储器系统中使用的方法和装置以及用于从一次访问的多个可用阵列限制非易失性存储器阵列的数量的控制器在对存储器阵列的并发访问的控制中是有用的。一种方法包括实现用于将数据传送到非易失性存储器阵列和从非易失性存储器阵列传送数据的流水线序列，并限制一次操作的有源阵列的数量。控制器被配置为等待至少一个数组完成，然后开始向另一阵列传送数据。

56. 发明授权

US07945759B2 Non-volatile memory and method with phased program failure handling 有权
标题翻译：非易失性存储器和分阶段程序故障处理方法
公开(公告)号：US07945759B2
公开(公告)日：2011-05-17
申请号：US12248160
申请日：2008-10-09
申请人： Sergey Anatolievich Gorobets
发明人： Sergey Anatolievich Gorobets
IPC分类号： G06F12/16
CPC分类号： G06F11/1666 , G06F11/1072 , G06F11/141 , G06F11/1415 , G06F11/1658 , G06F12/0246 , G06F2212/7202 , G06F2212/7203 , G06F2212/7205 , G06F2212/7208 , G11C11/5621 , G11C11/5628 , G11C16/102 , G11C16/105 , G11C16/20 , G11C29/00 , G11C29/76 , G11C2211/5641
摘要： In a memory with block management system, program failure in a block during a time-critical memory operation is handled by continuing the programming operation in a breakout block. Later, at a less critical time, the data recorded in the failed block prior to the interruption is transferred to another block, which could also be the breakout block. The failed block can then be discarded. In this way, when a defective block is encountered during programming, it can be handled without loss of data and without exceeding a specified time limit by having to transfer the stored data in the defective block on the spot. This error handling is especially critical for a garbage collection operation so that the entire operation need not be repeated on a fresh block during a critical time. Subsequently, at an opportune time, the data from the defective block can be salvaged by relocation to another block.
摘要翻译：在具有块管理系统的存储器中，通过在分组块中继续编程操作来处理在时间紧急的存储器操作期间块中的程序故障。之后，在不太关键的时刻，在中断之前记录在故障块中的数据被传送到另一个块，也可以是分组块。然后可以丢弃失败的块。以这种方式，当在编程期间遇到有缺陷的块时，可以在不丢失数据的情况下处理而不超过指定的时间限制，因为必须现场将存储的数据传送到缺陷块中。这种错误处理对于垃圾收集操作尤其重要，因此在关键时刻不需要在新块上重复整个操作。随后，在适当的时间，来自缺陷块的数据可以通过重新定位到另一个块来进行抢救。

57. 发明申请

US20090182791A1 Non-Volatile Memories And Method With Adaptive File Handling In A Directly Mapped File Storage System 审中-公开
标题翻译：非易失性存储器和在直接映射文件存储系统中的自适应文件处理方法
公开(公告)号：US20090182791A1
公开(公告)日：2009-07-16
申请号：US12405140
申请日：2009-03-16
申请人： Sergey Anatolievich Gorobets
发明人： Sergey Anatolievich Gorobets
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/0246
摘要： In a memory system with a file storage system, an optimal file handling scheme is adaptively selected from a group thereof based on the attributes of the file being handled. The file attributes may be obtained from a host or derived from a history of the file had with the memory system. In one embodiment, a scheme for allocating memory locations for a write operation is dependent on an estimated size of the file to be written. In another embodiment, a scheme for allocating memory locations for a relocation operation, such as for garbage collection or data compaction, is dependent on an estimated access frequency of the file in question. In this way, the optimal handling scheme can be used for the particular file at any time.
摘要翻译：在具有文件存储系统的存储器系统中，基于正在处理的文件的属性，从其组中自适应地选择最佳文件处理方案。可以从主机获取文件属性，或者从文件的历史记录中获取文件属性。在一个实施例中，用于分配用于写入操作的存储器位置的方案取决于要写入的文件的估计大小。在另一个实施例中，用于分配诸如垃圾收集或数据压缩的重定位操作的存储器位置的方案取决于所讨论的文件的估计访问频率。这样，最优处理方案可以随时用于特定文件。

58. 发明申请

US20090037651A1 Non-Volatile Memory and Method with Phased Program Failure Handling 有权
标题翻译：非易失性存储器和相位程序故障处理方法
公开(公告)号：US20090037651A1
公开(公告)日：2009-02-05
申请号：US12248160
申请日：2008-10-09
申请人： Sergey Anatolievich Gorobets
发明人： Sergey Anatolievich Gorobets
IPC分类号： G06F12/02
CPC分类号： G06F11/1666 , G06F11/1072 , G06F11/141 , G06F11/1415 , G06F11/1658 , G06F12/0246 , G06F2212/7202 , G06F2212/7203 , G06F2212/7205 , G06F2212/7208 , G11C11/5621 , G11C11/5628 , G11C16/102 , G11C16/105 , G11C16/20 , G11C29/00 , G11C29/76 , G11C2211/5641
摘要： In a memory with block management system, program failure in a block during a time-critical memory operation is handled by continuing the programming operation in a breakout block. Later, at a less critical time, the data recorded in the failed block prior to the interruption is transferred to another block, which could also be the breakout block. The failed block can then be discarded. In this way, when a defective block is encountered during programming, it can be handled without loss of data and without exceeding a specified time limit by having to transfer the stored data in the defective block on the spot. This error handling is especially critical for a garbage collection operation so that the entire operation need not be repeated on a fresh block during a critical time. Subsequently, at an opportune time, the data from the defective block can be salvaged by relocation to another block.
摘要翻译：在具有块管理系统的存储器中，通过在分组块中继续编程操作来处理在时间紧急的存储器操作期间块中的程序故障。之后，在不太关键的时刻，在中断之前记录在故障块中的数据被传送到另一个块，也可以是分组块。然后可以丢弃失败的块。以这种方式，当在编程期间遇到有缺陷的块时，可以在不丢失数据的情况下处理而不超过指定的时间限制，因为必须现场将存储的数据传送到缺陷块中。这种错误处理对于垃圾收集操作尤其重要，因此在关键时刻不需要在新块上重复整个操作。随后，在适当的时间，来自缺陷块的数据可以通过重新定位到另一个块来进行抢救。

59. 发明授权

US07480766B2 Interfacing systems operating through a logical address space and on a direct data file basis 有权
标题翻译：通过逻辑地址空间和基于直接数据文件操作的接口系统
公开(公告)号：US07480766B2
公开(公告)日：2009-01-20
申请号：US11196869
申请日：2005-08-03
申请人： Sergey Anatolievich Gorobets
发明人： Sergey Anatolievich Gorobets
IPC分类号： G06F12/06 , G06F13/10
CPC分类号： G06F12/0246 , G06F3/0607 , G06F3/0643 , G06F3/0679 , G06F2212/7201
摘要： A re-programmable non-volatile semiconductor memory, such as flash memory, operates to store files with logical addresses including a unique file identifier and offsets of data within the file, termed direct data file storage. Data files generated by a host may be stored directly in such a memory through a file interface. But if a traditional host/memory interface using a continuous logical address space is being used to identify multiple files, the address space is divided into contiguous logical files, and then these files are treated in the same manner as files obtained directly from a host. Both types of interfaces may be included in the same memory system.
摘要翻译：可重新编程的非易失性半导体存储器，例如闪速存储器，用于存储具有逻辑地址的文件，包括唯一的文件标识符和文件内的数据的偏移，称为直接数据文件存储。由主机生成的数据文件可以通过文件接口直接存储在这样的存储器中。但是，如果使用连续逻辑地址空间的传统主机/内存接口来标识多个文件，则将地址空间分成连续的逻辑文件，然后以与从主机直接获取的文件相同的方式处理这些文件。两种类型的接口可以被包括在相同的存储器系统中。

60. 发明申请

US20080294814A1 Flash Memory System with Management of Housekeeping Operations 审中-公开
标题翻译：具有管理业务的闪存系统
公开(公告)号：US20080294814A1
公开(公告)日：2008-11-27
申请号：US11753491
申请日：2007-05-24
申请人： Sergey Anatolievich Gorobets
发明人： Sergey Anatolievich Gorobets
IPC分类号： G06F13/12
CPC分类号： G11C16/349 , G11C16/04 , G11C2029/0409
摘要： A flash re-programmable, non-volatile memory system is operated to disable foreground execution of housekeeping operations, such as wear leveling and data scrub, in the when operation of the host would be excessively slowed as a result. One or more characteristics of patterns of activity of the host are monitored by the memory system in order to determine when housekeeping operations may be performed without significantly degrading the performance of the memory system, particularly during writing of data from the host into the memory.
摘要翻译：操作闪存可重新编程的非易失性存储器系统，以在主机的运行过程中由于主机的运行过慢而禁止前端执行内务管理操作（例如损耗均衡和数据擦除）。主机的活动模式的一个或多个特征由存储器系统监视，以便确定何时可执行内部管理操作而不显着降低存储器系统的性能，特别是在将数据从主机写入存储器期间。

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