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51. 发明授权

US5204883A Method and apparatus for recognition of a framing pattern distributed in a serial bit stream 失效
标题翻译：用于识别在串行数据流中分布的帧模式的方法和装置
公开(公告)号：US5204883A
公开(公告)日：1993-04-20
申请号：US693894
申请日：1991-05-01
申请人： Alain Blanc
发明人： Alain Blanc
IPC分类号： G06F13/00 , G06F13/38 , H04J3/06 , H04L7/08
CPC分类号： H04J3/0608
摘要： Method and apparatus for recognizing of a framing pattern of M single bits distributed at intervals of a fixed number, N of bits, as measured from the start of one framing bit to the start of the next, in an incoming serial bit stream. The system makes a computation following each reception of an arbitrary group of N incoming data, and after the minimum number of computation steps to distinguish between a `look-alike` framing pattern and a `true` framing pattern, points out with no ambiguity the very position of the "true" pattern within the bit stream, thus allowing synchronization over that stream.

52. 发明授权

US5081276A Polyfunctional ethylenic monomers 失效
标题翻译：多功能乙烯单体
公开(公告)号：US5081276A
公开(公告)日：1992-01-14
申请号：US574320
申请日：1990-08-29
申请人： Didier Wilhelm , Alain Blanc
发明人： Didier Wilhelm , Alain Blanc
IPC分类号： C07C69/734 , C07C45/00 , C07C49/255 , C07C49/84 , C07C67/00 , C07C69/533 , C07C69/73 , C07C69/736 , C07C213/00 , C07C219/08 , C07C253/00 , C07C255/15 , C07C255/36 , C07C271/62 , C07D317/16 , C07D317/20 , C07D317/30 , C07D319/06 , C08F16/36 , C08F16/38 , C08F20/00 , C08F20/10 , C08F20/20 , C08F20/26 , C08F20/34 , C08F20/42 , C08F24/00 , C08F116/38 , C08F120/12 , C08F120/28 , C08F120/34 , C08F120/42 , C08F124/00 , C08F220/42
CPC分类号： C07C255/00
摘要： The invention concerns new polyfunctional ethylenic monomers of the general formula (I): ##STR1## where R.sub.1 and R.sub.2 each represent --CHR.sub.3 R.sub.4 where R.sub.3 and R.sub.4 may be identical or different and represent H or an alkyl, alkenyl or aralkyl group. R.sub.1 and R.sub.2 may, alternatively, together form a radical --CH.sub.2 --(CR.sub.5 R.sub.6).sub.n --CHR.sub.7 where n=0 or 1 and R.sub.5, R.sub.6 and R.sub.7 may be identical or different and represent H or CH.sub.3.Particular monomers are:2-cyano-4,4-dimethoxy-3-hydroxy-1-butene;2-cyano-4,4-dibutoxy-3-hydroxy-1-butene.

53. 发明授权

US4650877A Process for producing 4,5-dihydroxy-2-imidazolidinones 失效
标题翻译：制备4,5-二羟基-2-咪唑啉酮的方法
公开(公告)号：US4650877A
公开(公告)日：1987-03-17
申请号：US664793
申请日：1984-10-25
申请人： Frederic Mabire , Alain Blanc
发明人： Frederic Mabire , Alain Blanc
IPC分类号： C07D233/40 , D06M13/02 , D06M13/322 , D06M13/35 , D06M13/352 , D06M13/402 , D06M13/432
CPC分类号： C07D233/40
摘要： The invention concerns a process for producing cyclic ureas of the general formula (II): ##STR1## in which R is selected from the group comprising hydrogen atom and C.sub.1 -C.sub.4 alkyl radicals through condensation in aqueous medium at a pH of between 4 and 7 and at a temperature of between 40.degree. and 60.degree. C. of glyoxal with or without excess of a urea having the general formula (I):RNH--CO--NHR (I)in which R has the same meaning as above, said process being conducted in the presence of a catalytic amount of orthophosphoric acid.
摘要翻译：本发明涉及一种制备通式（II）的环脲的方法：其中R选自氢原子和C 1 -C 4烷基基团，其中R是在水介质中，在具有或不含过量具有通式（I）的脲的乙二醛的温度为40至60℃的温度下，在其中R具有与上述相同的含义的RNH-CO-NHR（I）所述方法在催化量的正磷酸的存在下进行。

54. 发明授权

US08009702B2 Method and arrangement for local sychronization in master-slave distributed communication systems 有权
标题翻译：主从分布式通信系统中本地同步的方法和布置
公开(公告)号：US08009702B2
公开(公告)日：2011-08-30
申请号：US12777439
申请日：2010-05-11
申请人： Michel Colmant , Alan Benner , Francois G. Abel , Michel Poret , Norbert Schumacher , Alain Blanc , Mark Verhappen , Mitch Gusat
发明人： Michel Colmant , Alan Benner , Francois G. Abel , Michel Poret , Norbert Schumacher , Alain Blanc , Mark Verhappen , Mitch Gusat
IPC分类号： H04J3/06
CPC分类号： H04L49/153 , H04L49/254 , H04L49/3009 , H04L49/3072 , H04L49/3081 , H04L49/45
摘要： A communication system which consists of several modules—operating in parallel on segments of a packet—to increase speed and handling capacity. One module acts as master, the others are slave modules controlled by control signals derived by the master module. It is important that in each module the data segment and the respective control signal of each packet are correctly synchronized, because in large systems the data paths carrying packet segments and the control signal paths may have substantially different delays. The invention provides for measurement of the propagation delay differences and for introducing a controlled delay in each slave module, so that data segments and control signals can be correctly correlated by delaying either the one or the other. Synchronization packets are transmitted besides normal data packets, for obtaining time stamps which are used to determine the delay difference.
摘要翻译：一种通信系统，由多个模块组成，在分组的分段上并行运行，以提高速度和处理能力。一个模块作为主机，其他模块由主模块导出的控制信号控制的从模块。重要的是，在每个模块中，数据段和每个分组的相应控制信号被正确同步，因为在大系统中，承载分组段和控制信号路径的数据路径可能具有显着不同的延迟。本发明提供了传播延迟差的测量和用于在每个从模块中引入受控延迟，使得数据段和控制信号可以通过延迟其中一个或另一个来正确地相关。同步数据包除正常数据包之外传输，用于获取用于确定延迟差的时间戳。

55. 发明授权

US07773602B2 CAM based system and method for re-sequencing data packets 有权
标题翻译：基于CAM的系统和重新排序数据包的方法
公开(公告)号：US07773602B2
公开(公告)日：2010-08-10
申请号：US12123602
申请日：2008-05-20
申请人： Alain Blanc , Rene Glaise , Michel Poret , Rene Gallezot
发明人： Alain Blanc , Rene Glaise , Michel Poret , Rene Gallezot
IPC分类号： H04L12/28
CPC分类号： H04L67/1002 , H04L47/50 , H04L49/1523 , H04L49/3045 , H04L49/552 , H04L49/9094
摘要： An embodiment of the system operates in a parallel packet switch architecture having at least one egress adapter arranged to receive data packets issued from a plurality of ingress adapters and switched through a plurality of independent switching planes. Each received data packet belongs to one sequence of data packets among a plurality of sequences where the data packets are numbered with a packet sequence number (PSN) assigned according to at least a priority level of the data packet. Each data packet received by the at least one egress adapter has a source identifier to identify the ingress adapter from which it is issued. The system for restoring the sequences of the received data packets operates within the egress adapter and comprises buffer for temporarily storing each received data packet at an allocated packet buffer location, a controller, and a determination means coupled to a storing means and extracting means.
摘要翻译：该系统的一个实施例在具有至少一个出口适配器的并行分组交换机体系结构中操作，所述出口适配器布置成接收从多个入口适配器发出的数据分组，并且通过多个独立交换平面切换。每个接收到的数据分组属于多个序列中的一个数据分组序列，其中数据分组根据数据分组的至少优先级分配的分组序列号（PSN）进行编号。由至少一个出口适配器接收的每个数据分组具有源标识符，用于标识从其发出的入口适配器。用于恢复接收到的数据分组的序列的系统在出口适配器内操作，并且包括用于在分配的分组缓冲器位置临时存储每个接收的数据分组的缓冲器，控制器和耦合到存储装置和提取装置的确定装置。

56. 发明授权

US07668672B2 Optimizing high speed signal transmission 失效
标题翻译：优化高速信号传输
公开(公告)号：US07668672B2
公开(公告)日：2010-02-23
申请号：US11764453
申请日：2007-06-18
申请人： Alain Blanc , Patrick Jeanniot
发明人： Alain Blanc , Patrick Jeanniot
IPC分类号： G01R13/00 , H04B17/00
CPC分类号： H04L25/03343 , H04L1/0001 , H04L1/20 , H04L7/0337 , H04L2025/03375
摘要： A method and systems for automatically adjusting the parameters of signal emitter in a synchronous high-speed transmission system, is disclosed. According to the method of the invention, the quality of a high-speed received signal is analyzed for a plurality of sets of parameter values and the one producing the best signal quality is selected. In a first embodiment, the quality of the high-speed received signal is determined by analyzing a digital eye characterizing the signal behavior, obtained by over-sampling the high-speed received signal. In a second embodiment, the quality of the high-speed received signal is determined by analyzing the behavior of the phase rotator used for data sampling. Finally, in a third embodiment, the quality of the high-speed received signal is determined by analyzing a digital eye, obtained by moving the position of a phase rotator from one end to the other and sampling data at each position.
摘要翻译：公开了一种在同步高速传输系统中自动调整信号发射器参数的方法和系统。根据本发明的方法，对多组参数值分析高速接收信号的质量，并选择产生最佳信号质量的参数值。在第一实施例中，通过分析表征由高速接收信号过采样得到的信号行为的数字眼来确定高速接收信号的质量。在第二实施例中，通过分析用于数据采样的相位旋转器的行为来确定高速接收信号的质量。最后，在第三实施例中，通过分析通过将相位旋转器的位置从一端移动到另一端而获得的数字眼，并且在每个位置处采样数据来确定高速接收信号的质量。

57. 发明申请

US20090141733A1 ALGORTIHM AND SYSTEM FOR SELECTING ACKNOWLEDGMENTS FROM AN ARRAY OF COLLAPSED VOQ'S 失效
标题翻译：从收集的VOQ的阵列中选择确认的算法和系统
公开(公告)号：US20090141733A1
公开(公告)日：2009-06-04
申请号：US12365091
申请日：2009-02-03
申请人： Alain Blanc , Rene Glaise , Francois Le Maut , Michel Poret
发明人： Alain Blanc , Rene Glaise , Francois Le Maut , Michel Poret
IPC分类号： H04L12/56
CPC分类号： H04L49/3027 , H04L49/103 , H04L49/201 , H04L49/3045
摘要： A method for selecting packets to be switched in a collapsed virtual output queuing array (cVOQ) switch core, using a request/acknowledge mechanism. According to the method, an efficient set of virtual output queues (at most one virtual output queue per ingress adapter) is selected, while keeping the algorithm simple enough to allow its implementation in fast state machines. For determining a set of virtual output queues that are each authorized to send a packet, the algorithm is based upon degrees of freedom characterizing states of ingress and egress adapters. For example, the degree of freedom, derived from the collapsed virtual output queuing array, could represent the number of egress ports to which an ingress port may send packet, or the number of ingress ports from which an egress port may receive packets, at a given time. Analyzing all the ingress ports holding at least one data packet, from the lesser degree of freedom to the greater degree of freedom, the algorithm determines as many virtual output queues as possible, in the limit of the number of ingress ports (an ingress port may send only one packet per packet-cycle).
摘要翻译：一种用于使用请求/确认机制来选择在折叠虚拟输出排队阵列（cVOQ）切换核心中切换的分组的方法。根据该方法，选择一组有效的虚拟输出队列（每个入口适配器最多有一个虚拟输出队列），同时保持算法足够简单，以允许其在快速状态机中实现。为了确定每个被授权发送分组的一组虚拟输出队列，该算法基于入射和出口适配器状态的自由度。例如，从折叠的虚拟输出排队阵列导出的自由度可以表示入口端口可以发送分组的出口端口的数量，或出口端口可以从其接收分组的入口端口的数量，给定时间分析至少一个数据包的入口端口，从较小的自由度到较大的自由度，该算法在入口端口数量的限制中尽可能地确定尽可能多的虚拟输出队列（入口端口可能每个分组周期只发送一个分组）。

58. 发明授权

US07477685B2 Method and systems for analyzing the quality of high-speed signals 失效
标题翻译：分析高速信号质量的方法和系统
公开(公告)号：US07477685B2
公开(公告)日：2009-01-13
申请号：US11774572
申请日：2007-07-07
申请人： Alain Blanc , Patrick Jeanniot
发明人： Alain Blanc , Patrick Jeanniot
IPC分类号： H04B3/46 , H04Q1/20
CPC分类号： H04L1/20
摘要： Methods and systems for analyzing the quality of high-speed signals are provided, wherein a high speed signal is sampled simultaneously a plurality of times during a sampling clock period at each of a plurality of phase rotator positions to generate a plurality of partial values, wherein subset pluralities of the partial values are associated to phase rotator positions. The partial values are combined into a global value which is analyzed to determine a quality of the high speed signal. Phase rotator behavior may also be analyzed to determine signal quality. A best position to lock a phase rotator when determining signal quality may be determined from a graphic characterization of a phase rotator position distribution.
摘要翻译：提供了用于分析高速信号质量的方法和系统，其中在多个相位旋转器位置中的每个相位旋转器位置处的采样时钟周期期间，高速信号被同时多次采样以产生多个部分值，其中子集多个部分值与相位旋转器位置相关联。将部分值组合成全局值，该值被分析以确定高速信号的质量。也可以分析相位旋转器行为以确定信号质量。确定信号质量时锁定相位旋转器的最佳位置可以从相位旋转器位置分布的图形表征来确定。

59. 发明申请

US20080267206A1 CAM BASED SYSTEM AND METHOD FOR RE-SEQUENCING DATA PACKETS 有权
标题翻译：基于CAM的系统和用于重新排序数据包的方法
公开(公告)号：US20080267206A1
公开(公告)日：2008-10-30
申请号：US12123602
申请日：2008-05-20
申请人： Alain Blanc , Rene Glaise , Michel Poret , Rene Gallezot
发明人： Alain Blanc , Rene Glaise , Michel Poret , Rene Gallezot
IPC分类号： H04L12/56
CPC分类号： H04L67/1002 , H04L47/50 , H04L49/1523 , H04L49/3045 , H04L49/552 , H04L49/9094
摘要： An embodiment of the system operates in a parallel packet switch architecture having at least one egress adapter arranged to receive data packets issued from a plurality of ingress adapters and switched through a plurality of independent switching planes. Each received data packet belongs to one sequence of data packets among a plurality of sequences where the data packets are numbered with a packet sequence number (PSN) assigned according to at least a priority level of the data packet. Each data packet received by the at least one egress adapter has a source identifier to identify the ingress adapter from which it is issued. The system for restoring the sequences of the received data packets operates within the egress adapter and comprises buffer for temporarily storing each received data packet at an allocated packet buffer location, a controller, and a determination means coupled to a storing means and extracting means.
摘要翻译：该系统的一个实施例在具有至少一个出口适配器的并行分组交换机体系结构中操作，所述出口适配器布置成接收从多个入口适配器发出的数据分组，并且通过多个独立交换平面切换。每个接收到的数据分组属于多个序列中的一个数据分组序列，其中数据分组根据数据分组的至少优先级分配的分组序列号（PSN）进行编号。由至少一个出口适配器接收的每个数据分组具有源标识符，用于标识从其发出的入口适配器。用于恢复接收到的数据分组的序列的系统在出口适配器内操作，并且包括用于在分配的分组缓冲器位置临时存储每个接收的数据分组的缓冲器，控制器和耦合到存储装置和提取装置的确定装置。

60. 发明授权

US07400629B2 CAM based system and method for re-sequencing data packets 有权
标题翻译：基于CAM的系统和重新排序数据包的方法
公开(公告)号：US07400629B2
公开(公告)日：2008-07-15
申请号：US10723834
申请日：2003-11-26
申请人： Alain Blanc , Rene Glaise , Michel Poret , Rene Gallezot
发明人： Alain Blanc , Rene Glaise , Michel Poret , Rene Gallezot
IPC分类号： H04L12/28
CPC分类号： H04L67/1002 , H04L47/50 , H04L49/1523 , H04L49/3045 , H04L49/552 , H04L49/9094
摘要： A system for resequencing data packets is disclosed. In a preferred embodiment, the system operates in a parallel packet switch architecture having at least one egress adapter arranged to receive data packets issued from a plurality of ingress adapters and switched through a plurality of independent switching planes. Each received data packet belongs to one sequence of data packets among a plurality of sequences where the data packets are numbered with a packet sequence number (PSN) assigned according to at least a priority level of the data packet. Each data packet received by the at least one egress adapter is further having a source identifier to identify the ingress adapter from which it is issued. The system for restoring the sequences of the received data packets operates within the egress adapter and comprises buffer for temporarily storing each received data packet at an allocated packet buffer location. Furthermore, controller to extract the packet sequence number, the source identifier and the priority level of each stored data packet. And determination means coupled to the storing means and to the extracting means allow to determine for each sequence of data packet the order of the data packets to be output from the egress adapter.
摘要翻译：公开了一种用于重新排序数据包的系统。在优选实施例中，系统以并行分组交换架构操作，其具有布置成接收从多个入口适配器发出并通过多个独立交换平面切换的数据分组的至少一个出口适配器。每个接收到的数据分组属于多个序列中的一个数据分组序列，其中数据分组根据数据分组的至少优先级分配的分组序列号（PSN）进行编号。由至少一个出口适配器接收的每个数据分组还具有源标识符以识别从其发出的入口适配器。用于恢复接收到的数据分组的序列的系统在出口适配器内操作，并且包括用于在分配的分组缓冲器位置临时存储每个接收到的数据分组的缓冲器。此外，控制器提取每个存储的数据包的包序列号，源标识符和优先级。以及耦合到所述存储装置并且所述提取装置的确定装置允许针对每个数据分组序列确定要从所述出口适配器输出的数据分组的顺序。

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