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51. 发明申请

US20060252898A1 Granulated powder of low-molecular polytetrafluoro-ethylene and powder of low-molecular polyterafluoro-ethylene and processes for producing both 有权
标题翻译：低分子聚四氟乙烯的粉末粉末和低分子聚氟乙烯的粉末及其制造方法
公开(公告)号：US20060252898A1
公开(公告)日：2006-11-09
申请号：US10547363
申请日：2004-03-01
申请人： Masayuki Tsuji , Yasuhiko Sawada
发明人： Masayuki Tsuji , Yasuhiko Sawada
IPC分类号： C08F214/18
CPC分类号： C08J3/124 , C08F14/26 , C08J2327/18 , Y10T428/2982 , C08F2/02
摘要： This invention provides a granulated powder of low-molecular-weight polytetrafluoroethylene reduced in the possibility of the powder being blown up or adhering to hoppers, a low-molecular-weight polytetrafluoroethylene powder obtainable by suspension polymerization, and methods of producing these. The present invention provides a low-molecular-weight polytetrafluoroethylene-based granulated powder which is obtained by a granulation treatment of a low-molecular-weight polytetrafluoroethylene particle comprising a low-molecular-weight polytetrafluoroethylene having a number average molecular weight of not higher than 600000.
摘要翻译：本发明提供一种低分子量聚四氟乙烯的粉碎粉末，其可以将粉末吹入或粘附到料斗上，通过悬浮聚合得到的低分子量聚四氟乙烯粉末及其制备方法。本发明提供一种低分子量聚四氟乙烯系造粒粉末，其通过将数均分子量不高于600000的低分子量聚四氟乙烯的低分子量聚四氟乙烯粒子进行造粒处理而得到。

52. 发明申请

US20060200692A1 Microprocessor 失效
公开(公告)号：US20060200692A1
公开(公告)日：2006-09-07
申请号：US11165239
申请日：2005-06-24
申请人： Ryosuke Kito , Masayuki Tsuji
发明人： Ryosuke Kito , Masayuki Tsuji
IPC分类号： G06F1/26
CPC分类号： G06F1/3228 , G06F1/3243 , Y02D10/152
摘要： A processor core adopts a pipeline processing method and has an interlock mechanism. A built-in accelerator executes a specific processing in place of the processor core. When a processing is executed by the built-in accelerator and there is no processing to be executed by the processor core, the interlock mechanism stops and restarts the pipeline processing in response to a start of processing and a processing completion of the built-in accelerator, respectively. A processing-completion waiting operation to the built-in accelerator is implemented by using the interlock mechanism, and thus useless power consumption of the processor core during the processing of the built-in accelerator can be easily reduced.

53. 发明申请

US20060133676A1 Device and method for image processing 失效
公开(公告)号：US20060133676A1
公开(公告)日：2006-06-22
申请号：US11089359
申请日：2005-03-25
申请人： Yasuhiro Yamazaki , Masayuki Tsuji
发明人： Yasuhiro Yamazaki , Masayuki Tsuji
IPC分类号： G06K9/36
CPC分类号： H04N5/147 , G06T7/254 , G06T2207/10016 , H04N19/142 , H04N19/42 , H04N19/423 , H04N19/87
摘要： In an image processing device, a scene-change detection unit captures first data of first pixels constituting a first picture and second data of second pixels constituting a second picture with the first and second pixels thinned out, and detects a scene change in the first picture based on differences between the first and second data, where the second picture immediately precedes the first picture. A transfer control unit controls operations of reading out at intervals from a storage device data of groups of a predetermined number of pixels consecutively arranged along a horizontal direction in at least the second picture, and transferring the data of the groups to the scene-change detection unit through a data bus, where the predetermined number corresponds to the maximum number of pixels which can be concurrently transferred through the data bus, or an integer multiple of the maximum number.

54. 发明授权

US07043519B2 SIMD sum of product arithmetic method and circuit, and semiconductor integrated circuit device equipped with the SIMD sum of product arithmetic circuit 有权
标题翻译：产品算术方法和电路的SIMD和以及配备有产品运算电路SIMD和的半导体集成电路器件
公开(公告)号：US07043519B2
公开(公告)日：2006-05-09
申请号：US09945697
申请日：2001-09-05
申请人： Masayuki Tsuji
发明人： Masayuki Tsuji
IPC分类号： G06F7/00 , G06F7/38
CPC分类号： G06F7/5443
摘要： In an SIMD sum of product arithmetic method of enabling a concurrent execution of 2n (where n is a natural number) parallel sum of product arithmetic (operations), the SIMD sum of product arithmetic is executed using 2m (m=0, . . . , log2 n) accumulators as one set, and by replacing a 2p−1th accumulator with an adjacent 2pth (p=1, . . . , n/2) accumulator, without changing a sequence of accumulator addresses, in the set, as accumulator addresses to be allocated to sum of product arithmetic circuits for the SIMD sum of product arithmetic.
摘要翻译：在能够并行执行2n（其中n是自然数）的乘积运算（运算）的并行和的乘积运算方法的SIMD之和中，乘积运算的SIMD和是使用2＆lt; （m = 0，...，log 2）n个累加器，并且通过用相邻的2pth（p = 1，...，n / 2）替换第2p-1个累加器，累加器，而不改变集合中的累加器地址序列，作为要分配给产品运算电路和乘积运算的SIMD和的总和的累加器地址。

55. 发明授权

US06989714B2 Class D amplifier 失效
公开(公告)号：US06989714B2
公开(公告)日：2006-01-24
申请号：US11146124
申请日：2005-06-07
申请人： Kenichi Taura , Masayuki Tsuji , Masayuki Ishida , Tsuyoshi Nakada
发明人： Kenichi Taura , Masayuki Tsuji , Masayuki Ishida , Tsuyoshi Nakada
IPC分类号： H03F3/217
CPC分类号： H03F3/217 , H03F2200/331
摘要： A pulse modulated signal (ei) output from a pulse modulator (1) and a feedback signal (ef) containing distortion caused by a power switch (3) are integrated in a first integrator (21) and a second integrator (24), respectively, and are input to input terminals of a comparator (25 or 29), respectively, so that a correction signal (Vc) is generated.

56. 发明授权

US06665043B1 Bonding method and bonding device of substrates and manufacturing method of a liquid crystal display device 有权
标题翻译：基板的接合方法和接合装置以及液晶显示装置的制造方法
公开(公告)号：US06665043B1
公开(公告)日：2003-12-16
申请号：US09643691
申请日：2000-08-22
申请人： Motohiro Okuyama , Nobuhiro Waka , Masayuki Tsuji , Michio Hori , Yuji Fukushima , Kazuyuki Tamura
发明人： Motohiro Okuyama , Nobuhiro Waka , Masayuki Tsuji , Michio Hori , Yuji Fukushima , Kazuyuki Tamura
IPC分类号： G02F11341
CPC分类号： G02F1/1333 , G02F2001/133354
摘要： A substrate bonding method in which a pair of masks which were prepared by forming a recessed section at a center part of each flat plate are placed on upper and lower stages, respectively, so that the recessed sections face a CF substrate and a TFT substrate, the CF substrate and TFT substrate are positioned one upon another and bonded together by sandwiching them between the masks. With this method, not only the CF substrate and TFT substrate are protected by the recessed sections from both sides, but also the dimensions of a region of each of the CF substrate and TFT substrate protected by the recessed sections are easily changed by replacing the masks. It is thus possible to provide a substrate bonding method that can readily meet the manufacture of bonded substrates of a variety of dimensions.
摘要翻译：一种基板接合方法，其中通过在每个平板的中心部分形成凹部而制备的一对掩模分别放置在上层和下层上，使得凹部面向CF基板和TFT基板， CF基板和TFT基板彼此定位并通过将它们夹在掩模之间而结合在一起。通过这种方法，不仅CF基板和TFT基板被两侧的凹部保护，而且由凹部保护的CF基板和TFT基板的各个区域的尺寸容易地通过更换掩模。因此，可以提供能够容易地满足各种尺寸的接合基板的制造的基板接合方法。

57. 发明授权

US06664849B1 Digital FM demodulator performing amplitude compensation 失效
标题翻译：数字FM解调器执行幅度补偿
公开(公告)号：US06664849B1
公开(公告)日：2003-12-16
申请号：US09614680
申请日：2000-07-12
申请人： Kenichi Taura , Masayuki Tsuji , Masahiro Tsujishita , Masayuki Ishida
发明人： Kenichi Taura , Masayuki Tsuji , Masahiro Tsujishita , Masayuki Ishida
IPC分类号： H03D300
CPC分类号： H03D3/002
摘要： A digital FM demodulator converts a digital FM input signal to a demodulated signal, detects the amplitude of the digital FM input signal, generates a corresponding amplitude signal, and adjusts the amplitude of the demodulated signal according to the amplitude signal, thereby compensating for variations in the amplitude of the digital FM input signal and removing amplitude distortion from the demodulated signal. This reduces the performance requirements of, for example, a low-pass analog filter preceding the digital FM demodulator in an FM radio broadcast receiver, permitting the analog filter to be implemented in a semiconductor integrated circuit.
摘要翻译：数字FM解调器将数字FM输入信号转换为解调信号，检测数字FM输入信号的幅度，产生相应的幅度信号，并根据振幅信号调整解调信号的幅度，从而补偿数字FM输入信号的幅度和解调信号的幅度失真。这降低了例如在FM无线电广播接收机中的数字FM解调器之前的低通模拟滤波器的性能要求，允许模拟滤波器在半导体集成电路中实现。

58. 发明授权

US06516333B1 Sticky bit value predicting circuit 有权
标题翻译：粘滞位值预测电路
公开(公告)号：US06516333B1
公开(公告)日：2003-02-04
申请号：US09468852
申请日：1999-12-21
申请人： Masayuki Tsuji
发明人： Masayuki Tsuji
IPC分类号： G06F738
CPC分类号： G06F7/4876 , G06F7/49952
摘要： A sticky bit value of the product of mantissas X and Y is predicted by a circuit that comprises a bit pattern generation circuit 25A that generates a bit pattern B, based on a trailing zero bit pattern of the multiplier Y, having all values of the sticky bit S corresponding to any number C of the trailing 0s of the multiplicand X; a priority encoder 21 for providing the number C depending on X; and a sticky bit selection circuit 26A for selecting one bit in the bit pattern B as a value of the sticky bit S depending on the value C.
摘要翻译：尾数X和Y的乘积的粘滞位值由包括产生位模式B的位模式产生电路25A的电路预测，该比特模式产生电路25A基于乘法器Y的尾随零位模式，具有所有粘性值对应于被乘数X的尾随0的任意数目C的位S; 用于根据X提供数量C的优先编码器21; 以及粘滞位选择电路26A，用于根据值C选择位模式B中的一个位作为粘滞位S的值。

59. 发明授权

US06458457B1 Filler-free granular polytetrafluoroethylene powder and process for producing the same 有权
标题翻译：无填料粒状聚四氟乙烯粉末及其制造方法
公开(公告)号：US06458457B1
公开(公告)日：2002-10-01
申请号：US09381129
申请日：1999-09-16
申请人： Michio Asano , Masayuki Tsuji
发明人： Michio Asano , Masayuki Tsuji
IPC分类号： B32B516
CPC分类号： C08J3/12 , C08J2327/18 , Y10T428/2982
摘要： To provide a PTFE granular powder containing no filler which has a large apparent density, a small average particle size, a narrow particle size distribution, a small electrostatic charge, a small angle of repose and an excellent powder flowability, and a process for preparing the same. The granular powder is prepared by granulation of a PTFE powder in water with stirring in the presence of an organic liquid forming liquid-liquid interface with water and a nonionic and/or anionic surfactant. A molded article obtained from the granular powder is excellent in tensile strength and elongation and has a small surface roughness, a high electrostatic charge and a high whiteness (Z value).
摘要翻译：为了提供不含填料的PTFE粒状粉末，其表观密度大，平均粒径小，粒径分布窄，静电荷小，休止角小，粉末流动性优异的方法，相同。在与水和非离子和/或阴离子表面活性剂形成液 - 液界面的有机液体的存在下，搅拌下将PTFE粉末在水中制粒，制备粒状粉末。由粒状粉末得到的成型品的拉伸强度和伸长率优异，表面粗糙度小，静电荷高，白度高（Z值）高。

60. 发明授权

US5727224A Document image processor for inserting and editing bracket symbols and associated text 失效
标题翻译：用于插入和编辑括号和相关文本的文档图像处理器
公开(公告)号：US5727224A
公开(公告)日：1998-03-10
申请号：US611708
申请日：1996-03-06
申请人： Masayuki Tsuji
发明人： Masayuki Tsuji
IPC分类号： G06F17/21 , G06F17/00
CPC分类号： G06F17/215
摘要： A computer text and symbol editor, such as a word processing software program, has a bracket editing software tool to insert and revise bracket symbols. The document information processing device includes an input means for inputting document text information and symbolic information including bracket symbols that extend over a plurality of horizontal or vertical lines of screen text. The input device has a corresponding input position indicating means for indicating an input position in the document information; and a symbol-inputting-position determining means for determining a position of inputting the bracket symbol. The device may include a bracket symbol length discriminating means for judging the symbol length, and a retrieving means for retrieving the bracket symbol information in a document storage means from the position specified by the input position indicating means.
摘要翻译：计算机文本和符号编辑器（例如文字处理软件程序）具有插入和修改括弧符号的支架编辑软件工具。文件信息处理装置包括用于输入文本文本信息的输入装置和包括在屏幕文本的多个水平或垂直线上延伸的括号的符号信息。输入装置具有对应的输入位置指示装置，用于指示文档信息中的输入位置; 以及符号输入位置确定装置，用于确定输入括号的位置。该装置可以包括用于判断符号长度的支架符号长度鉴别装置，以及用于从输入位置指示装置指定的位置检索文档存储装置中的括号符号信息的检索装置。

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