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51. 发明授权

US07840709B1 Multi-speed serial interface for media access control and physical layer devices 有权
标题翻译：用于媒体访问控制和物理层设备的多速串行接口
公开(公告)号：US07840709B1
公开(公告)日：2010-11-23
申请号：US11891929
申请日：2007-08-14
申请人： William Lo , Nafea Bishara
发明人： William Lo , Nafea Bishara
IPC分类号： G06F15/16
CPC分类号： H04L65/60 , H04L49/3054 , H04L49/352
摘要： A network device comprises a data translator that receives a first data stream at a first data rate and that includes a data sampler that selects one of X data symbols that are received, wherein the one of the X data symbols includes (M+N) bits, and that outputs a second data stream at a second data rate and a data remover that removes N of the (M+N) bits and that outputs a third data stream including symbols with the M bits at a third data rate. A physical layer device receives the third data stream.
摘要翻译：网络设备包括数据转换器，其以第一数据速率接收第一数据流，并且包括选择接收的X个数据符号之一的数据采样器，其中所述X个数据符号中的一个包括（M + N）位，并且以第二数据速率输出第二数据流，以及数据去除器，其去除（M + N）位的N，并且以第三数据速率输出包括具有M位的符号的第三数据流。物理层设备接收第三数据流。

52. 发明授权

US07590114B1 Efficient IP multicast bridging in ethernet switches 有权
标题翻译：以太网交换机中高效的IP组播桥接
公开(公告)号：US07590114B1
公开(公告)日：2009-09-15
申请号：US10773474
申请日：2004-02-05
申请人： Nafea Bishara
发明人： Nafea Bishara
IPC分类号： H04L12/28
CPC分类号： H04L12/18 , H04L12/56 , H04L45/02 , H04L49/201 , H04L49/351 , H04L49/354
摘要： The invention features a method, apparatus, and computer program. The apparatus comprises a plurality of ports each adapted to receive Ethernet packets; and a data-link layer switch controller, when one of the Ethernet packets comprises an Internet protocol (IP) multicast packet comprising an IP multicast destination address and an IP source address, to select one or more of the ports based upon the IP multicast destination address and the IP source address; wherein the selected one or more ports transmit the Ethernet packet.
摘要翻译：本发明的特征在于一种方法，装置和计算机程序。该装置包括多个端口，每个端口适于接收以太网分组; 以及数据链路层交换控制器，当其中一个以太网分组包括包括IP组播目的地址和IP源地址的因特网协议（IP）组播分组时，根据IP组播目的地选择一个或多个端口地址和IP源地址; 其中所选择的一个或多个端口传送以太网分组。

53. 发明授权

US07424019B1 Packet header altering device 有权
标题翻译：分组报头改变设备
公开(公告)号：US07424019B1
公开(公告)日：2008-09-09
申请号：US10191663
申请日：2002-07-08
申请人： Yaniv Kopelman , Nafea Bishara , Yariv Anafi
发明人： Yaniv Kopelman , Nafea Bishara , Yariv Anafi
IPC分类号： H04L12/28
CPC分类号： H04L61/103 , H04L12/462 , H04L29/0602 , H04L69/22
摘要： A packet processor for a switch/router alters headers of packets and includes a plurality of ports Memory buffers a first portion of a first packet that is received by an incoming port. A control data processor receives a first control portion of the first packet from the incoming port and transmits the first control portion to one or more outgoing ports. A header altering device strips, modifies and encapsulates the first portion on egress from the packet processor based upon one or more protocol layering requirements of the one or more outgoing ports. The protocol layering requirements include bridged or tunneled Ethernet, unicast or multicast multi-protocol label switching (MPLS), and IPv4 and IPv6 routed.
摘要翻译：用于交换机/路由器的分组处理器改变分组的报头，并且包括多个端口存储器缓冲由进入端口接收的第一分组的第一部分。控制数据处理器从入口接收第一分组的第一控制部分，并将第一控制部分发送到一个或多个输出端口。标题改变设备基于一个或多个输出端口的一个或多个协议分层要求，从分组处理器修改和封装出口上的第一部分。协议分层要求包括桥接或隧道以太网，单播或组播多协议标签交换（MPLS）以及IPv4和IPv6路由。

54. 发明授权

US07386699B1 Aligning IP payloads on memory boundaries for improved performance at a switch 有权
标题翻译：在内存边界上对齐IP有效载荷，以提高交换机的性能
公开(公告)号：US07386699B1
公开(公告)日：2008-06-10
申请号：US11761876
申请日：2007-06-12
申请人： Nafea Bishara
发明人： Nafea Bishara
IPC分类号： G06F12/02 , G06F12/16 , G06F7/00
CPC分类号： H04L49/604 , H04L69/22
摘要： A network device includes an alignment module to align payloads of received frames on memory boundaries in a buffer memory. The frames may be Ethernet frames which encapsulate IP (Internet Protocol) packets as payloads. The alignment module prefixes non-data bits to the frame header to shift the IP payload into a position in the memory regions such that the IP payload is aligned with the memory boundaries. The number x of non-data bits is determined according to x=m*c+p, where m is the bit depth of memory regions, n is the length of a header, p is the non-zero remainder of the ratio n/m, and c is an integer.
摘要翻译：网络设备包括对准模块，用于将缓冲存储器中的存储器边界上的接收帧的有效载荷对准。这些帧可以是将IP（因特网协议）分组封装成有效载荷的以太网帧。对准模块将非数据位前缀到帧头部，以将IP有效负载移动到存储器区域中的位置，使得IP有效载荷与存储器边界对准。根据x = m * c + p确定非数据比特数x，其中m是存储区的比特深度，n是头的长度，p是比率的非零余数n / m，c是整数。

55. 发明申请

US20070268918A1 Packet tunneling for wireless clients using maximum transmission unit reduction 审中-公开
标题翻译：使用最大传输单元减少的无线客户端的数据包隧道
公开(公告)号：US20070268918A1
公开(公告)日：2007-11-22
申请号：US11493349
申请日：2006-07-26
申请人： Paramesh Gopi , Nafea Bishara
发明人： Paramesh Gopi , Nafea Bishara
IPC分类号： H04L12/56
CPC分类号： H04L12/4633 , H04L47/10 , H04L47/36
摘要： Apparatus having corresponding methods and computer programs comprise a first port comprising a first transmitter to transmit a first packet to a first network, wherein the first packet identifies a first maximum size; a first receiver to receive second packets from the first network, wherein each second packet has a first size less than, or equal to, the first maximum size; and a second port comprising a second transmitter to transmit third packets to a second network, wherein the second network has a second maximum size greater than the first maximum size, wherein each third packet has a second size that is less than, or equal to, the second maximum size, and wherein each third packet comprises one of the second packets and a tunneling protocol header having a size that is less than, or equal to, a difference between the first maximum size and the second maximum size.
摘要翻译：具有相应方法和计算机程序的装置包括第一端口，其包括用于向第一网络发送第一分组的第一发射机，其中所述第一分组标识第一最大大小; 从所述第一网络接收第二分组的第一接收机，其中每个第二分组具有小于或等于所述第一最大大小的第一大小; 以及第二端口，其包括用于向第二网络传输第三分组的第二发射机，其中所述第二网络具有大于所述第一最大大小的第二最大大小，其中每个第三分组具有小于或等于的第二大小，第二最大大小，并且其中每个第三分组包括第二分组之一和具有小于或等于第一最大大小和第二最大大小之间的差的大小的隧道协议报头。

56. 发明授权

US07042893B1 Serial media independent interface with double data rate 有权
标题翻译：具有双数据速率的串行媒体独立接口
公开(公告)号：US07042893B1
公开(公告)日：2006-05-09
申请号：US10010732
申请日：2001-12-05
申请人： William Lo , Nafea Bishara
发明人： William Lo , Nafea Bishara
IPC分类号： H04L12/28
CPC分类号： G06F13/385 , H04J3/0697
摘要： An SMII interface circuit to communicate data synchronous with a clock signal having a rising edge and a falling edge. The interface circuit includes a transmit circuit that is responsive to the clock signal to generate a first transmit serial stream and a second transmit serial stream. A receive circuit, responsive to the clock signal, to generate a receive serial stream from two receive data streams. The receive serial stream having a operating frequency that is about twice the operating frequency of each of the two receive data streams. Transmit and receive ports corresponding to the transmit and receive circuits each include a single pin to communicate the serial transmit data and the receive serial stream.
摘要翻译： SMII接口电路，用于与具有上升沿和下降沿的时钟信号同步传输数据。接口电路包括响应于时钟信号以产生第一发送串行流和第二发送串行流的发送电路。响应于时钟信号的接收电路从两个接收数据流生成接收串行流。该接收串行流的操作频率大约是两个接收数据流中的每一个的工作频率的两倍。对应于发送和接收电路的发送和接收端口各自包括用于传送串行发送数据和接收串行流的单个引脚。

57. 发明授权

US08824502B2 Long-reach Ethernet for 1000BASE-T and 10GBASE-T 有权
标题翻译： 1000BASE-T和10GBASE-T的长距离以太网
公开(公告)号：US08824502B2
公开(公告)日：2014-09-02
申请号：US13585216
申请日：2012-08-14
申请人： Ozdal Barkan , Nafea Bishara , William Lo
发明人： Ozdal Barkan , Nafea Bishara , William Lo
IPC分类号： H04L12/28
CPC分类号： H04L12/4013 , H04L1/0002 , H04L5/1446 , H04L12/413 , H04L47/10 , H04L47/22 , H04L49/3054 , H04L49/352 , H04L49/90 , H04L49/9078 , Y02D50/10
摘要： A network interface module includes a physical layer module and a data rate module. The physical layer module is configured to transmit first signals to a network device via a cable at a first data rate while conforming to Ethernet baseband characteristics for the first data rate, and at least one of determine a characteristic of the cable, or perform an autonegotiation process with the network device. The data rate module is configured to select a second data rate based on at least one of the characteristic of the cable, or results of the autonegotiation process. The second data rate is slower than the first data rate. The physical layer module is configured to transmit second signals to the network device at the second data rate while conforming to the Ethernet baseband characteristics for the first data rate.
摘要翻译：网络接口模块包括物理层模块和数据速率模块。物理层模块被配置为通过电缆以第一数据速率将第一信号发送到网络设备，同时符合用于第一数据速率的以太网基带特性，并且确定电缆的特性中的至少一个，或执行自动协商与网络设备进程。数据速率模块被配置为基于电缆的特征中的至少一个或自动协商过程的结果来选择第二数据速率。第二数据速率比第一数据速率慢。物理层模块被配置为以符合第一数据速率的以太网基带特性的第二数据速率向网络设备发送第二信号。

58. 发明授权

US08612629B1 Multi-speed serial interface for media access control and physical layer devices 有权
标题翻译：用于媒体访问控制和物理层设备的多速串行接口
公开(公告)号：US08612629B1
公开(公告)日：2013-12-17
申请号：US13245513
申请日：2011-09-26
申请人： William Lo , Nafea Bishara
发明人： William Lo , Nafea Bishara
IPC分类号： G06F15/16
CPC分类号： H04L65/60 , H04L49/3054 , H04L49/352
摘要： A network device including a media access control (MAC) device, and a physical layer (PHY) device. The physical layer (PHY) device is in communication with the MAC device via (i) a first serializer/deserializer (SERDES) and (ii) a second SERDES, wherein the first SERDES and the second SERDES operate at a fixed data rate. The MAC device comprises a translator configured to, in response to the MAC device operating at a data rate that is less than the fixed data rate, i) append a predetermined number of bits to data in a first data stream to be transmitted to the PHY device, and ii) subsequent to appending the predetermined number of bits to the data in the first data stream, duplicate the data having the appended predetermined number of bits to generate a second data stream at the fixed data rate.
摘要翻译：一种包括媒体接入控制（MAC）设备和物理层（PHY）设备的网络设备。物理层（PHY）设备通过（i）第一串行器/解串器（SERDES）和（ii）第二SERDES与MAC设备通信，其中第一SERDES和第二SERDES以固定数据速率操作。 MAC设备包括翻译器，其被配置为响应于MAC设备以小于固定数据速率的数据速率操作，i）将预定数量的比特附加到要发送到PHY的第一数据流中的数据设备，以及ii）在将预定数量的比特附加到第一数据流中的数据之后，复制具有附加的预定比特数的数据，以产生固定数据速率的第二数据流。

59. 发明授权

US08385204B1 Buffer overflow prevention for network devices 有权
标题翻译：网络设备的缓冲区溢出预防
公开(公告)号：US08385204B1
公开(公告)日：2013-02-26
申请号：US13074340
申请日：2011-03-29
申请人： Nafea Bishara
发明人： Nafea Bishara
IPC分类号： G01R31/08 , H04J3/18
CPC分类号： H04L47/12 , H04L47/193 , H04L47/2441 , H04L47/27
摘要： Methods, apparatus, and computer programs for processing packets. The method includes receiving a packet at a first port of an apparatus, wherein the packet (i) is associated with a first session of a plurality of sessions being maintained by the apparatus and (ii) includes a first transmit window size associated with the first session; storing the packet in a packet buffer prior to retransmitted the packet from the apparatus, the packet buffer having a predetermined size; modifying the first transmit window size as set forth in the first packet based on (i) the predetermined size of the packet buffer, and (ii) a second transmit window size associated with a second session of the plurality of sessions, wherein the second session is separate from the first session; and transmitting the packet having the modified first transmit window size from a second port of the apparatus.
摘要翻译：用于处理数据包的方法，设备和计算机程序。该方法包括在设备的第一端口处接收分组，其中分组（i）与由设备维护的多个会话的第一会话相关联，以及（ii）包括与第一会话在从所述设备重传所述分组之前，将所述分组存储在分组缓冲器中，所述分组缓冲器具有预定大小; 基于（i）分组缓冲器的预定大小修改第一分组中阐述的第一发送窗口大小，以及（ii）与多个会话中的第二会话相关联的第二发送窗口大小，其中第二会话与第一届会议分开; 以及从所述设备的第二端口发送具有修改的第一发送窗口大小的分组。

60. 发明申请

US20120314716A1 LONG-REACH ETHERNET FOR 1000BASE-T AND 10GBASE-T 有权
标题翻译：用于1000BASE-T和10GBASE-T的长距离以太网
公开(公告)号：US20120314716A1
公开(公告)日：2012-12-13
申请号：US13585216
申请日：2012-08-14
申请人： Ozdal Barkan , Nafea Bishara , William Lo
发明人： Ozdal Barkan , Nafea Bishara , William Lo
IPC分类号： H04L12/56
CPC分类号： H04L12/4013 , H04L1/0002 , H04L5/1446 , H04L12/413 , H04L47/10 , H04L47/22 , H04L49/3054 , H04L49/352 , H04L49/90 , H04L49/9078 , Y02D50/10
摘要： A physical-layer device includes a cable measurement module, a data rate module and a physical-layer device core. The cable measurement module measures characteristics of a cable. The data rate module (i) selects a data rate divisor N based on the characteristics of the cable, and (ii) reduces a rate of a first clock based on the data rate divisor N, where N is greater than 1. The physical-layer device core includes: a transmit module that transmits first signals over the cable at a data rate of M/N Gbps based on the rate of the first clock, where M is an integer; and a receive module that receives second signals over the cable at the data rate of M/N Gbps based on the rate of the first clock. The first and second signals conform to 1000BASE-T when M=1. The first and signals conform to 10GBASE-T when M=10.
摘要翻译：物理层设备包括电缆测量模块，数据速率模块和物理层设备核心。电缆测量模块测量电缆的特性。数据速率模块（i）基于电缆的特性来选择数据速率因数N，并且（ii）基于数据速率除数N降低第一时钟的速率，其中N大于1。层设备核心包括：发射模块，其基于第一时钟的速率以M / N Gbps的数据速率通过电缆发送第一信号，其中M是整数; 以及接收模块，其以基于第一时钟的速率的M / N Gbps的数据速率通过电缆接收第二信号。当M = 1时，第一和第二信号符合1000BASE-T。当M = 10时，第一个和信号符合10GBASE-T。

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