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51. 发明授权

US5217397A Connection construction of high-voltage resistance wire 失效
标题翻译：高压电阻线连接结构
公开(公告)号：US5217397A
公开(公告)日：1993-06-08
申请号：US936316
申请日：1992-08-28
申请人： Hiroyuki Itoh
发明人： Hiroyuki Itoh
IPC分类号： H01R4/18 , H01T13/04
CPC分类号： H01R4/188 , H01R24/20 , H01T13/04 , H01R2101/00 , H01R24/28
摘要： A connection construction of a high-voltage resistance wire, in which an insulating coating layer is stripped from a distal end portion of the high-voltage resistance wire so as to expose a portion of a winding conductor constituted by an insulating core and a resistance wire wound around the insulating core; wherein a contact piece is mounted on the portion of the winding conductor so as to enclose the portion of the winding conductor in a state where the contact piece is pressed against the portion of the winding conductor; wherein the portion of the winding conductor is folded back onto the insulating coating layer such that the contact piece is brought into facial pressing contact with a terminal.

52. 发明授权

US5206752A Optical rotator formed of a twisted nematic liquid crystal polyster including an ortho-substituted aromatic unit 失效
标题翻译：光学旋转器形成一个包含正交取代的芳族单元的双向液晶液晶
公开(公告)号：US5206752A
公开(公告)日：1993-04-27
申请号：US703179
申请日：1991-05-20
申请人： Hiroyuki Itoh , Takehiro Toyooka , Shigeki Iida
发明人： Hiroyuki Itoh , Takehiro Toyooka , Shigeki Iida
IPC分类号： G02B1/08 , G02B5/30 , G02F1/13 , G02F1/13363
CPC分类号： G02B1/08 , C09K19/126 , C09K19/3809 , G02B5/3016 , G02F1/133636 , G02F2001/133637 , Y10T428/1009 , Y10T428/1023
摘要： An optical rotator comprising a light transmitting base, an alignment film layer formed on said base, and a film layer formed of a liquid crystalline polymer. The film layer exhibits a twisted nematic orientation in the state of liquid crystal and assumes a glassy state at a temperature below a liquid crystal transition point of the polymer. The polymer is a polyester which includes an ortho-substituted aromatic unit.

53. 发明授权

US5168166A Charged particle beam projection aligner having position detector using light beam 失效
标题翻译：具有使用光束的位置检测器的带电粒子束投影对准器
公开(公告)号：US5168166A
公开(公告)日：1992-12-01
申请号：US708395
申请日：1991-05-31
申请人： Hajime Hayakawa , Kazumitsu Nakamura , Hiroyuki Itoh
发明人： Hajime Hayakawa , Kazumitsu Nakamura , Hiroyuki Itoh
IPC分类号： G21K5/00 , G02B21/00 , G03F7/20 , G21K5/04 , H01J37/304 , H01L21/027 , H01L21/30
CPC分类号： H01J37/228 , G02B21/002 , H01J37/3045 , H01J2237/2482
摘要： A charged particle beam projection aligner comprising a particle beam source for irradiating a particle beam, a sectional shape forming device thereof, an electron lens and a deflector, a wafer mounted on a XY table and a vacuum column in which these devices are installed, further comprising an optical device which irradiates a light beam in the same direction as an irradiating direction of the particle beam, a detector for detecting a light beam reflected from alignment marks on the wafer by irradiating the light beam, and for detecting a reflected light beam and a reflected electron beam reflected from a fiducial mark on the XY table by irradiating the light beam and the particle beam, and a computer for memorizing lithographic patterns, correcting said lithographic patterns with signals from the detector and outputting the corrected lithographic patterns to the electron lens and the deflector so as to control them. Since the light beam is irradiated on the wafer in the same direction as the direction of the particle beam, an offset error of the pattern alignment is minimized.
摘要翻译：一种带电粒子束投影对准器，包括用于照射粒子束的粒子束源，其截面形状形成装置，电子透镜和偏转器，安装在XY台上的晶片和安装这些装置的真空柱包括照射与所述粒子束的照射方向相同的方向的光束的光学装置，用于通过照射所述光束来检测从所述晶片上的对准标记反射的光束的检测器，以及用于检测反射光束通过照射光束和粒子束从XY台上的基准标记反射的反射电子束和用于记忆光刻图案的计算机，用来自检测器的信号校正所述光刻图案，并将校正的光刻图案输出到电子透镜和偏转器，以便控制它们。由于光束在与粒子束的方向相同的方向上在晶片上照射，所以图案对准的偏移误差最小化。

54. 发明授权

US5112593A Production process of chlorine 失效
公开(公告)号：US5112593A
公开(公告)日：1992-05-12
申请号：US595651
申请日：1990-10-09
申请人： Hiroyuki Itoh , Yoshitsugu Kono , Isao Kikuchi , Shinji Takenaka , Masanobu Ajioka
发明人： Hiroyuki Itoh , Yoshitsugu Kono , Isao Kikuchi , Shinji Takenaka , Masanobu Ajioka
IPC分类号： B01J8/34 , C01B7/04
CPC分类号： C01B7/04 , B01J8/34 , B01J2208/00061 , B01J2208/00212 , Y10S423/16
摘要： Chlorine is produced by reacting hydrogen chloride and oxygen in the presence of a catalyst composed of a chromium oxide as a principal component. The reaction is carried out in a fluidized bed reactor equipped at vertical intervals not greater than 100 cm with a plurality of perforated horizontal plates having a perforation rate of 10-60% in a reaction zone in which the catalyst is fluidized in operation. The reaction zone is above a gas diffuser plate.

55. 发明授权

US5047647A Electron beam lithography apparatus 失效
标题翻译：电子束光刻设备
公开(公告)号：US5047647A
公开(公告)日：1991-09-10
申请号：US582083
申请日：1990-09-14
申请人： Hiroyuki Itoh , Kenichi Hirane
发明人： Hiroyuki Itoh , Kenichi Hirane
IPC分类号： H01J37/147 , H01J37/153 , H01J37/304 , H01J37/305 , H01L21/027
CPC分类号： H01J37/304
摘要： An electron beam lithography apparatus comprising an electron lens, a deflector, a reflective electron detector of marks on a stage or a specimen thereon when the deflector scans the marks, and a means for memorizing high order polynomial equations and calculating a correcting value of the deflector controlling means based on the high order polynomial equations, wherein all coefficients of the high order polynomial equation are calculated when the electron beam lithography apparatus starts up, and after then, coefficient of the first order term is calculated from the position signals of the marks frequently in a short cycle.
摘要翻译：一种电子束光刻设备，当偏转器扫描标记时，包括电子透镜，偏转器，舞台上的标记的反射电子检测器或其上的标本，以及用于存储高阶多项式方程和计算偏转器的校正值的装置基于高阶多项式方程式的控制装置，其中当电子束光刻设备启动时计算高阶多项式方程式的所有系数，然后根据标记的位置信号频繁地计算一阶项的系数在一个短的周期。

56. 发明授权

US5046464A Clamp for ignition cables 失效
标题翻译：点火电缆夹
公开(公告)号：US5046464A
公开(公告)日：1991-09-10
申请号：US501131
申请日：1990-03-29
申请人： Masahiro Hisatomi , Hiroyuki Itoh
发明人： Masahiro Hisatomi , Hiroyuki Itoh
IPC分类号： F02P13/00 , F02P7/02 , F02P15/00 , F16B2/22 , F16B5/12 , H01T13/04
CPC分类号： H01R24/20 , F02P7/021 , H01T13/04 , H01R2101/00
摘要： A clamp for ignition cables has a band-like clamp holder tightly wound around the body portion of a rubber ignition plug cap enclosing the end portion of an ignition cable and has inserting and fixing portions provided on the outer circumference thereof, and has clamp pieces each having an inserting and fixing leg piece designed to be inserted so as to be releasably fixed in the respective inserting and fixing portions in a locking manner and has cord holding portions with a cord inserting port provided at the upper portion thereof. These clamp holder and clamp pieces are formed from a non-rubber rigid material. The clamp pieces are inserted into the clamp holder tightly engaged around the body portion of the ignition plug cap so as to be fixed and locked therein in an erect fashion. Ignition cables are then inserted into the cord holding portions and fixedly held therein.
摘要翻译：用于点火电缆的夹具具有紧密地卷绕在包围着点火电缆的端部的橡胶火花塞的主体部分上的带状夹具，并且具有设置在其外周上的插入和固定部分，并且每个夹具具有设计成插入的插入和固定的腿件，以便以可锁定的方式可释放地固定在相应的插入和固定部分中，并且具有设置在其上部的线插入口的帘线保持部。这些夹具夹具和夹紧件由非橡胶刚性材料形成。将夹具插入紧固在火花塞盖主体部分周围的夹具夹具中，以便以直立的方式固定和锁定。然后将点火电缆插入电线保持部分并固定地保持在其中。

57. 发明授权

US5021686A Logic circuit 失效
标题翻译：逻辑电路
公开(公告)号：US5021686A
公开(公告)日：1991-06-04
申请号：US470322
申请日：1990-01-25
申请人： Atsumi Kawata , Hiroyuki Itoh , Hirotoshi Tanaka , Kazuhiro Yoshihara , Hiroki Yamashita
发明人： Atsumi Kawata , Hiroyuki Itoh , Hirotoshi Tanaka , Kazuhiro Yoshihara , Hiroki Yamashita
IPC分类号： H03K19/003 , H03K19/017 , H03K19/0952
CPC分类号： H03K19/00384 , H03K19/01707 , H03K19/01721 , H03K19/0952
摘要： A logic circuit, most suitable for the NOR gate, logic function and integration on a single chip with a plurality of such logic circuits and other digital circuits receiving the outputs of the logic circuits and the logic circuits themselves connected and cascade, wherein plural groups of input transistors are provided, with a load through the voltage source and one of the groups, field effect transistor between the voltage source and the other group, so that its gate is connected to the node between the load and first group and its source is connected to the output terminal, with the improvement being in finding a leakage load for the field effect transistor through the voltage source, providing a clamping circuit for the gate of the transistor. The clamping circuit can include a transistor having its gate connected to the output with a delay so that it will not come on until after a substantial portion of the rise time of the output has expired. An additional logic output may be taken from the gate of this transistor, preferably through a transistor to match the outputs, so that the logic circuit is provided with two independent outputs useful for providing adjacent logic or digital circuits with a conveniently close terminal for input, and further to take advantage of the isolation of the outputs by providing other directions for both outputs for circuit elements that must remain isolated, for example in cross coupling two logic circuits as a flipflop. One or more of the may be a field effect transistor, particularly provided with boot strapping. For otherwise identical logic circuits as a part of an overall integrated logic circuit, the clamping circuits may differ only with respect to matching respective output voltages or respective output currents with respective fan outs or other characteristics of load circuits to be driven by the outputs. Preferably, all of the elements are constructed of field effect transistors.
摘要翻译：逻辑电路，最适合于NOR门，逻辑功能，并且集成在具有多个这样的逻辑电路的单个芯片上，并且其它数字电路接收逻辑电路和逻辑电路本身连接和级联的输出，其中多组提供输入晶体管，通过电压源和组中的一个负载，电压源和另一组之间的场效应晶体管，使得其栅极连接到负载和第一组之间的节点，并且其源极被连接到输出端子，其改进在于通过电压源找到场效应晶体管的泄漏负载，为晶体管的栅极提供钳位电路。钳位电路可以包括晶体管，其晶体管的栅极连接到输出端延迟，使得在输出的大部分上升时间到期之后，晶体管将不会进入。可以从该晶体管的栅极获取额外的逻辑输出，优选地通过晶体管来匹配输出，使得逻辑电路具有两个独立的输出，用于向相邻的逻辑或数字电路提供方便的关闭端子用于输入，并且还通过为必须保持隔离的电路元件的两个输出提供其它方向，例如将两个逻辑电路作为触发器交叉耦合，来利用输出的隔离。一个或多个可以是场效应晶体管，特别是提供引导带。对于作为整体集成逻辑电路的一部分的其他相同的逻辑电路，钳位电路可以相对于匹配相应的输出电压或相应的输出电流或相应的输出电流或者相应的输出电流驱动的负载电路的其他特性而不同。优选地，所有元件由场效应晶体管构成。

58. 发明授权

US4942320A Transistor circuit with improved .alpha. ray resistant properties 失效
标题翻译：具有改进的抗α射线特性的晶体管电路
公开(公告)号：US4942320A
公开(公告)日：1990-07-17
申请号：US208118
申请日：1988-06-17
申请人： Hiroyuki Itoh , Toshio Yamada , Akira Masaki , Tohru Kobayashi
发明人： Hiroyuki Itoh , Toshio Yamada , Akira Masaki , Tohru Kobayashi
IPC分类号： H03K17/16 , H03K19/003 , H03K19/086
CPC分类号： H03K17/16 , H03K19/0033 , H03K19/086
摘要： A transistor circuit of this invention comprises a first transistor for receiving a first bias at its base, resistor means connected to the collector of the first transistor and clamp means connected to the junction between the first transistor and the resistor means, and obtains an output from a terminal of the resistor on the opposite to its junction with the first transistor. When a noise current due to .alpha. rays develops in the first transistor and the output is lowered, the clamp means operates in such a manner that the current flows through the clamp means and prevents the change of the output. The transistor circuit of this invention is connected to a resistor or a transistor and operates as a constant current circuit for supplying a current to the resistor or the transistor so that the current flowing therethrough becomes constant. For example, it is used as a constant current source of an emitter follower to constitute a level shift circuit. It is disposed in a feedback part and used as a constant current source in a logic circuit comprising a logic part consisting of a differential transistor circuit and the feedback part for negatively feeding back the in-phase output of the differential transistor circuit.
摘要翻译：本发明的晶体管电路包括用于在其基极处接收第一偏压的第一晶体管，连接到第一晶体管的集电极的电阻器件和连接到第一晶体管和电阻器装置之间的结的钳位装置，电阻器的端子与其与第一晶体管的连接相对。当在第一晶体管中产生由于α射线引起的噪声电流并且输出降低时，钳位装置以使得电流流过钳位装置并防止输出变化的方式工作。本发明的晶体管电路连接到电阻器或晶体管，并作为恒流电路用于向电阻器或晶体管提供电流，使得流过其中的电流恒定。例如，它被用作射极跟随器的恒流源来构成电平移位电路。它被布置在反馈部分中，并在逻辑电路中用作恒流源，该逻辑电路包括由差分晶体管电路和反馈部分组成的逻辑部分，用于对差分晶体管电路的同相输出进行负反馈。

59. 发明授权

US4586169A Semiconductor memory circuit and large scale integrated circuit using the same 失效
标题翻译：半导体存储电路和大规模集成电路使用相同
公开(公告)号：US4586169A
公开(公告)日：1986-04-29
申请号：US440723
申请日：1982-11-10
申请人： Hiroyuki Itoh , Akira Masaki , Hiroki Yamashita , Satoshi Hososaka
发明人： Hiroyuki Itoh , Akira Masaki , Hiroki Yamashita , Satoshi Hososaka
IPC分类号： H01L21/822 , G11C11/411 , H01L21/3205 , H01L21/82 , H01L23/52 , H01L27/04 , H01L27/10 , H01L27/118 , H03K3/2885 , H03K19/173 , G11C7/00 , G11C11/40 , G11C15/00
CPC分类号： G11C11/4113 , H03K19/1735 , H03K3/2885
摘要： A large scale integrated circuit including therein a logical gate circuit and a memory circuit is disclosed in which a large number of circuit blocks each having the same structure and including at least eight transistors and at least five resistors are arranged on a chip, and the logical gate circuit or memory circuit has a selected wiring pattern of the transistors and resistors included in the circuit block.
摘要翻译：公开了一种包括逻辑门电路和存储电路的大规模集成电路，其中每个具有相同结构并且包括至少八个晶体管和至少五个电阻器的大量电路块布置在芯片上，逻辑门电路或存储器电路具有包括在电路块中的晶体管和电阻器的选定布线图案。

60. 发明授权

US08997335B2 Method of manufacturing a magnetic head for perpendicular magnetic recording 有权
标题翻译：制造用于垂直磁记录的磁头的方法
公开(公告)号：US08997335B2
公开(公告)日：2015-04-07
申请号：US13440467
申请日：2012-04-05
申请人： Yoshitaka Sasaki , Hiroyuki Itoh , Shigeki Tanemura , Hironori Araki , Kazuo Ishizaki , Takehiro Horinaka
发明人： Yoshitaka Sasaki , Hiroyuki Itoh , Shigeki Tanemura , Hironori Araki , Kazuo Ishizaki , Takehiro Horinaka
IPC分类号： G11B5/31 , H01L21/67 , G11B5/127
CPC分类号： G11B5/3116 , G11B5/1278 , G11B5/3123 , G11B5/313 , G11B5/3163 , H01L21/67069 , Y10T29/49041 , Y10T29/49043 , Y10T29/49044 , Y10T29/49046 , Y10T29/49048 , Y10T29/4906 , Y10T29/49066 , Y10T428/115
摘要： A method of manufacturing a magnetic head includes the steps of: forming a pole-layer-encasing layer having a pole-layer-encasing section; and forming a pole layer in the pole-layer-encasing section. The pole layer includes a first layer, and a second layer formed thereon. The step of forming the pole layer includes the steps of: forming an initial first layer by physical vapor deposition; etching the surface of the initial first layer by dry etching so that the initial first layer becomes the first layer; and forming the second layer on the first layer.
摘要翻译：一种制造磁头的方法包括以下步骤：形成具有极层包围部分的极层包裹层; 以及在极层封装部中形成极层。极层包括第一层和形成在其上的第二层。形成极层的步骤包括以下步骤：通过物理气相沉积形成初始第一层; 通过干蚀刻蚀刻初始第一层的表面，使得初始第一层成为第一层; 以及在所述第一层上形成所述第二层。

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