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    • 51. 发明申请
    • SEMICONDUCTOR INTEGRATED CIRCUIT
    • 半导体集成电路
    • US20090217222A1
    • 2009-08-27
    • US12211842
    • 2008-09-17
    • Shinichi YasudaKumiko NomuraKeiko Abe
    • Shinichi YasudaKumiko NomuraKeiko Abe
    • G06F17/50
    • G06F11/006G06F11/2242
    • A semiconductor integrated circuit includes: a plurality of processor elements each including a test circuit which tests whether there is a failure in the processor element and outputs a result of the test; a plurality of switch boxes provided so as to be respectively associated with processor elements, each of the switch boxes configured to have a table to store information of another processor element and transmit information of a corresponding processor element to the other processor element based on information stored in the table; a plurality of identification circuits provided so as to be respectively associated with processor elements, each of the identification circuits configured to identify a defective processor element on the basis of the result of the test and output location information of the defective processor element; and a transmission circuit configured to transmit the location information of the defective processor element output from the identification circuit to the switch boxes.
    • 半导体集成电路包括:多个处理器元件,每个处理器元件包括测试电路,该测试电路测试处理器元件中是否存在故障并输出测试结果; 设置为分别与处理器元件相关联的多个开关盒,每个开关盒被配置为具有用于存储另一个处理器元件的信息的表格,并且基于存储的信息将相应的处理器元件的信息发送到另一个处理器元件 在桌子上 设置为分别与处理器元件相关联的多个识别电路,每个识别电路被配置为基于测试的结果和缺陷处理器元件的输出位置信息来识别有缺陷的处理器元件; 以及发送电路,被配置为将从识别电路输出的缺陷处理器元件的位置信息发送到开关盒。
    • 52. 发明申请
    • Semiconductor memory device
    • 半导体存储器件
    • US20060023488A1
    • 2006-02-02
    • US11165404
    • 2005-06-24
    • Shinichi YasudaKeiko Abe
    • Shinichi YasudaKeiko Abe
    • G11C11/00
    • G11C11/14
    • A semiconductor memory includes: a first node and a second node; a first MIS transistor, having first conductive carrier flows, including a source electrode connected to a first power supply, a drain electrode connected to the second node, and a gate electrode connected to the first node; a second MIS transistor, having second conductive carrier flows, including a source electrode connected to a second power supply, a drain electrode connected to the second node, and a gate electrode connected to the first node; and a resistance change element connected between the first node and the second node and having a variable resistance due to the direction in which a voltage is applied, wherein information is written in the resistance change element by applying a voltage between the first and the second node, and stored information is read out by applying a low or high input voltage to the first node and reading out a voltage difference in the second node.
    • 半导体存储器包括:第一节点和第二节点; 具有第一导电载流子的第一MIS晶体管,包括连接到第一电源的源电极,连接到第二节点的漏电极和连接到第一节点的栅电极; 具有第二导电载流子的第二MIS晶体管,包括连接到第二电源的源电极,连接到第二节点的漏电极和连接到第一节点的栅电极; 以及连接在第一节点和第二节点之间并且由于施加电压的方向而具有可变电阻的电阻变化元件,其中通过在第一和第二节点之间施加电压将信息写入电阻变化元件 并且通过向第一节点施加低或高输入电压并读出第二节点中的电压差来读出存储的信息。
    • 55. 发明授权
    • Process for producing alkylpyridines
    • 制备烷基吡啶的方法
    • US3932421A
    • 1976-01-13
    • US159548
    • 1971-07-02
    • Yoshizo MinatoShinichi Yasuda
    • Yoshizo MinatoShinichi Yasuda
    • B01J27/185C07D213/10
    • C07D213/10B01J27/1853
    • Alkylpyridines such as 2-picoline and 4-picoline are prepared by contacting acetaldehyde and ammonia in a gaseous phase with a phosphate of two metals such as cobalt magnesium phosphate, cobalt aluminum phosphate or lead aluminum phosphate, impregnated with an aqueous solution of phosphoric acid or ammonium phosphate, as a catalyst, at a temperature of 350.degree. to 500.degree.C and a space velocity of 200 to 2,000 Hr.sup.-.sup.1. Silica-alumina and a promoter can be added to the catalyst. The impregnated catalyst has a higher catalytic activity and holds the initial high activity even after a considerable number of regeneration.
    • 通过将乙醛和氨与气相中的两种金属如磷酸钴钾,磷酸钴铝或磷酸铅或磷酸盐的磷酸盐接触,制备烷基吡啶如2-甲基吡啶和4-甲基吡啶,浸渍磷酸水溶液或 磷酸铵作为催化剂,在350-500℃的温度和200-2,000Hr -1的空间速度下进行。 可将二氧化硅 - 氧化铝和助催化剂加入到催化剂中。 浸渍的催化剂具有更高的催化活性,并且即使在相当多的再生之后也保持初始的高活性。
    • 56. 发明授权
    • Random number generation circuit
    • 随机数生成电路
    • US08930428B2
    • 2015-01-06
    • US13428150
    • 2012-03-23
    • Shinichi YasudaKazutaka Ikegami
    • Shinichi YasudaKazutaka Ikegami
    • G06F7/58H03K3/84
    • H03K3/84G06F7/588
    • According to one embodiment, a random number generation circuit includes an oscillation circuit and a holding circuit. The oscillation circuit has an amplifier array and a high-noise circuit. Amplifiers are connected in series in the amplifier array, and the amplifier array has a terminal between neighboring amplifiers. The high-noise circuit is inserted between other neighboring amplifiers in the amplifier array, and the high-noise circuit generates noise required to generate jitter in an oscillation signal from the amplifier array. The holding circuit outputs, as a random number, the oscillation signal held according to a clock signal.
    • 根据一个实施例,随机数生成电路包括振荡电路和保持电路。 振荡电路具有放大器阵列和高噪声电路。 放大器在放大器阵列中串联连接,放大器阵列在相邻放大器之间具有一个端子。 高噪声电路插入在放大器阵列中的其它相邻放大器之间,高噪声电路产生在放大器阵列的振荡信号中产生抖动所需的噪声。 保持电路作为随机数输出根据时钟信号保持的振荡信号。
    • 57. 发明申请
    • LOOK-UP TABLE CIRCUIT
    • 查看表电路
    • US20130235688A1
    • 2013-09-12
    • US13606041
    • 2012-09-07
    • Masato ODAShinichi Yasuda
    • Masato ODAShinichi Yasuda
    • G11C5/14
    • G11C5/148
    • One embodiment provides a look-up table circuit, including: 2i memories, a half of which constituting a first memory group, the other half of which constituting a second memory group; first to i-th input terminals to which first to i-th input signals are input, respectively; a first output terminal; a switch group that selectively connects one of the memories to the first output terminal according to the first to i-th input signals; a first power-off switch that shuts off power supply to the first memory group in response to one of the first to i-th input signals; and a second power-off switch that shuts off power supply to the second memory group in response to the one of the first to i-th input signals.
    • 一个实施例提供了一种查找表电路,包括:2i个存储器,其中一半构成第一存储器组,另一半构成第二存储器组; 分别输入第一至第i输入信号的第一至第i输入端子; 第一输出端子; 开关组,根据第一至第i输入信号有选择地将一个存储器连接到第一输出端; 第一断电开关,其响应于第一至第i输入信号中的一个切断对第一存储器组的电源; 以及第二断电开关,其响应于所述第一至第i输入信号之一而切断对所述第二存储器组的电源。
    • 58. 发明授权
    • Semiconductor integrated circuit
    • 半导体集成电路
    • US08456892B2
    • 2013-06-04
    • US13223930
    • 2011-09-01
    • Shinichi Yasuda
    • Shinichi Yasuda
    • G11C11/00G11C7/02
    • G11C13/003G11C13/0004G11C13/0007G11C13/0069G11C2213/74G11C2213/79
    • According to one embodiment, a semiconductor integrated circuit includes first and second resistance change type memory element and first and second switches. The first resistance change type memory element includes a first terminal connected to a first power supply and a second terminal connected to a first node. The second resistance change type memory element includes a third terminal connected to the first node and a fourth terminal connected to a second power supply. The first switch includes one end of a first current path connected to a first program power supply and the other end of the first current path connected to the first node. The second switch includes one end of a second current path connected to the first node and the other end of the second current path connected to a second program power supply.
    • 根据一个实施例,半导体集成电路包括第一和第二电阻变化型存储元件以及第一和第二开关。 第一电阻变化型存储元件包括连接到第一电源的第一端子和连接到第一节点的第二端子。 第二电阻变化型存储元件包括连接到第一节点的第三端子和连接到第二电源的第四端子。 第一开关包括连接到第一程序电源的第一电流通路的一端和连接到第一节点的第一电流通路的另一端。 第二开关包括连接到第一节点的第二电流路径的一端和连接到第二节目电源的第二电流路径的另一端。
    • 59. 发明授权
    • Rotary atomization head painting device
    • 旋转喷雾头喷涂装置
    • US07694645B2
    • 2010-04-13
    • US10568413
    • 2005-02-09
    • Shinichi YasudaYukinori Miyamoto
    • Shinichi YasudaYukinori Miyamoto
    • B05C5/02
    • B05B5/0415B05B5/0422B05B12/08B05B12/149B05B13/0452
    • An air source (11) is connected to an air motor (3) through an electropneumatic converter (12) which is connected to a rotational controller (13). Upon changing settings in a target rotational speed (N0) or paint discharge rate (Q0), in order to supply a necessary air pressure for rotationally driving the air motor (3) in a steady state with new setting conditions, the rotation controller (13) selects a steady value (is) from a rotational data selection processing table, and outputs to the electropneumatic converter (12) the newly selected steady value (is) as an input current value (i). By so doing, the rotational speed of the air motor (3) is quickly controlled toward the changed target rotational speed (N0).
    • 空气源(11)通过连接到旋转控制器(13)的电动气动转换器(12)连接到气动马达(3)。 在改变目标转速(N0)或油漆喷射速度(Q0)的设定值时,为了在新的设定条件下稳定地提供用于旋转地驱动气动马达(3)的空气压力,旋转控制器 )从旋转数据选择处理表中选择稳定值(is),并将新选择的稳定值(is)输出到电动气压转换器(12)作为输入电流值(i)。 通过这样做,气动马达(3)的旋转速度被快速地控制到改变的目标转速(N0)。
    • 60. 发明申请
    • Semiconductor Integrated Circuit Apparatus
    • 半导体集成电路设备
    • US20090108896A1
    • 2009-04-30
    • US11859878
    • 2007-09-24
    • Shinichi YasudaKeiko Abe
    • Shinichi YasudaKeiko Abe
    • H03K3/289
    • H03K3/0375
    • It is made possible to provide a flip-flop circuit capable of implementing the error correction function with a small area increase as far as possible and a pipeline system using such a flip-flop circuit. A flip-flop circuit includes: a flip-flop configured to operate based on a rising edge or a falling edge of a first clock signal; a decision circuit configured to compare an input of the flip-flop with an output thereof and output a request signal when the input of the flip-flop is different from the output thereof; and a control circuit configured to receive a second clock signal from outside and generate the first clock signal and a confirmation signal. When the request signal is sent from the decision circuit after the flip-flop has been activated, the control circuit inverts the first clock signal, sends the confirmation to the decision circuit, and makes the decision circuit cancel the request signal.
    • 可以提供一种能够尽可能地实现小面积增加的误差校正功能的触发器电路和使用这种触发器电路的流水线系统。 触发器电路包括:触发器,被配置为基于第一时钟信号的上升沿或下降沿进行操作; 判定电路,被配置为当触发器的输入与其输出不同时,将触发器的输入与其输出进行比较并输出请求信号; 以及控制电路,被配置为从外部接收第二时钟信号并产生第一时钟信号和确认信号。 当在触发器被激活之后请求信号从判决电路发送时,控制电路使第一时钟信号反相,将确认发送到判定电路,并使判定电路取消请求信号。