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51. 发明授权

US07656326B2 Decoding of context adaptive binary arithmetic codes in computational core of programmable graphics processing unit 有权
标题翻译：在可编程图形处理单元的计算核心中解码上下文自适应二进制算术代码
公开(公告)号：US07656326B2
公开(公告)日：2010-02-02
申请号：US11759431
申请日：2007-06-07
申请人： Zahid Hussain , Huy Duc Bui
发明人： Zahid Hussain , Huy Duc Bui
IPC分类号： H03M7/00
CPC分类号： H03M7/4006 , G06F9/30018 , G06F9/3895 , H04N19/42 , H04N19/44 , H04N19/91
摘要： Embodiments of decoding systems and methods are disclosed. One system embodiment, among others, comprises a software programmable core processing unit having a context-adaptive binary arithmetic (CABAC) unit configured to execute a shader, the shader configured to implement CABAC decoding of a video stream and provide a decoded data output.
摘要翻译：公开了解码系统和方法的实施例。一个系统实施例包括具有配置成执行着色器的上下文自适应二进制算术（CABAC）单元的软件可编程核心处理单元，所述着色器被配置为实现视频流的CABAC解码并提供解码的数据输出。

52. 发明申请

US20090238181A1 NETWORK PACKET STEERING VIA CONFIGURABLE ASSOCIATION OF PROCESSING RESOURCES AND NETWORK INTERFACES 有权
标题翻译：通过可配置的处理资源和网络接口协会的网络包转向
公开(公告)号：US20090238181A1
公开(公告)日：2009-09-24
申请号：US12477124
申请日：2009-06-02
申请人： Sachin Desai , Tim Millet , Zahid Hussain , Paul Kim , Louise Yeung , Ken Yeung
发明人： Sachin Desai , Tim Millet , Zahid Hussain , Paul Kim , Louise Yeung , Ken Yeung
IPC分类号： H04L12/56
CPC分类号： H04L47/22 , H04L12/4625 , H04L47/10 , H04L47/2441 , H04L47/2491 , H04L49/254 , H04L49/30 , H04L49/65
摘要： Methods and systems are provided for steering network packets. According to one embodiment a method is provided for steering incoming network packets. Each network packet processing resource of a network routing/switching device is dynamically assigned to one or more network interfaces of the network routing/switching device. Each of the network packet processing resources includes one or more processing elements and a memory. Incoming network packets received by the network interfaces are steered to an appropriate network packet processing resource based on the dynamic assignment.
摘要翻译：提供了用于转向网络数据包的方法和系统。根据一个实施例，提供了一种用于控制传入网络分组的方法。网络路由/交换设备的每个网络分组处理资源被动态分配给网络路由/交换设备的一个或多个网络接口。每个网络分组处理资源包括一个或多个处理元件和存储器。基于动态分配，由网络接口接收的传入网络分组被引导到适当的网络分组处理资源。

53. 发明申请

US20080095237A1 Systems and Methods of Improved Motion Estimation using a Graphics Processing Unit 有权
标题翻译：使用图形处理单元改进运动估计的系统和方法
公开(公告)号：US20080095237A1
公开(公告)日：2008-04-24
申请号：US11763779
申请日：2007-06-15
申请人： Zahid Hussain , John Brothers , Jim Xu
发明人： Zahid Hussain , John Brothers , Jim Xu
IPC分类号： H04N5/00
CPC分类号： G06T15/04 , G06T7/238 , G06T2200/28 , G06T2207/10016 , G06T2207/20052 , H04N19/43 , H04N19/523 , H04N19/533 , H04N19/56 , H04N19/61
摘要： Disclosed is a graphics processing unit comprising an instruction decoder and sum-of-absolute-differences (SAD) accleration logic. The instruction decoder is configured to decode a SAD instruction into parameters describing an M×N and an n×n pixel block in U,V coordinates. The SAD accleration logic is configured to receive the parameters and compute SAD scores. Each SAD score corresponds to the n×n block and to one block contained within the M×N pixel block and horizontally offset within the n×n block. Also disclosed is a GPU comprising a host processor interface receiving video acceleration instructions and a video acceleration unit. The unit is responsive to the instructions and comprises SAD accleration logic configured to receive the parameters and compute SAD scores. Each SAD score corresponds to an n×n pixel block and to one block contained within an M×N block and horizontally offset within the n×n block. M, N, and n are integers.
摘要翻译：公开了一种图形处理单元，包括指令解码器和绝对差值（SAD）积分逻辑。指令解码器被配置为将SAD指令解码成描述U，V坐标中的MxN和nxn像素块的参数。 SAD加密逻辑被配置为接收参数并计算SAD分数。每个SAD分数对应于nxn块和包含在M×N像素块内的一个块，并且在n×n块内水平偏移。还公开了一种GPU，其包括接收视频加速指令的主处理器接口和视频加速单元。该单元响应于指令，并包括配置为接收参数并计算SAD分数的SAD加速逻辑。每个SAD分数对应于n×n像素块，并对应于包含在M×N块内的一个块，并且在n×n块内水平偏移。 M，N和n是整数。

54. 发明申请

US20080032971A1 8-HETEROARYLPURINE MNK2 INHIBITORS FOR TREATING METABOLIC DISORDERS 有权
标题翻译： 8-HETEROARYLPURINE MNK2用于治疗代谢性疾病的抑制剂
公开(公告)号：US20080032971A1
公开(公告)日：2008-02-07
申请号：US11684262
申请日：2007-03-09
申请人： Andrew Cole , Marc-Raleigh Brescia , Joan Zhang , Zahid Hussain , David Diller , Axel Metzger , Gulzar Ahmed , Ian Henderson
发明人： Andrew Cole , Marc-Raleigh Brescia , Joan Zhang , Zahid Hussain , David Diller , Axel Metzger , Gulzar Ahmed , Ian Henderson
IPC分类号： A61K31/535 , A61K31/519 , A61P25/00 , A61P3/00 , A61P35/00 , C07D413/14 , C07D487/04 , C12N5/06
CPC分类号： C07D473/32
摘要： Compounds of the formula are disclosed as Mnk2 inhibitors which are useful for the treatment and prevention of metabolic disorders such as obesity and diabetes.
摘要翻译：公开的化合物作为可用于治疗和预防代谢性疾病如肥胖症和糖尿病的Mnk2抑制剂。

55. 发明申请

US20070294329A1 Filtering for VPU 有权
标题翻译：过滤VPU
公开(公告)号：US20070294329A1
公开(公告)日：2007-12-20
申请号：US11763729
申请日：2007-06-15
申请人： Zahid Hussain
发明人： Zahid Hussain
IPC分类号： G06F17/10
CPC分类号： H04N19/86 , H04N19/12 , H04N19/122 , H04N19/136 , H04N19/176 , H04N19/423 , H04N19/61 , H04N19/82
摘要： Included are embodiments for processing video data. At least one embodiment includes receive logic configured to receive the video data chosen from a plurality of formats and filter logic configured to filter the video data according to the instruction. Similarly, some embodiments include transform logic configured to transform the video data according to the instruction, where the instruction contains a mode indication in which the filter logic and the transform logic execute based on the format of the video data.
摘要翻译：包括用于处理视频数据的实施例。至少一个实施例包括被配置为接收从多个格式中选择的视频数据的接收逻辑和被配置为根据指令过滤视频数据的滤波器逻辑。类似地，一些实施例包括被配置为根据指令变换视频数据的变换逻辑，其中指令包含基于视频数据的格式来执行滤波器逻辑和变换逻辑的模式指示。

56. 发明授权

US07310100B2 Efficient graphics pipeline with a pixel cache and data pre-fetching 有权
标题翻译：高效的图形管道与像素缓存和数据预取
公开(公告)号：US07310100B2
公开(公告)日：2007-12-18
申请号：US10879325
申请日：2004-06-29
申请人： Zahid Hussain
发明人： Zahid Hussain
IPC分类号： G09G5/36 , G06T11/40 , G06T15/40 , G06T1/20
CPC分类号： G06T1/20
摘要： An efficient graphics pipeline with a pixel cache and data pre-fetching. By combining the use of a pixel cache in the graphics pipeline and the pre-fetching of data into the pixel cache, the graphics pipeline of the present invention is able to take best advantage of the high bandwidth of the memory system while effectively masking the latency of the memory system. More particularly, advantageous reuse of pixel data is enabled by caching, which when combined with pre-fetching masks the memory latency and delivers high throughput. As such, the present invention provides a novel and superior graphics pipeline over the prior art in terms of more efficient data access and much greater throughput. In one embodiment, the present invention is practiced within a computer system having a processor for issuing commands; a memory sub-system for storing information including graphics data; and a graphics sub-system for processing the graphics data according to the commands from the processor. The graphics sub-system comprises a rasterizer for traversing graphics primitives of the graphics data to generate pixel coordinates for pixels corresponding to the graphics primitives; a graphics pipeline for processing the graphics data of the pixels; and a pixel cache for caching the pixel data. In this embodiment, he graphics sub-system masks the inherent latency of the memory sub-system by pre-fetching the graphics data and storing the graphics data within the pixel cache.
摘要翻译：具有像素缓存和数据预取功能的高效图形流水线。通过结合使用图形流水线中的像素高速缓存和将数据预取入像素高速缓存，本发明的图形流水线能够最大限度地利用存储器系统的高带宽，同时有效地掩盖等待时间的内存系统。更具体地，通过高速缓存来实现像素数据的有利重用，其通过与预取掩码相结合来存储存储器等待时间并提供高吞吐量。因此，就更有效的数据访问和更大的吞吐量而言，本发明提供了一种比现有技术更新和优越的图形流水线。在一个实施例中，本发明在具有用于发出命令的处理器的计算机系统内实现; 用于存储包括图形数据的信息的存储器子系统; 以及用于根据来自处理器的命令处理图形数据的图形子系统。图形子系统包括用于遍历图形数据的图形基元的光栅化器，以生成与图形基元对应的像素的像素坐标; 用于处理像素的图形数据的图形管线; 以及用于缓存像素数据的像素缓存。在该实施例中，他的图形子系统通过预取图形数据并将图形数据存储在像素高速缓存中来掩蔽存储器子系统的固有延迟。

57. 发明申请

US20070061389A1 Logarithm processing systems and methods 有权
标题翻译：对数处理系统和方法
公开(公告)号：US20070061389A1
公开(公告)日：2007-03-15
申请号：US11223289
申请日：2005-09-09
申请人： Zahid Hussain
发明人： Zahid Hussain
IPC分类号： G06F1/02
CPC分类号： G06F1/0307 , G06F7/556
摘要： Embodiments of logarithm processing systems and methods are disclosed. The system embodiments described herein comprise two tables corresponding to various base and derivative functions of a logarithm, with logic configured to access the tables and format and normalize the accessed values to evaluate the logarithm using a standard FMAD unit.
摘要翻译：公开了对数处理系统和方法的实施例。本文描述的系统实施例包括对应于对数的各种基本和导数函数的两个表，其中逻辑被配置为访问表格并格式化和归一化所访问的值以使用标准FMAD单元来评估对数。

58. 发明授权

US08595473B2 Method and apparatus for performing control of flow in a graphics processor architecture 有权
标题翻译：用于在图形处理器架构中执行流控制的方法和装置
公开(公告)号：US08595473B2
公开(公告)日：2013-11-26
申请号：US12904199
申请日：2010-10-14
申请人： Zahid Hussain
发明人： Zahid Hussain
IPC分类号： G06F9/00
CPC分类号： G06F9/30094 , G06F9/3013 , G06F9/30134 , G06T1/20
摘要： Methods and systems for performing control of flow in a graphics processor architecture are provided. For example, in at least one embodiment, a computing system includes a memory storing a plurality of instructions and a graphics processing unit. The graphics processing unit is configured to process the instructions according to a multi-stage scalar pipeline and store condition code values in the branch control stack. The graphics processing unit is further configured to process branch instructions using condition code values stored in the condition register at the top of the branch control stack.
摘要翻译：提供了用于在图形处理器架构中执行流控制的方法和系统。例如，在至少一个实施例中，计算系统包括存储多个指令的存储器和图形处理单元。图形处理单元被配置为根据多级标量流水线处理指令，并将条件代码值存储在分支控制堆栈中。图形处理单元还被配置为使用存储在分支控制堆栈顶部的条件寄存器中的条件代码值来处理转移指令。

59. 发明授权

US08542595B2 Service processing switch 有权
标题翻译：服务处理开关
公开(公告)号：US08542595B2
公开(公告)日：2013-09-24
申请号：US13295077
申请日：2011-11-13
申请人： Zahid Hussain , Tim Millet
发明人： Zahid Hussain , Tim Millet
IPC分类号： H04L12/26 , H04J1/16 , G08C15/00 , G06F11/00 , G01R31/08
CPC分类号： H04L47/2441 , H04L45/00 , H04L45/20 , H04L45/586 , H04L45/60 , H04L47/10 , H04L47/125 , H04L47/2408 , H04L47/2491 , H04L47/326 , H04L47/50 , H04L47/6215 , H04L47/623 , H04L49/70 , H04L61/2503 , H04L61/6004 , H04L63/02 , H04L63/0236 , H04L63/0272 , H04L63/0428 , H04L63/061 , H04L63/062 , H04L63/101 , H04L63/164 , H04L69/22 , H04L69/24
摘要： Methods and systems for providing IP services in an integrated fashion are provided. According to one embodiment, a load associated with multiple virtual routing processing resources of an IP service generator of a virtual router (VR) based switch is monitored. Packets are load balanced among the virtual routing processing resources. A packet flow cache is maintained with packet flow entries containing information indicative of packet processing actions for established packet flows. Deep packet classification is performed to determine whether a packet is associated with an established packet flow. If so, the packet is directed to one of multiple virtual services processing resources representing application-tailored engines configured to provide network-based IP services including one or more of virtual private network (VPN) processing, firewall processing, Uniform Resource Locator (URL) filtering and anti-virus processing. If the packet is allowed, it is returned to the source virtual routing processing resource for forwarding.
摘要翻译：提供了以集成方式提供IP服务的方法和系统。根据一个实施例，监视与基于虚拟路由器（VR）的交换机的IP服务发生器的多个虚拟路由处理资源相关联的负载。数据包在虚拟路由处理资源之间进行负载平衡。使用包含指示用于建立的分组流的分组处理动作的信息的分组流条目维护分组流缓存。执行深度分组分类以确定分组是否与建立的分组流相关联。如果是，则将分组指向多个虚拟服务中的一个处理资源，其代表应用定制引擎，其被配置为提供基于网络的IP服务，包括虚拟专用网（VPN）处理，防火墙处理，统一资源定位符（URL）过滤和防病毒处理。如果允许报文，则返回到源虚拟路由处理资源进行转发。

60. 发明申请

US20130126727A1 Time-of-Flight Electron Energy Analyzer 审中-公开
标题翻译：飞行时间电子能量分析仪
公开(公告)号：US20130126727A1
公开(公告)日：2013-05-23
申请号：US13389784
申请日：2010-06-29
申请人： Christopher Jozwiak , Zahid Hussain , Alessandra Lanzara , Gennadi V. Lebedev , Andreas K. Schmid , Nord C. Andresen , Jeff Graf
发明人： Christopher Jozwiak , Zahid Hussain , Alessandra Lanzara , Gennadi V. Lebedev , Andreas K. Schmid , Nord C. Andresen , Jeff Graf
IPC分类号： H01J49/44
CPC分类号： H01J49/446 , G01N23/227
摘要： A time-of-flight (TOF) photoemission electron energy analyzer includes a TOF spectrometer for measuring an energy spectrum of a beam of electrons photoemitted from a sample and a 90 degree bend bandpass filter for spatially dispersing and filtering electrons according to energy. An exchange scattering electron spin polarimeter for detecting the spin of electrons includes an entrance aperture for admitting an electron beam, a magnetizable target positionable for receiving the electron beam at an angle relative to a target surface normal vector, a pair of Helmholtz coils positioned about the target for magnetizing the target in a selected direction, and a high-speed multi-channel plate (MCP) detector facing toward the target for receiving electrons reflected from the target surface, the MCP outputting a signal corresponding to the spin dependent intensity and time of electrons' arrivals.
摘要翻译：飞行时间（TOF）光电子能量分析仪包括用于测量从样品发射的电子束的能谱的TOF光谱仪和用于根据能量空间分散和过滤电子的90度弯曲带通滤光器。用于检测电子自旋的交换散射电子自旋旋光仪包括用于允许电子束的入射孔，可定位成可相对于目标表面法线向量以一定角度接收电子束的可磁化靶;围绕目标，用于沿所选方向磁化目标;以及面向目标的高速多通道板（MCP）检测器，用于接收从目标表面反射的电子，MCP输出对应于自旋相关强度和时间的信号电子到达

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