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    • 51. 发明授权
    • Silicon carbide semiconductor element and method for fabricating the same
    • 碳化硅半导体元件及其制造方法
    • US09018699B2
    • 2015-04-28
    • US13814433
    • 2012-09-12
    • Tsutomu KiyosawaKazuyuki SawadaKunimasa TakahashiYuki Tomita
    • Tsutomu KiyosawaKazuyuki SawadaKunimasa TakahashiYuki Tomita
    • H01L29/66H01L21/02H01L29/16H01L21/04H01L29/78H01L29/812H01L29/872
    • H01L21/02378H01L21/0475H01L21/049H01L29/1608H01L29/66068H01L29/7827H01L29/8128H01L29/872
    • A SiC semiconductor element includes: a SiC substrate which has a principal surface tilted with respect to a (0001) Si plane; a SiC layer arranged on the principal surface of the substrate; a trench arranged in the SiC layer and having a bottom, a sidewall, and an upper corner region located between the sidewall and the upper surface of the SiC layer; a gate insulating film arranged on at least a part of the sidewall and on at least a part of the upper corner region of the trench and on at least a part of the upper surface of the SiC layer; and a gate electrode arranged on the gate insulating film. The upper corner region has a different surface from the upper surface of the SiC layer and from a surface that defines the sidewall. The gate electrode contacts with both of a first portion of the gate insulating film located on the upper corner region and a second portion of the gate insulating film located on the sidewall. The first portion of the gate insulating film is thicker than a third portion of the gate insulating film located on the upper surface of the SiC layer. And an end portion of the gate electrode is located on the upper corner region.
    • SiC半导体元件包括:具有相对于(0001)Si平面倾斜的主表面的SiC衬底; 设置在所述基板的主表面上的SiC层; 布置在所述SiC层中并且具有位于所述SiC层的侧壁和所述上表面之间的底部,侧壁和上角区域的沟槽; 栅极绝缘膜,布置在所述沟槽的所述侧壁的至少一部分和所述上部拐角区域的至少一部分上以及所述SiC层的上表面的至少一部分上; 以及设置在栅极绝缘膜上的栅电极。 上角区域具有与SiC层的上表面和限定侧壁的表面不同的表面。 栅电极与位于上角区域的栅极绝缘膜的第一部分和位于侧壁上的栅极绝缘膜的第二部分接触。 栅极绝缘膜的第一部分比位于SiC层的上表面上的栅极绝缘膜的第三部分厚。 并且栅电极的端部位于上角区域。
    • 52. 发明授权
    • Semiconductor element and manufacturing method therefor
    • 半导体元件及其制造方法
    • US08476733B2
    • 2013-07-02
    • US13142659
    • 2010-11-15
    • Kunimasa TakahashiChiaki Kudou
    • Kunimasa TakahashiChiaki Kudou
    • H01L27/092
    • H01L29/0847H01L29/0696H01L29/1608H01L29/41725H01L29/41741H01L29/45H01L29/66068H01L29/7828
    • A semiconductor device 100 includes: a body region 105 of a first conductivity type placed on a principal surface of a substrate 101; a silicon carbide layer 102 including a drift region 107 of a second conductivity type; a channel layer 115 of the second conductivity type formed by silicon carbide and placed on the body region 105 and the drift region 107 on a surface of the silicon carbide layer 102; a gate insulating film 111 placed on the channel layer 115; a gate electrode 113 insulated from the silicon carbide layer 102 by the gate insulating film 111; a source electrode 116 provided on the silicon carbide layer 102; and a drain electrode 114 provided on a reverse surface of the substrate 101, wherein the source electrode 116 is in contact with the body region 105 and the channel layer 115; and a second conductivity type impurity concentration on a surface of the silicon carbide layer 102 that is in contact with the source electrode 116 is less than or equal to a second conductivity type impurity concentration of the channel layer 115. Thus, it is possible to provide a silicon carbide semiconductor device having a low loss and a desirable switching characteristic.
    • 半导体器件100包括:放置在基板101的主表面上的第一导电类型的主体区域105; 包括第二导电类型的漂移区域107的碳化硅层102; 由碳化硅形成并放置在碳化硅层102的表面上的体区105和漂移区107上的第二导电类型的沟道层115; 放置在沟道层115上的栅极绝缘膜111; 通过栅极绝缘膜111与碳化硅层102绝缘的栅电极113; 设置在碳化硅层102上的源电极116; 以及设置在基板101的背面上的漏电极114,其中源电极116与主体区域105和沟道层115接触; 并且与源极116接触的碳化硅层102的表面上的第二导电型杂质浓度小于或等于沟道层115的第二导电类型杂质浓度。因此,可以提供 具有低损耗和期望的开关特性的碳化硅半导体器件。
    • 54. 发明授权
    • Process for preparing alkyl-substituted aromatic compounds
    • 制备烷基取代芳族化合物的方法
    • US4239928A
    • 1980-12-16
    • US11949
    • 1979-02-13
    • Kunimasa TakahashiTakashi Yokoi
    • Kunimasa TakahashiTakashi Yokoi
    • C07C5/333B01J23/00C07C1/00C07C5/367C07C15/02C07C15/073C07C67/00C07C5/36
    • C07C5/367
    • A process for preparing corresponding alkyl-substituted aromatic compounds by the gas phase catalytic dehydrogenation of vinylcycloalkenes in the presence of a dehydrogenation catalyst supported on a carrier, said catalytic dehydrogenation being carried out(i) in the presence of a dehydrogenation catalyst in which at least one of elements belonging to periods 5 and 6 in the group VIII of the periodic table selected from the group consisting of palladium, rhodium, platinum, iridium and ruthenium is supported on active carbon(ii) by introducing steam into the reaction system,(iii) but without introducing hydrogen into the reaction system,(iv) at conditions of temperatures ranging from 300.degree. C. to less than 350.degree. C. and pressure less than 2.5 atm (absolute pressure),wherein a liquid hourly space velocity (LHSV) is set at about 5 hr.sup.-1 or less when the catalytic dehydrogenation is effected in the presence of said catalyst in which palladium alone is supported on active carbon.
    • 一种在负载在载体上的脱氢催化剂存在下通过乙烯基环烯烃的气相催化脱氢制备相应的烷基取代芳族化合物的方法,所述催化脱氢是在脱氢催化剂存在下进行的,其中至少 选自钯,铑,铂,铱和钌的元素周期表第Ⅷ族元素中的一种元素通过将蒸汽引入反应体系而负载在活性炭(ⅱ)上,(iii ),但不将氢气引入反应体系中,(iv)在温度范围为300℃至小于350℃,压力小于2.5atm(绝对压力)的条件下,其中液时空速(LHSV) 当催化脱氢在催化剂存在下,其中单独钯负载在活性炭上时,设定为约5hr-1或更低。
    • 55. 发明申请
    • SILICON CARBIDE SEMICONDUCTOR ELEMENT AND METHOD FOR FABRICATING THE SAME
    • 硅碳化硅半导体元件及其制造方法
    • US20130168701A1
    • 2013-07-04
    • US13814433
    • 2012-09-12
    • Tsutomu KiyosawaKazuyuki SawadaKunimasa TakahashiYuki Tomita
    • Tsutomu KiyosawaKazuyuki SawadaKunimasa TakahashiYuki Tomita
    • H01L21/02H01L29/16
    • H01L21/02378H01L21/0475H01L21/049H01L29/1608H01L29/66068H01L29/7827H01L29/8128H01L29/872
    • A SiC semiconductor element includes: a SiC substrate which has a principal surface tilted with respect to a (0001) Si plane; a SiC layer arranged on the principal surface of the substrate; a trench arranged in the SiC layer and having a bottom, a sidewall, and an upper corner region located between the sidewall and the upper surface of the SiC layer; a gate insulating film arranged on at least a part of the sidewall and on at least a part of the upper corner region of the trench and on at least a part of the upper surface of the SiC layer; and a gate electrode arranged on the gate insulating film. The upper corner region has a different surface from the upper surface of the SiC layer and from a surface that defines the sidewall. The gate electrode contacts with both of a first portion of the gate insulating film located on the upper corner region and a second portion of the gate insulating film located on the sidewall. The first portion of the gate insulating film is thicker than a third portion of the gate insulating film located on the upper surface of the SiC layer. And an end portion of the gate electrode is located on the upper corner region.
    • SiC半导体元件包括:具有相对于(0001)Si平面倾斜的主表面的SiC衬底; 设置在所述基板的主表面上的SiC层; 布置在所述SiC层中并且具有位于所述SiC层的侧壁和所述上表面之间的底部,侧壁和上角区域的沟槽; 栅极绝缘膜,布置在所述沟槽的所述侧壁的至少一部分和所述上部拐角区域的至少一部分上以及所述SiC层的上表面的至少一部分上; 以及设置在栅极绝缘膜上的栅电极。 上角区域具有与SiC层的上表面和限定侧壁的表面不同的表面。 栅电极与位于上角区域的栅极绝缘膜的第一部分和位于侧壁上的栅极绝缘膜的第二部分接触。 栅极绝缘膜的第一部分比位于SiC层的上表面上的栅极绝缘膜的第三部分厚。 并且栅电极的端部位于上角区域。
    • 56. 发明申请
    • SEMICONDUCTOR ELEMENT AND MANUFACTURING METHOD THEREFOR
    • 半导体元件及其制造方法
    • US20120018740A1
    • 2012-01-26
    • US13142659
    • 2010-11-15
    • Kunimasa TakahashiChiaki Kudou
    • Kunimasa TakahashiChiaki Kudou
    • H01L29/78H01L21/336
    • H01L29/0847H01L29/0696H01L29/1608H01L29/41725H01L29/41741H01L29/45H01L29/66068H01L29/7828
    • A semiconductor device 100 includes: a body region 105 of a first conductivity type placed on a principal surface of a substrate 101; a silicon carbide layer 102 including a drift region 107 of a second conductivity type; a channel layer 115 of the second conductivity type formed by silicon carbide and placed on the body region 105 and the drift region 107 on a surface of the silicon carbide layer 102; a gate insulating film 111 placed on the channel layer 115; a gate electrode 113 insulated from the silicon carbide layer 102 by the gate insulating film 111; a source electrode 116 provided on the silicon carbide layer 102; and a drain electrode 114 provided on a reverse surface of the substrate 101, wherein the source electrode 116 is in contact with the body region 105 and the channel layer 115; and a second conductivity type impurity concentration on a surface of the silicon carbide layer 102 that is in contact with the source electrode 116 is less than or equal to a second conductivity type impurity concentration of the channel layer 115. Thus, it is possible to provide a silicon carbide semiconductor device having a low loss and a desirable switching characteristic.
    • 半导体器件100包括:放置在基板101的主表面上的第一导电类型的主体区域105; 包括第二导电类型的漂移区域107的碳化硅层102; 由碳化硅形成并放置在碳化硅层102的表面上的体区105和漂移区107上的第二导电类型的沟道层115; 放置在沟道层115上的栅极绝缘膜111; 通过栅极绝缘膜111与碳化硅层102绝缘的栅电极113; 设置在碳化硅层102上的源电极116; 以及设置在基板101的背面上的漏电极114,其中源电极116与主体区域105和沟道层115接触; 并且与源极116接触的碳化硅层102的表面上的第二导电型杂质浓度小于或等于沟道层115的第二导电类型杂质浓度。因此,可以提供 具有低损耗和期望的开关特性的碳化硅半导体器件。