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51. 发明授权

US08134229B2 Layered chip package 有权
标题翻译：分层芯片封装
公开(公告)号：US08134229B2
公开(公告)日：2012-03-13
申请号：US12923118
申请日：2010-09-02
申请人： Yoshitaka Sasaki , Hiroyuki Ito , Tatsuya Harada , Nobuyuki Okuzawa , Satoru Sueki
发明人： Yoshitaka Sasaki , Hiroyuki Ito , Tatsuya Harada , Nobuyuki Okuzawa , Satoru Sueki
IPC分类号： H01L23/02
CPC分类号： H01L25/50 , H01L21/6835 , H01L23/544 , H01L24/24 , H01L24/48 , H01L24/49 , H01L24/82 , H01L24/95 , H01L25/0657 , H01L2221/68359 , H01L2223/5442 , H01L2223/54426 , H01L2224/24145 , H01L2224/48463 , H01L2224/4943 , H01L2225/06551 , H01L2924/00014 , H01L2924/01004 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/10253 , H01L2924/181 , H01L2924/30105 , H01L2924/00 , H01L2224/45099
摘要： A layered chip package includes a main body including a plurality of layer portions, and wiring disposed on a side surface of the main body. Each layer portion includes a semiconductor chip, an insulating portion covering at least one side surface of the semiconductor chip, and a plurality of electrodes connected to the semiconductor chip. The insulating portion has an end face located at the side surface of the main body on which the wiring is disposed. Each electrode has an end face surrounded by the insulating portion and located at the side surface of the main body on which the wiring is disposed.
摘要翻译：层状芯片封装包括具有多个层部分的主体和布置在主体的侧表面上的布线。每层部分包括半导体芯片，覆盖半导体芯片的至少一个侧表面的绝缘部分和连接到半导体芯片的多个电极。该绝缘部具有位于配置有布线的主体的侧面的端面。每个电极具有由绝缘部分包围并位于布置有布线的主体的侧表面处的端面。

52. 发明申请

US20120032318A1 LAYERED CHIP PACKAGE AND METHOD OF MANUFACTURING SAME 有权
标题翻译：层状芯片包装及其制造方法
公开(公告)号：US20120032318A1
公开(公告)日：2012-02-09
申请号：US12852767
申请日：2010-08-09
申请人： Yoshitaka Sasaki , Hiroyuki Ito , Hiroshi Ikejima , Atsushi Iijima
发明人： Yoshitaka Sasaki , Hiroyuki Ito , Hiroshi Ikejima , Atsushi Iijima
IPC分类号： H01L25/11 , H01L21/98 , H01L25/07
CPC分类号： H01L25/50 , H01L23/5382 , H01L24/01 , H01L25/0657 , H01L2225/06527 , H01L2225/06551 , H01L2924/07802 , H01L2924/00
摘要： A layered chip package includes a main body, and wiring that includes a plurality of wires disposed on a side surface of the main body. The main body includes: a main part including a plurality of layer portions; a plurality of first terminals disposed on the top surface of the main part and connected to the wiring; and a plurality of second terminals disposed on the bottom surface of the main part and connected to the wiring. Each layer portion includes a semiconductor chip. The plurality of second terminals are positioned to overlap the plurality of first terminals as viewed in a direction perpendicular to the top surface of the main body. A plurality of pairs of first and second terminals that are electrically connected via the wires include a plurality of pairs of a first terminal and a second terminal that are positioned not to overlap each other.
摘要翻译：分层芯片封装包括主体和布线，其包括布置在主体的侧表面上的多根导线。主体包括：主要部分，包括多个层部分; 多个第一端子，其设置在所述主体部的上表面并与所述布线连接; 以及多个第二端子，其设置在所述主体部的底面并与所述布线连接。每个层部分包括半导体芯片。多个第二端子被定位成在垂直于主体顶表面的方向上与多个第一端子重叠。经由导线电连接的多对第一和第二端子包括定位为不彼此重叠的多对第一端子和第二端子。

53. 发明申请

US20110242703A1 Thermally assisted magnetic head, method of manufacturing the same, head gimbal assembly, and hard disk drive 有权
标题翻译：热辅助磁头，制造方法，磁头万向节组件和硬盘驱动器
公开(公告)号：US20110242703A1
公开(公告)日：2011-10-06
申请号：US12662138
申请日：2010-03-31
申请人： Yoshitaka Sasaki , Hiroyuki Ito , Hironori Araki , Shigeki Tanemura , Atsushi Iijima
发明人： Yoshitaka Sasaki , Hiroyuki Ito , Hironori Araki , Shigeki Tanemura , Atsushi Iijima
IPC分类号： G11B5/48 , G11B5/187 , B05D5/12
CPC分类号： G11B5/6005 , G02B6/122 , G11B5/3116 , G11B5/314 , G11B5/3163 , G11B5/6088 , G11B2005/0021
摘要： A thermally assisted magnetic head includes a main magnetic pole layer, a near-field light generating layer having a generating end part generating near-field light arranged within a medium-opposing surface, and an optical waveguide guiding light to the near-field light generating layer. The thermally assisted magnetic head includes a base layer which a base groove part having a width gradually getting smaller along a depth direction and extending in an intersecting direction intersecting with the medium-opposing surface is formed. The near-field light generating layer has an in-groove generating layer formed inside of the base groove part. The in-groove generating layer is formed along an inner wall surface of the base groove part and has a thin-film like structure.
摘要翻译：一种热辅助磁头包括主磁极层，具有产生在介质相对表面内布置的近场光的产生端部分的近场光产生层和将光引导到近场光产生层。热辅助磁头包括基底层，基底槽部分的宽度随着深度方向逐渐变小并且在与介质相对表面相交的相交方向上延伸。近场光产生层具有形成在基槽部内的内槽生成层。槽内产生层沿着基部槽部的内壁面形成，具有薄膜状结构。

54. 发明申请

US20110228418A1 HEAT-ASSISTED MAGNETIC RECORDING HEAD WITH NEAR-FIELD LIGHT GENERATING ELEMENT 有权
标题翻译：具有近场光产生元件的热辅助磁记录头
公开(公告)号：US20110228418A1
公开(公告)日：2011-09-22
申请号：US12727666
申请日：2010-03-19
申请人： Yoshitaka Sasaki , Hiroyuki Ito , Shigeki Tanemura , Hironori Araki , Atsushi Iijima
发明人： Yoshitaka Sasaki , Hiroyuki Ito , Shigeki Tanemura , Hironori Araki , Atsushi Iijima
IPC分类号： G11B5/02
CPC分类号： G11B5/314 , G11B5/3163 , G11B5/6088 , G11B2005/001 , G11B2005/0021
摘要： A near-field light generating element has an outer surface including a bottom surface that lies at an end closer to a top surface of a substrate, a waveguide facing surface that lies at an end farther from the top surface of the substrate and faces a waveguide, a front end face located in a medium facing surface, and a side surface that connects the bottom surface, the waveguide facing surface and the front end face to each other. The front end face includes a first side that lies at an end of the bottom surface, a tip that lies at an end farther from the top surface of the substrate and forms a near-field light generating part, a second side that connects an end of the first side to the tip, and a third side that connects the other end of the first side to the tip. The waveguide facing surface includes a width changing portion that has a width in a direction parallel to the bottom surface and the front end face, the width decreasing with decreasing distance to the front end face.
摘要翻译：近场光产生元件具有外表面，该外表面包括位于更靠近基板顶表面的一端的底表面，位于远离基板顶表面的一端的波导对面的表面，位于介质相对表面中的前端面以及将所述底表面，所述波导对向表面和所述前端面彼此连接的侧表面。所述前端面包括位于所述底面的端部的第一侧，位于距离所述基板的上表面更远的一端并形成近场光产生部的端部，所述第二侧将端部并且将第一侧的另一端连接到尖端的第三侧。面向波导的表面包括宽度改变部分，该宽度改变部分在平行于底面和前端面的方向上具有宽度，宽度随着与前端面的距离的减小而减小。

55. 发明申请

US20110228416A1 A METHOD OF MANUFACTURING A THERMALLY ASSISTED MAGNETIC HEAD 有权
标题翻译：制造热辅助磁头的方法
公开(公告)号：US20110228416A1
公开(公告)日：2011-09-22
申请号：US12659691
申请日：2010-03-17
申请人： Yoshitaka Sasaki , Hiroyuki Ito , Atsushi Iijima
发明人： Yoshitaka Sasaki , Hiroyuki Ito , Atsushi Iijima
IPC分类号： G11B21/16 , H01F7/06
CPC分类号： G11B5/3163 , B82Y20/00 , G02B6/1226 , G11B5/105 , G11B5/314 , G11B5/6088 , G11B2005/0021 , Y10T29/49021 , Y10T29/49041 , Y10T29/49043 , Y10T29/49044 , Y10T29/49046 , Y10T29/49052
摘要： A thermally assisted magnetic head is formed by performing a head forming process, a mounting part forming process and a light source mounting process in that order. In the head forming process, a planned area is secured on a light source placing surface of a slider substrate, then a magnetic head part is formed on a head area other than the planned area and a spacer for securing a mounting space for the laser diode is formed on the planned area. In the mounting part forming process, a light source mounting part is formed by removing the spacer. In the light source mounting process, a laser diode is mounted on the light source mounting part formed by the mounting part forming step.
摘要翻译：通过以该顺序执行头部成形工艺，安装部件形成工艺和光源安装工艺来形成热辅助磁头。在头部成形处理中，将规划区域固定在滑块基板的光源放置面上，然后将磁头部形成在除了规划区域以外的头部区域上，并且用于固定激光二极管的安装空间的间隔件在规划区域形成。在安装部形成工序中，通过移除间隔件形成光源安装部。在光源安装过程中，激光二极管安装在由安装部分形成步骤形成的光源安装部分上。

56. 发明申请

US20110221073A1 Layered chip package with wiring on the side surfaces 有权
标题翻译：分层芯片封装，侧面布线
公开(公告)号：US20110221073A1
公开(公告)日：2011-09-15
申请号：US13067195
申请日：2011-05-16
申请人： Yoshitaka Sasaki , Hiroyuki Ito , Tatsuya Harada , Nobuyuki Okuzawa , Satoru Sueki , Hiroshi Ikejima
发明人： Yoshitaka Sasaki , Hiroyuki Ito , Tatsuya Harada , Nobuyuki Okuzawa , Satoru Sueki , Hiroshi Ikejima
IPC分类号： H01L23/538
CPC分类号： H01L25/0657 , H01L24/24 , H01L24/25 , H01L24/48 , H01L24/49 , H01L24/82 , H01L24/94 , H01L24/96 , H01L25/50 , H01L2221/68359 , H01L2223/54426 , H01L2224/05554 , H01L2224/18 , H01L2224/32145 , H01L2224/48 , H01L2224/48463 , H01L2224/49175 , H01L2224/4943 , H01L2224/73267 , H01L2224/94 , H01L2225/06551 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/10161 , H01L2924/10253 , H01L2924/181 , H01L2924/30105 , H01L2924/30107 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/03
摘要： A layered chip package has a main body including pairs of layer portions, and wiring disposed on a side surface of the main body. Each layer portion includes a semiconductor chip. The pairs of layer portions include specific pairs of layer portions. Each of the specific pairs of layer portions includes a first-type layer portion and a second-type layer portion. The first-type layer portion includes electrodes each connected to the semiconductor chip and each having an end face located at the side surface of the main body on which the wiring is disposed, whereas the second-type layer portion does not include such electrodes. The specific pairs of layer portions are provided in an even number.
摘要翻译：分层芯片封装具有包括一对层部分的主体和布置在主体的侧表面上的布线。每个层部分包括半导体芯片。这些层部分包括特定的层对。每个特定的层部分对包括第一类型层部分和第二类型的部分。第一型层部分包括各自连接到半导体芯片并且各自具有位于布置有布线的主体的侧表面的端面的电极，而第二型层部分不包括这样的电极。特定的层部分对以偶数提供。

57. 发明授权

US07968374B2 Layered chip package with wiring on the side surfaces 有权
标题翻译：分层芯片封装，侧面布线
公开(公告)号：US07968374B2
公开(公告)日：2011-06-28
申请号：US12320884
申请日：2009-02-06
申请人： Yoshitaka Sasaki , Hiroyuki Ito , Tatsuya Harada , Nobuyuki Okuzawa , Satoru Sueki , Hiroshi Ikejima
发明人： Yoshitaka Sasaki , Hiroyuki Ito , Tatsuya Harada , Nobuyuki Okuzawa , Satoru Sueki , Hiroshi Ikejima
IPC分类号： H01L21/00 , H01L23/48
CPC分类号： H01L25/0657 , H01L24/24 , H01L24/25 , H01L24/48 , H01L24/49 , H01L24/82 , H01L24/94 , H01L24/96 , H01L25/50 , H01L2221/68359 , H01L2223/54426 , H01L2224/05554 , H01L2224/18 , H01L2224/32145 , H01L2224/48 , H01L2224/48463 , H01L2224/49175 , H01L2224/4943 , H01L2224/73267 , H01L2224/94 , H01L2225/06551 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/10161 , H01L2924/10253 , H01L2924/181 , H01L2924/30105 , H01L2924/30107 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/03
摘要： A layered chip package has a main body including pairs of layer portions, and wiring disposed on a side surface of the main body. Each layer portion includes a semiconductor chip. The pairs of layer portions include at least one specific pair of layer portions including a first-type layer portion and a second-type layer portion. The first-type layer portion includes electrodes each connected to the semiconductor chip and each having an end face located at the side surface of the main body on which the wiring is disposed, whereas the second-type layer portion does not include such electrodes. A layered substructure formed of a stack of two substructures, each of which includes aligned preliminary layer portions, is used to fabricate a stack of a predetermined two or greater number of pairs of layer portions, and the main body is fabricated by stacking an additional first-type layer portion together with the stack, the number of the additional first-type layer portion being equal to the number of the specific pair(s) of layer portions included in the stack.
摘要翻译：分层芯片封装具有包括一对层部分的主体和布置在主体的侧表面上的布线。每个层部分包括半导体芯片。这些层部分包括至少一个特定的一对层部分，其包括第一型层部分和第二类型部分。第一型层部分包括各自连接到半导体芯片并且各自具有位于布置有布线的主体的侧表面的端面的电极，而第二型层部分不包括这样的电极。由两个子结构的堆叠形成的分层子结构，每个子结构包括对准的预备层部分，用于制造预定的两个或更多数量的层部分的堆叠，并且主体通过堆叠附加的第一型层部分与堆叠一起，附加的第一型层部分的数量等于堆叠中包括的层部分的特定对的数量。

58. 发明申请

US20110068456A1 Layered chip package and method of manufacturing same 有权
标题翻译：分层芯片封装及其制造方法
公开(公告)号：US20110068456A1
公开(公告)日：2011-03-24
申请号：US12585778
申请日：2009-09-24
申请人： Yoshitaka Sasaki , Hiroyuki Ito , Hiroshi Ikejima , Atsushi Iijima
发明人： Yoshitaka Sasaki , Hiroyuki Ito , Hiroshi Ikejima , Atsushi Iijima
IPC分类号： H01L25/065 , H01L21/50 , H01L21/66
CPC分类号： H01L24/94 , H01L23/481 , H01L24/11 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05554 , H01L2224/0557 , H01L2224/1147 , H01L2224/13099 , H01L2225/06513 , H01L2225/06541 , H01L2225/06596 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/3025 , H01L2224/05552
摘要： A layered chip package includes a plurality of layer portions that are stacked, each of the layer portions including a semiconductor chip. The plurality of layer portions include at least one first-type layer portion and at least one second-type layer portion. The semiconductor chip has a circuit, a plurality of electrode pads electrically connected to the circuit, and a plurality of through electrodes. In every vertically adjacent two of the layer portions, the plurality of through electrodes of the semiconductor chip of one of the two layer portions are electrically connected to the respective corresponding through electrodes of the semiconductor chip of the other of the two layer portions. The first-type layer portion includes a plurality of wires for electrically connecting the plurality of through electrodes to the respective corresponding electrode pads, whereas the second-type layer portion does not include the wires.
摘要翻译：分层芯片封装包括堆叠的多个层部分，每个层部分包括半导体芯片。多个层部分包括至少一个第一类型层部分和至少一个第二类型的部分。半导体芯片具有电路，电连接到电路的多个电极焊盘以及多个贯通电极。在每个垂直相邻的两个层部分中，两个层部分中的一个的半导体芯片的多个通孔电连接到两个层部分中另一个的半导体芯片的相应的贯通电极。第一型层部分包括用于将多个贯通电极电连接到各个对应的电极焊盘的多条导线，而第二型层部分不包括导线。

59. 发明授权

US07911883B2 Near-field light generating element having two different angles 有权
标题翻译：具有两个不同角度的近场光产生元件
公开(公告)号：US07911883B2
公开(公告)日：2011-03-22
申请号：US12457984
申请日：2009-06-26
申请人： Yoshitaka Sasaki , Hiroyuki Ito , Shigeki Tanemura , Hironori Araki
发明人： Yoshitaka Sasaki , Hiroyuki Ito , Shigeki Tanemura , Hironori Araki
IPC分类号： G11B11/00
CPC分类号： G11B5/314 , G11B5/3116 , G11B5/3163 , G11B5/6088 , G11B7/1387 , G11B2005/0002 , G11B2005/0021
摘要： A near-field light generating element accommodated in a groove of an encasing layer has an outer surface that includes a first end face including a near-field light generating part, a second end face opposite to the first end face, and a coupling portion that couples the first and second end faces. The coupling portion includes a top surface, and first and second side surfaces that decrease in distance from each other with increasing distance from the top surface. The first end face includes a first side located at an end of the first side surface, and a second side located at an end of the second side surface. Each of the first and second sides includes an upper part and a lower part continuous with each other. An angle formed between the respective lower parts of the first and second sides is smaller than that formed between the respective upper parts of the first and second sides.
摘要翻译：容纳在包装层的槽中的近场光产生元件具有外表面，该外表面包括包括近场光产生部分的第一端面，与第一端面相对的第二端面和耦合部分，耦合第一和第二个端面。联接部分包括顶表面，以及随着与顶表面的距离增加而彼此间隔距离减小的第一和第二侧表面。第一端面包括位于第一侧表面的端部的第一侧和位于第二侧表面的端部的第二侧。第一和第二侧中的每一个包括彼此连续的上部和下部。在第一和第二侧的相应下部之间形成的角度小于在第一和第二侧的相应上部之间形成的角度。

60. 发明授权

US07902677B1 Composite layered chip package and method of manufacturing same 有权
标题翻译：复合分层芯片封装及其制造方法
公开(公告)号：US07902677B1
公开(公告)日：2011-03-08
申请号：US12588808
申请日：2009-10-28
申请人： Yoshitaka Sasaki , Hiroyuki Ito , Hiroshi Ikejima , Atsushi Iijima
发明人： Yoshitaka Sasaki , Hiroyuki Ito , Hiroshi Ikejima , Atsushi Iijima
IPC分类号： H01L23/48 , H01L23/29 , H01L23/28
CPC分类号： H01L24/96 , H01L21/6835 , H01L23/3171 , H01L24/06 , H01L24/16 , H01L24/25 , H01L24/29 , H01L24/73 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2221/68359 , H01L2224/0401 , H01L2224/04105 , H01L2224/05553 , H01L2224/05647 , H01L2224/12105 , H01L2224/13099 , H01L2224/32145 , H01L2224/73267 , H01L2224/82 , H01L2224/92244 , H01L2225/06513 , H01L2225/06551 , H01L2225/1035 , H01L2225/1064 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/078 , H01L2924/07802 , H01L2924/14 , H01L2924/18162 , H01L2924/30105 , H01L2924/3025 , H01L2924/00014 , H01L2924/00
摘要： A composite layered chip package includes a plurality of subpackages stacked. Each subpackage includes a main body, and wiring disposed on a side surface of the main body. The main body has a main part that includes at least one first-type layer portion. For any two vertically adjacent subpackages, the main body of the lower subpackage has a plurality of first terminals that are arranged on the top surface of the main part, while the main body of the upper subpackage has a plurality of second terminals that are arranged on the bottom surface of the main part. The main part of the main body of at least one of the plurality of subpackages includes at least one second-type layer portion. The first-type layer portion includes a conforming semiconductor chip, while the second-type layer portion includes a defective semiconductor chip.
摘要翻译：复合分层芯片封装包括堆叠的多个子封装。每个子包包括主体和布置在主体的侧表面上的布线。主体具有包括至少一个第一类型层部分的主要部分。对于任何两个垂直相邻的子包装，下部子包装的主体具有布置在主要部件的顶表面上的多个第一端子，而上部子包装的主体具有多个第二端子，第二端子布置在主要部分的底面。多个子包中的至少一个子包的主体的主要部分包括至少一个第二类型层部分。第一型层部分包括一致的半导体芯片，而第二型层部分包括有缺陷的半导体芯片。

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