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51. 发明申请

US20070198757A1 Data processing system with hardware polling processor 审中-公开
标题翻译：具有硬件轮询处理器的数据处理系统
公开(公告)号：US20070198757A1
公开(公告)日：2007-08-23
申请号：US11654171
申请日：2007-01-17
申请人： Ki-Hong Kim
发明人： Ki-Hong Kim
IPC分类号： G06F3/00
CPC分类号： G06F1/3237 , G06F1/3215 , Y02D10/128
摘要： A data processing system includes a processor, a peripheral device conducting an operation requested by the processor, a clock/power control unit supplying a clock signal to the processor, and a hardware polling processor detecting current state data output from the peripheral device and regulating the clock/power control unit to interrupt the clock signal to the processor in accordance with a result of the detection, during a state read operation for detecting current state data of the peripheral device.
摘要翻译：数据处理系统包括处理器，执行由处理器请求的操作的外围设备，向处理器提供时钟信号的时钟/功率控制单元，以及检测从外围设备输出的当前状态数据并调整时钟/电源控制单元，用于在用于检测外围设备的当前状态数据的状态读取操作期间，根据检测结果将处理器的时钟信号中断。

52. 发明申请

US20070134880A1 Field effect transistors having elevated source/drain regions and methods of manufacturing the same 有权
标题翻译：具有升高的源极/漏极区域的场效应晶体管及其制造方法
公开(公告)号：US20070134880A1
公开(公告)日：2007-06-14
申请号：US11636139
申请日：2006-12-08
申请人： Min-Gu Kang , Ki-Hong Kim , Jin-Bum Kim , Jung-Yun Won , In-Sun Jung
发明人： Min-Gu Kang , Ki-Hong Kim , Jin-Bum Kim , Jung-Yun Won , In-Sun Jung
IPC分类号： H01L21/336
CPC分类号： H01L29/66628 , H01L21/0242 , H01L21/02458 , H01L21/02491 , H01L21/0254 , H01L21/0262 , H01L21/02636 , H01L21/02642 , H01L21/02664 , H01L21/26513 , H01L27/10873 , H01L29/517
摘要： Methods of manufacturing a field effect transistor include forming a gate pattern on a substrate. A gate spacer is formed on a sidewall of the gate pattern. A first layer is formed from a surface of the substrate and contacting the gate spacer using a first selective epitaxial growth (SEG) process at a first temperature. A second layer is formed from a surface of the first layer and contacting the gate spacer using a second SEG process at a second temperature. The second temperature is lower than the first temperature. The first and second layers define elevated source/drain regions.
摘要翻译：制造场效应晶体管的方法包括在衬底上形成栅极图案。栅极间隔物形成在栅极图案的侧壁上。第一层由衬底的表面形成并且在第一温度下使用第一选择性外延生长（SEG）工艺与栅极间隔物接触。第二层由第一层的表面形成，并在第二温度下使用第二SEG工艺与栅极间隔物接触。第二个温度低于第一个温度。第一和第二层限定升高的源极/漏极区域。

53. 发明申请

US20060008041A1 Circuits and methods for recovering a clock signal 有权
标题翻译：用于恢复时钟信号的电路和方法
公开(公告)号：US20060008041A1
公开(公告)日：2006-01-12
申请号：US11172976
申请日：2005-07-05
申请人： Nyun-Tae Kim , Ki-Hong Kim , Kimio Ueda , Shu-Jiang Wang , Mi-Jeong Kim
发明人： Nyun-Tae Kim , Ki-Hong Kim , Kimio Ueda , Shu-Jiang Wang , Mi-Jeong Kim
IPC分类号： H04L25/00
CPC分类号： H04L7/0338 , H03L7/0812 , H04L7/0025
摘要： A circuit for recovering a clock signal may include a frequency multiplier configured to generate a plurality of local clock signals, each having a different phase, based on a plurality of received global clock signals at a first frequency and each having a different phase. The local clock signals may be generated at a second frequency higher than the first frequency. The circuit may include a phase interpolator configured to generate a recovered clock signal at a given phase and at a third frequency, based on the generated local clock signals, and a phase shifter configured to adjust the phase of the recovered clock signal so as to synchronize the phase of the recovered clock signal with a phrase of input data that is input to the phase shifter.
摘要翻译：用于恢复时钟信号的电路可以包括频率乘法器，其被配置为基于多个接收的具有第一频率并且各自具有不同相位的全局时钟信号来产生每个具有不同相位的本地时钟信号。本地时钟信号可以以比第一频率高的第二频率产生。电路可以包括相位插值器，其被配置为基于产生的本地时钟信号在给定相位和第三频率处产生恢复的时钟信号;以及移相器，被配置为调整恢复的时钟信号的相位以便同步恢复的时钟信号的相位与输入到移相器的输入数据的短语。

54. 发明申请

US20050223148A1 Electronic apparatus that communicates with host through serial communication interface 审中-公开
标题翻译：通过串行通信接口与主机通信的电子设备
公开(公告)号：US20050223148A1
公开(公告)日：2005-10-06
申请号：US11099243
申请日：2005-04-05
申请人： Ki-Hong Kim
发明人： Ki-Hong Kim
IPC分类号： G06F13/14 , G06F1/04 , G06F13/00 , G06F13/10 , G06F13/38 , G06F13/42 , G06K7/08 , G06K19/07 , H04L29/10
CPC分类号： G06F13/385 , G06F13/4286
摘要： A smart card that communicates with a host through a serial communication interface at variable transmission speed is provided, where the smart card variably controls the generation of a connection information signal in accordance with data transmission speed information received from the host to transmit the connection information signal to the host, to prevent errors from being generated due to the difference between the work waiting time in accordance with transmission speed set in the smart card and the work waiting time determined in accordance with actual transmission speed.
摘要翻译：提供了一种以可变传输速度通过串行通信接口与主机进行通信的智能卡，其中智能卡根据从主机接收的数据传输速度信息可变地控制连接信息信号的产生，以发送连接信息信号以防止根据智能卡中设置的传输速度的工作等待时间与根据实际传输速度确定的工作等待时间之间的差异而产生错误。

55. 发明授权

US5787293A Computer incorporating a power supply control system therein 失效
标题翻译：计算机内装有电源控制系统
公开(公告)号：US5787293A
公开(公告)日：1998-07-28
申请号：US749027
申请日：1996-11-14
申请人： Ki-Hong Kim , Jean-Gee Hong , Seong-Sik Ham , Chang-Hun Choi
发明人： Ki-Hong Kim , Jean-Gee Hong , Seong-Sik Ham , Chang-Hun Choi
IPC分类号： G06F1/26
CPC分类号： G06F1/26
摘要： A computer incorporates therein a control system for efficiently turning on and off a power supply on and off therein to control on-off operations of the computer. In the control system, a power detection signal is derived first based on a power selection signal generated when a power on/off key of the computer is actuated to control the on-off operations of the computer at a signal detector. And then, at a first generator, a first power control signal and a selection control signal are obtained from the derived power detection signal in response to a first mode control signal. Next, a second power control signal is derived from the power detection signal, the selection control signal and a second mode control signal at a second generator. Finally, the first and the second power control signals are logically combined at a second logic circuit to generate and provide a definitive power control signal to the power supply, thereby selectively supplying DC output voltages to designated components of the computer to control the on-off operations of the computer.
摘要翻译：计算机内装有用于有效地打开和关闭其中的电源的控制系统，以控制计算机的开关操作。在控制系统中，首先基于在启动计算机的电源开/关键时产生的功率选择信号来导出功率检测信号，以控制计算机在信号检测器处的开 - 关操作。然后，在第一发生器中，响应于第一模式控制信号，从导出的功率检测信号获得第一功率控制信号和选择控制信号。接下来，从功率检测信号，选择控制信号和第二发生器的第二模式控制信号导出第二功率控制信号。最后，第一和第二功率控制信号在第二逻辑电路上被逻辑地组合以产生并向电源提供确定的功率控制信号，由此选择性地将DC输出电压提供给计算机的指定组件以控制开关电脑操作。

56. 发明授权

US10063541B2 User authentication method and electronic device performing user authentication 有权
公开(公告)号：US10063541B2
公开(公告)日：2018-08-28
申请号：US14968382
申请日：2015-12-14
申请人： Yong-Pyo Kim , Min-Soo Kang , Ki-Hong Kim , Je-Sang Lee , Min-Ja Han
发明人： Yong-Pyo Kim , Min-Soo Kang , Ki-Hong Kim , Je-Sang Lee , Min-Ja Han
IPC分类号： H04L29/06 , G06F3/0488 , G06F7/58 , H04W12/08 , G06F21/32 , G06K9/00 , G06K9/62
CPC分类号： H04L63/0861 , G06F3/0488 , G06F7/58 , G06F21/32 , G06K9/00067 , G06K9/00288 , G06K9/00617 , G06K9/00892 , G06K9/6293 , G06K2009/00932 , H04L63/083 , H04L2463/082 , H04W12/08
摘要： Provided are a user authentication method and an electronic device performing the method. The method is performed under the control of a processor and includes inputting a user authentication request for identifying a user, generating random number data that corresponds to knowledge-based authentication information in the user authentication request, generating an authentication code by combining biometrics-based authentication information in the user authentication request and the random number data, and processing the user authentication request based on the authentication code.

57. 发明授权

US08976170B2 Apparatus and method for displaying stereoscopic image 有权
标题翻译：用于显示立体图像的装置和方法
公开(公告)号：US08976170B2
公开(公告)日：2015-03-10
申请号：US13474535
申请日：2012-05-17
申请人： Gun A. Lee , Ung-Yeon Yang , Yong-Wan Kim , Dong-Sik Jo , Ki-Hong Kim
发明人： Gun A. Lee , Ung-Yeon Yang , Yong-Wan Kim , Dong-Sik Jo , Ki-Hong Kim
IPC分类号： G06T15/00 , H04N13/04
CPC分类号： H04N13/346 , H04N13/383
摘要： Disclosed is an apparatus for displaying stereoscopic images. The apparatus for displaying stereoscopic images includes a stereoscopic image-generating part, a main display part, a sub-display part, and a translucent reflective structure part. The stereoscopic image-generating part splits a single image to generate a first stereoscopic image to be directly viewed by a user and a second stereoscopic image to be reflected and viewed by the user. The main display part directly displays the first stereoscopic image to a gaze of a user. The sub-display part displays the second stereoscopic image. The translucent reflective structure part reflects the second stereoscopic image displayed on the sub-display part.
摘要翻译：公开了一种用于显示立体图像的装置。用于显示立体图像的装置包括立体图像生成部分，主显示部分，子显示部分和半透明反射结构部分。立体图像生成部分分割单个图像以生成由用户直接观看的第一立体图像和由用户反射和观看的第二立体图像。主显示部分将第一立体图像直接显示给用户的凝视。子显示部显示第二立体图像。半透明反射结构部分反映显示在副显示部分上的第二立体图像。

58. 发明申请

US20120231605A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE INCLUDING A RECESSED CHANNEL 有权
标题翻译：制造包含通道的半导体器件的方法
公开(公告)号：US20120231605A1
公开(公告)日：2012-09-13
申请号：US13312176
申请日：2011-12-06
申请人： Young-Pil KIM , Hyung-Ik Lee , Woo-Sung Jeon , Ki-Hong Kim , Jung-Yun Won , In-Sun Jung
发明人： Young-Pil KIM , Hyung-Ik Lee , Woo-Sung Jeon , Ki-Hong Kim , Jung-Yun Won , In-Sun Jung
IPC分类号： H01L21/762
CPC分类号： H01L27/1052 , H01L21/76224 , H01L27/10876
摘要： A method including forming an isolation trench; forming first and second liners on the isolation trench; filling the isolation trench an insulating material to form an isolation region and an active region; forming a preliminary gate trench including a first region across the isolation region to expose the first liner, the second liner, and the insulating material, and a second region across the active region to expose a portion of the substrate, the first region having a first sidewall with a planar shape, and the second region having a second sidewall with a concave central area such that an interface between the first and second regions has a pointed portion; removing a portion of the first liner exposed by the first region to form a dent having a first depth by which the pointed portion protrudes; removing the pointed portion to form a gate trench; and forming a gate electrode.
摘要翻译：一种包括形成隔离沟槽的方法; 在隔离沟槽上形成第一和第二衬垫; 将绝缘沟槽填充绝缘材料以形成隔离区域和有源区域; 形成包括隔离区域的第一区域的初步栅极沟槽，以露出第一衬垫，第二衬垫和绝缘材料，以及横跨有源区域的第二区域以暴露衬底的一部分，第一区域具有第一侧壁具有平面形状，并且所述第二区域具有第二侧壁，所述第二侧壁具有凹形中心区域，使得所述第一和第二区域之间的界面具有尖锐部分; 去除由所述第一区域暴露的所述第一衬垫的一部分以形成具有所述尖部突出的第一深度的凹陷; 去除尖部以形成栅沟; 并形成栅电极。

59. 发明授权

US08259501B2 Flash memory system operating in a random access mode 有权
标题翻译：闪存系统以随机存取模式运行
公开(公告)号：US08259501B2
公开(公告)日：2012-09-04
申请号：US13006068
申请日：2011-01-13
申请人： Byeong-Hoon Lee , Ki-Hong Kim , Seung-Won Lee , Sun-Kwon Kim
发明人： Byeong-Hoon Lee , Ki-Hong Kim , Seung-Won Lee , Sun-Kwon Kim
IPC分类号： G11C16/04
CPC分类号： G11C16/0483
摘要： A memory system includes a memory and a memory controller operating to control the memory. The memory includes a random accessible memory including a memory cell array operable in a random access mode, a NAND flash memory, and a selection circuit making the memory controller operate either one of the random accessible memory or the NAND flash memory.
摘要翻译：存储器系统包括操作以控制存储器的存储器和存储器控制器。存储器包括随机存取存储器，其包括以随机存取模式操作的存储单元阵列，NAND闪速存储器和使存储器控制器操作随机存取存储器或NAND闪速存储器之一的选择电路。

60. 发明授权

US08060664B2 Integrated circuit having a plurality of interfaces and integrated circuit card having the same 有权
标题翻译：具有多个接口的集成电路和具有该接口的集成电路卡
公开(公告)号：US08060664B2
公开(公告)日：2011-11-15
申请号：US11655328
申请日：2007-01-19
申请人： Ki-Hong Kim , Hwi-Taek Chung
发明人： Ki-Hong Kim , Hwi-Taek Chung
IPC分类号： G06F3/00
CPC分类号： G06K19/0723 , G06F13/4291
摘要： An integrated circuit supporting a first interface and a second interface and an integrated circuit card having the same includes the first interface capable of communicating with a first host, the second interface communicating with a second host, and a control block. The control block activates the second interface when a voltage level of a contact that the second host can be connected is in a first state at a first-occurring timepoint between a reference timepoint and a state transition timepoint of an external reset signal output from the first host, and deactivates the second interface when the voltage level of the contact is in a second state. The integrated circuit card has the integrated circuit built in.
摘要翻译：支持第一接口和第二接口的集成电路和具有该集成电路的集成电路卡包括能够与第一主机通信的第一接口，与第二主机通信的第二接口和控制块。当第二主机可以连接的触点的电压电平处于第一状态时，控制块激活第二接口，该第一接口在第一状态处于第一状态，该第一状态位于从第一状态输出的外部复位信号的参考时间点和状态转移时间点之间主机，并且当触点的电压电平处于第二状态时，停用第二接口。集成电路卡内置集成电路。

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