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51. 发明申请

US20090014882A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20090014882A1
公开(公告)日：2009-01-15
申请号：US12142312
申请日：2008-06-19
申请人： Sachiyo ITO , Masahiko Hasunuma
发明人： Sachiyo ITO , Masahiko Hasunuma
IPC分类号： H01L23/52
CPC分类号： H01L23/53238 , H01L23/53295 , H01L23/562 , H01L23/585 , H01L24/05 , H01L2224/02166 , H01L2224/05093 , H01L2924/14 , H01L2924/351 , H01L2924/00
摘要： A semiconductor device includes an effective wire formed above a substrate in a multilayer interconnection structure and having a first electrode pad in a top layer; a first reinforcing material formed in the multilayer interconnection structure like surrounding the effective wire; a protective film configured to protect a final surface of the multilayer interconnection structure; and a second reinforcing material formed at a position in contact with the protective film and also between an area in which the effective wire is formed and a chip area end, the second reinforcing material being constituted by a film pattern whose Young's modulus is larger than that of a conductor constituting the first electrode pad and that of a conductor constituting the first reinforcing material.
摘要翻译：半导体器件包括形成在多层互连结构中的衬底上方的有效线，并且具有顶层中的第一电极焊盘; 形成在所述多层互连结构中的第一增强材料，如围绕所述有效导线; 被配置为保护所述多层互连结构的最终表面的保护膜; 以及第二增强材料，其形成在与所述保护膜接触的位置处，并且在形成有效丝的区域和切屑面积端之间，所述第二增强材料由杨氏模量大于构成第一电极焊盘的导体和构成第一增强材料的导体的导体。

52. 发明授权

US07351656B2 Semiconductor device having oxidized metal film and manufacture method of the same 有权
公开(公告)号：US07351656B2
公开(公告)日：2008-04-01
申请号：US11335584
申请日：2006-01-20
申请人： Atsuko Sakata , Junichi Wada , Seiichi Omoto , Masaaki Hatano , Soichi Yamashita , Kazuyuki Higashi , Naofumi Nakamura , Masaki Yamada , Kazuya Kinoshita , Tomio Katata , Masahiko Hasunuma
发明人： Atsuko Sakata , Junichi Wada , Seiichi Omoto , Masaaki Hatano , Soichi Yamashita , Kazuyuki Higashi , Naofumi Nakamura , Masaki Yamada , Kazuya Kinoshita , Tomio Katata , Masahiko Hasunuma
IPC分类号： H01L21/44
CPC分类号： H01L21/31616 , C23C16/045 , C23C16/45536 , C23C16/482 , H01L21/02178 , H01L21/02186 , H01L21/02244 , H01L21/02255 , H01L21/28556 , H01L21/28562 , H01L21/67109 , H01L21/67748 , H01L21/6831 , H01L21/68742 , H01L21/68764 , H01L21/68771 , H01L21/76807 , H01L21/76814 , H01L21/76828 , H01L21/76831 , H01L21/76835 , H01L21/76843 , H01L21/76846 , H01L21/76855 , H01L21/76858 , H01L21/76864 , H01L21/76873 , H01L21/76874 , H01L23/5222 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A method for manufacturing a semiconductor device includes heating a substrate having an insulation film thereon to a first substrate temperature so that oxidizing species are emitted from the insulating film, the insulating film having a recessed portion formed in a surface thereof, forming a metal film on the insulating film at a second substrate temperature lower than the first substrate temperature, and oxidizing at least part of the metal film with oxidizing species remaining in the insulating film.

53. 发明授权

US07285859B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US07285859B2
公开(公告)日：2007-10-23
申请号：US11244140
申请日：2005-10-06
申请人： Masahiko Hasunuma , Sachiyo Ito
发明人： Masahiko Hasunuma , Sachiyo Ito
IPC分类号： H01L23/52 , H01L29/40
CPC分类号： H01L21/76816 , H01L21/76807 , H01L21/76832 , H01L23/522 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： There is disclosed a semiconductor device comprising a plurality of inter-level dielectric films which are stacked and provided in plural layers above a substrate, at least one first conductor which is provided in at least one inter-level dielectric film of the stacked inter-level dielectric films, and a plurality of second conductors which are provided in the inter-level dielectric film in which the first conductor is provided and which are connected to the lower surface of the first conductor and which are extended along the downward direction from the first conductor and further extended along a first direction and a second direction perpendicular to the first direction in such a manner as to be spaced apart from each other to form a lattice shape.
摘要翻译：公开了一种半导体器件，包括多个层间电介质膜，它们层叠并设置在衬底上方的多层中，至少一个第一导体，设置在层叠的层间的至少一个级间介电膜中电介质膜和多个第二导体，其设置在层间电介质膜中，其中设置有第一导体，并且连接到第一导体的下表面并且沿着向下的方向从第一导体延伸并且进一步沿着与第一方向垂直的第一方向和第二方向延伸，以便彼此间隔开以形成格子形状。

54. 发明申请

US20070007618A1 Semiconductor device 失效
公开(公告)号：US20070007618A1
公开(公告)日：2007-01-11
申请号：US11244140
申请日：2005-10-06
申请人： Masahiko Hasunuma , Sachiyo Ito
发明人： Masahiko Hasunuma , Sachiyo Ito
IPC分类号： H01L29/00
CPC分类号： H01L21/76816 , H01L21/76807 , H01L21/76832 , H01L23/522 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： There is disclosed a semiconductor device comprising a plurality of inter-level dielectric films which are stacked and provided in plural layers above a substrate, at least one first conductor which is provided in at least one inter-level dielectric film of the stacked inter-level dielectric films, and a plurality of second conductors which are provided in the inter-level dielectric film in which the first conductor is provided and which are connected to the lower surface of the first conductor and which are extended along the downward direction from the first conductor and further extended along a first direction and a second direction perpendicular to the first direction in such a manner as to be spaced apart from each other to form a lattice shape.

55. 发明授权

US07097946B2 Photomask, method of manufacturing a photomask, and method of manufacturing an electronic product 失效
公开(公告)号：US07097946B2
公开(公告)日：2006-08-29
申请号：US10615194
申请日：2003-07-09
申请人： Sachiyo Ito , Masamitsu Itoh , Masahiko Hasunuma
发明人： Sachiyo Ito , Masamitsu Itoh , Masahiko Hasunuma
IPC分类号： G03F9/00 , G03C5/00
CPC分类号： G03F1/32
摘要： A photomask comprises a substrate, a translucent film selectively formed on the substrate, and a shading film selectively formed on the translucent film, wherein when the substrate, the translucent film and the shading film have Young's moduli (MPa) E0 E1 and E2, and film thickness (m) d0, d1 and d2 respectively, internal stresses (MPa) of the translucent film and the shading film at room temperature are s1 and s2 respectively, a covering rate by the translucent film defined by an area in which the shading film is not formed is expressed as h, and coefficients are expressed as k1=1.3×10−8, k2=−9.5×10−2, k3=6.0×10−7, and k4=−5.2×10−2 respectively, the substrate, the translucent film and the shading film satisfy a condition given by the following expression:  1 E 0 · d 0 · { h · ( k 1 · S 1 E 1 · d 1 + k 2 ) + ( k 3 · S 2 E 2 · d 2 + k 4 ) }  ≦ 1.4 × 10 - 4 ⁢ ( m - 1 ) .

56. 发明申请

US20060055028A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20060055028A1
公开(公告)日：2006-03-16
申请号：US11028664
申请日：2005-01-05
申请人： Masahiko Hasunuma
发明人： Masahiko Hasunuma
IPC分类号： H01L23/48
CPC分类号： H01L23/367 , H01L2224/16225 , H01L2224/16235 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/15174 , H01L2924/15311 , H01L2924/16195 , H01L2924/3011 , H01L2924/00012 , H01L2924/00 , H01L2224/0401
摘要： According to an aspect of the present invention, a semiconductor device, including: a semiconductor chip having a first metal heat conductive medium in the inside thereof; a substrate having a second metal heat conductive medium thermally connected to the first metal heat conductive medium; and a temperature control device of which at least a part is disposed on the substrate, thermally connected to the second metal heat conductive medium, and configured to control the temperature within the semiconductor chip, is provided.
摘要翻译：根据本发明的一个方面，一种半导体器件，包括：在其内部具有第一金属导热介质的半导体芯片; 具有与第一金属导热介质热连接的第二金属导热介质的基板; 以及温度控制装置，其至少部分设置在所述基板上，热连接到所述第二金属导热介质，并且被配置为控制所述半导体芯片内的温度。

57. 发明申请

US20050255650A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20050255650A1
公开(公告)日：2005-11-17
申请号：US11168928
申请日：2005-06-29
申请人： Masahiko Hasunuma , Sachiyo Ito
发明人： Masahiko Hasunuma , Sachiyo Ito
IPC分类号： H01L21/00 , H01L21/768 , H01L21/8242 , H01L23/00 , H01L23/367 , H01L23/52 , H01L23/522 , H01L23/528 , H01L23/532 , H01L23/58 , H01L29/40
CPC分类号： H01L23/585 , H01L21/76807 , H01L21/76832 , H01L21/76834 , H01L23/3677 , H01L23/522 , H01L23/5283 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L23/562 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes an insulating film whose relative dielectric constant is 3.4 or less, at least one conductive layer, at least one conductive plug which is electrically connected to the conductive layer to form a conduction path, at least one reinforcing material whose Young's modulus is 30 GPa or more, at least one first reinforcing plug which is connected to the conductive layer and which is formed in contact with the reinforcing material, a reinforcing metal layer which is provided in the insulating film in an area other than that where the conductive layer is formed, and which is electrically disconnected from the conductive layer and the conductive plug, and a second reinforcing plug which is connected to the under side of the reinforcing metal layer and which is formed in contact with the reinforcing material.
摘要翻译：半导体器件包括相对介电常数为3.4以下的绝缘膜，至少一个导电层，与导电层电连接以形成导电路径的至少一个导电插塞，至少一种增强材料，其杨氏模量为 30GPa以上的至少一个第一加强塞，其连接到所述导电层并且与所述增强材料接触形成，所述加强金属层设置在所述绝缘膜中的除了所述导电层并且其与导电层和导电插塞电气断开，以及第二加强塞，其连接到加强金属层的下侧，并且与增强材料接触形成。

58. 发明申请

US20050167842A1 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US20050167842A1
公开(公告)日：2005-08-04
申请号：US10974922
申请日：2004-10-28
申请人： Naofumi Nakamura , Noriaki Matsunaga , Sachiyo Ito , Masahiko Hasunuma , Takeshi Nishioka
发明人： Naofumi Nakamura , Noriaki Matsunaga , Sachiyo Ito , Masahiko Hasunuma , Takeshi Nishioka
IPC分类号： H01L23/52 , H01L21/00 , H01L21/3205 , H01L21/822 , H01L23/00 , H01L23/522 , H01L23/58 , H01L27/04 , H01L27/10 , H01L29/40
CPC分类号： H01L23/564 , H01L23/522 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a first insulating layer provided above a semiconductor substrate. The first insulating layer includes a layer consisting essentially of a material having a relative dielectric constant smaller than 3. The first insulating layer includes a first integral structure consisting of a plug and wiring. The upper surface of the wiring is flush with the upper surface of the first insulating layer, and the lower surface of the plug is flush with the lower surface of the first insulating layer. A region protective member is formed of a second integral structure consisting of a plug and wiring. The second integral structure extends from the upper surface of the first insulating layer to the lower surface of the first insulating layer. The region protective member surrounds one of first to n-th regions (n being a natural 2 or more) partitioned by a boundary region on a horizontal plane.
摘要翻译：半导体器件包括设置在半导体衬底之上的第一绝缘层。第一绝缘层包括基本上由相对介电常数小于3的材料组成的层。第一绝缘层包括由插头和布线组成的第一整体结构。布线的上表面与第一绝缘层的上表面齐平，插头的下表面与第一绝缘层的下表面齐平。区域保护构件由由插头和布线组成的第二整体结构形成。第二整体结构从第一绝缘层的上表面延伸到第一绝缘层的下表面。区域保护构件围绕由水平面上的边界区划分的第一至第n区域（n为自然2以上）中的一个。

59. 发明申请

US20050121808A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20050121808A1
公开(公告)日：2005-06-09
申请号：US10975071
申请日：2004-10-28
申请人： Masahiko Hasunuma , Akitsugu Hatazaki
发明人： Masahiko Hasunuma , Akitsugu Hatazaki
IPC分类号： H01L23/29 , H01L23/31 , H01L23/532
CPC分类号： H01L23/293 , H01L23/3128 , H01L23/5329 , H01L23/53295 , H01L24/48 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/01019 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/181 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device comprises a semiconductor chip in which a multilayer interconnection structure having an interlayer insulation film with a low relative dielectric constant is formed on a silicon substrate and a sealing resin layer which coats the semiconductor chip. The sealing resin layer meets, in coefficient of linear expansion (α) at room temperature, Young's modulus (E) at room temperature and thickness (h) thereof, a relationship of the following formula (1) E
摘要翻译：半导体器件包括半导体芯片，其中在硅衬底上形成具有低相对介电常数的层间绝缘膜的多层互连结构和涂覆半导体芯片的密封树脂层。密封树脂层以室温下的线膨胀系数（α），室温下的杨氏模量（E）和厚度（h））满足下式（1）<β在线配方说明的关系 =“In-line Formulas”end =“lead”？> E <0.891 / {（alpha-alphas）^{2 xh}（1）<？in-line-formula description =“In-line 公式“end =”tail“？>其中E表示密封树脂在室温下的杨氏模量（GPa）; α表示密封树脂在室温下的线膨胀系数（ppm）; Alphas表示硅衬底的线膨胀系数（3.5ppm）; h表示半导体芯片的器件形成面上的密封树脂的厚度（μm）。}

60. 发明授权

US06673704B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06673704B2
公开(公告)日：2004-01-06
申请号：US10189598
申请日：2002-07-08
申请人： Junichi Wada , Atsuko Sakata , Tomio Katata , Takamasa Usui , Masahiko Hasunuma , Hideki Shibata , Hisashi Kaneko , Nobuo Hayasaka , Katsuya Okumura
发明人： Junichi Wada , Atsuko Sakata , Tomio Katata , Takamasa Usui , Masahiko Hasunuma , Hideki Shibata , Hisashi Kaneko , Nobuo Hayasaka , Katsuya Okumura
IPC分类号： H01L2140
CPC分类号： H01L21/76867 , H01L21/2855 , H01L21/76802 , H01L21/76805 , H01L21/76843 , H01L21/76844 , H01L21/76846 , H01L21/76847 , H01L21/76849 , H01L21/76855 , H01L21/76856 , H01L21/76859 , H01L21/76864 , H01L21/76877 , H01L21/76879 , H01L21/76886 , H01L21/76889
摘要： A method of manufacturing semiconductor device which comprises the steps of forming an insulating film on an Si substrate provided with a wiring layer, forming a contact hole connected to the wiring layer and a wiring groove in the insulating film, filling the contact hole with an Si film, successively forming an Al film and a Ti film all over the substrate, performing a heat treatment thereby to substitute the Al film for the Ti film, and to allow the Si film to be absorbed by the Ti film, whereby filling the contact hole and wiring groove with the Al film, and removing a Ti/Ti silicide which is consisting of Ti silicide formed through the absorption of the Si film by the Ti film and a superfluous Ti, whereby filling the contact hole with an Al plug and filling the wiring groove with an Al wiring.
摘要翻译：一种制造半导体器件的方法，包括以下步骤：在具有布线层的Si衬底上形成绝缘膜，形成与布线层连接的接触孔和绝缘膜中的布线槽，用Si 膜，依次在基板上形成Al膜和Ti膜，进行热处理，从而将Al膜替代为Ti膜，并使Si膜被Ti膜吸收，由此填充接触孔和Al膜的布线槽，除去由Ti膜和多余Ti吸收Si膜形成的由Ti硅化物构成的Ti / Ti硅化物，由此用Al塞填充接触孔，并填充布线槽与Al接线。

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