专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

51. 发明授权

US06784494B2 Production method for SOI wafer and SOI wafer 失效
标题翻译： SOI晶圆和SOI晶圆的生产方法
公开(公告)号：US06784494B2
公开(公告)日：2004-08-31
申请号：US10203752
申请日：2002-08-13
申请人： Kiyoshi Mitani
发明人： Kiyoshi Mitani
IPC分类号： H01L2104
CPC分类号： H01L21/76256 , H01L21/76251 , H01L21/76254 , H01L21/84 , H01L27/1203
摘要： A silicon oxide film 3′, 3″ is formed on each of the main surfaces of a first silicon single crystal substrate 1 (bond wafer) and a second silicon single crystal substrate 2 (base wafer), and the first and second silicon single crystal substrates are then brought into close contact so as to locate the silicon oxide films 3′, 3″ in between in an atmosphere of a clean air supplied through a boron-releasable filter, to thereby produce an SOI wafer 10. The second silicon single crystal substrate 2 employed herein comprises a silicon single crystal substrate having a bulk resistivity of 100 &OHgr;·cm or above. In thus produced SOI wafer 10, the silicon oxide film 3 has a depth profile of boron concentration in which the boron concentration reaches maximum at a thickness-wise position. This ensures manufacturing of SOI wafer excellent in high-frequency characteristics.
摘要翻译：在第一硅单晶衬底1（接合晶片）和第二硅单晶衬底2（基底晶片）的每个主表面上形成氧化硅膜3'，3“，并且第一和第二硅单晶然后使晶体基板紧密接触，以便在通过可硼剥离的过滤器供应的清洁空气的气氛中将氧化硅膜3'，3“定位在其间，从而产生SOI晶片10.第二硅本申请使用的单晶基板2包含体积电阻率为100Ω·cm以上的硅单晶基板。在这样制造的SOI晶片10中，氧化硅膜3具有在厚度方向上硼浓度达到最大的硼浓度的深度分布。这确保制造高频特性优异的SOI晶片。

52. 发明授权

US06461939B1 SOI wafers and methods for producing SOI wafer 有权
标题翻译： SOI晶片和SOI晶片的制造方法
公开(公告)号：US06461939B1
公开(公告)日：2002-10-08
申请号：US09701280
申请日：2000-11-28
申请人： Jun-ichiro Furihata , Kiyoshi Mitani , Norihiro Kobayashi , Shoji Akiyama
发明人： Jun-ichiro Furihata , Kiyoshi Mitani , Norihiro Kobayashi , Shoji Akiyama
IPC分类号： H01L2146
CPC分类号： H01L21/76254
摘要： According to the present invention, there are provided an SO wafer wherein surface roughness of an SOI layer surface of the SOI wafer is 0.12 nm or less in terms of RMS value and/or interface roughness of an interface between the SOT layer and a buried oxide layer of the SOI wafer is 0.12 nm or less in terms of RMS value, and a method for producing an SOI wafer, which comprises mirror-polishing an SOI wafer, removing a native oxide film on a surface of the wafer or forming a thermal oxide film having a thickness of 300 nm or more on the surface and removing the thermal oxide film, and subjecting the wafer to a heat treatment in an atmosphere of 100% hydrogen or a mixed gas atmosphere of argon and/or nitrogen containing 10% or more of hydrogen by using a rapid heating and rapid cooling apparatus. Thus, there can be obtained an SOI wafer of high quality having surface roughness of the SOI layer surface and interface roughness of the SOI/BOX interface that affect extremely little on the fluctuation of device characteristics of MOS devices fabricated by using the SOI wafer, such as dielectric breakdown voltage, threshold voltage and carrier mobility, and a method for producing the same.
摘要翻译：根据本发明，提供了一种SO晶片，其中SOI晶片的SOI层表面的表面粗糙度在SOT层和掩埋氧化物之间的界面的RMS值和/或界面粗糙度方面为0.12nm以下 SOI晶片的面积的RMS值为0.12nm以下，SOI晶片的制造方法，其包括对SOI晶片进行镜面抛光，去除晶片表面的自然氧化膜或形成热氧化物在表面上具有300nm以上的厚度的膜，去除热氧化膜，并在100％氢气或含有10％以上的氩气和/或氮气的混合气体气氛中对晶片进行热处理的氢气通过使用快速加热和快速冷却装置。因此，可以获得具有SOI层表面的表面粗糙度和SOI / BOX界面的界面粗糙度的SOI晶片，其对通过使用SOI晶片制造的MOS器件的器件特性的波动影响极小，例如作为介电击穿电压，阈值电压和载流子迁移率，以及其制造方法。

53. 发明授权

US06284629B1 Method of fabricating an SOI wafer and SOI wafer fabricated by the method 有权
标题翻译：通过该方法制造SOI晶片和SOI晶片的方法
公开(公告)号：US06284629B1
公开(公告)日：2001-09-04
申请号：US09343074
申请日：1999-06-29
申请人： Isao Yokokawa , Naoto Tate , Kiyoshi Mitani
发明人： Isao Yokokawa , Naoto Tate , Kiyoshi Mitani
IPC分类号： H01L2130
CPC分类号： H01L21/76251 , H01L21/76254 , Y10S156/942 , Y10S438/977 , Y10T156/1978
摘要： There is disclosed a method of fabricating an SOI wafer wherein an oxide film is formed on at least one of two single crystal silicon wafers; hydrogen ions or rare gas ions are implanted into the upper surface of one of the two silicon wafers in order to form an ion implanted layer; the ion-implanted surface is brought into close contact with the surface of the other silicon wafer via the oxide film; heat treatment is performed to separate a thin film from the silicon wafer with using the ion implanted layer as a delaminating plane to fabricate the SOI wafer having an SOI layer; and then an epitaxial layer is grown on the SOI layer to form a thick SOI layer. There is provided an SOI wafer which has a thick SOI layer with good thickness uniformity and good crystallinity and which is useful for a bipolar device or a power device.
摘要翻译：公开了一种制造SOI晶片的方法，其中氧化膜形成在两个单晶硅晶片中的至少一个上; 为了形成离子注入层，将氢离子或稀有气体离子注入到两个硅晶片之一的上表面中; 离子注入表面通过氧化膜与另一硅晶片的表面紧密接触; 使用离子注入层作为分层平面进行热处理以从硅晶片分离薄膜，以制造具有SOI层的SOI晶片; 然后在SOI层上生长外延层以形成厚的SOI层。提供了SOI晶片，该SOI晶片具有厚的均匀性和良好的结晶度的厚的SOI层，并且可用于双极器件或功率器件。

54. 发明授权

US06245645B1 Method of fabricating an SOI wafer 有权
标题翻译：制造SOI晶片的方法
公开(公告)号：US06245645B1
公开(公告)日：2001-06-12
申请号：US09346576
申请日：1999-07-01
申请人： Kiyoshi Mitani , Isao Yokokawa
发明人： Kiyoshi Mitani , Isao Yokokawa
IPC分类号： H01L2146
CPC分类号： H01L21/76254 , H01L21/76251 , Y10S438/977
摘要： There is disclosed a method of fabricating an SOI wafer in which a bond wafer to form a SOI layer and a base wafer to be a supporting substrate are prepared; an oxide film is formed on at least the bond wafer; hydrogen ions or rare gas ions are implanted in the bond wafer via the oxide film in order to form a fine bubble layer (enclosed layer) within the bond wafer; the ion-implanted surface is brought into close contact with the surface of the base wafer; and then heat treatment is performed to separate a thin film from the bond wafer using the fine bubble layer as a delaminating plane to fabricate the SOI wafer having an SOI layer; and wherein deviation in the thickness of the oxide film formed on the bond wafer is controlled to be smaller than the deviation in the ion implantation depth, and the SOI wafer fabricated thereby. There is provided an SOI wafer which has an SOI layer having improved thickness uniformity.
摘要翻译：公开了制造SOI晶片的方法，其中制备用于形成SOI层的接合晶片和作为支撑衬底的基底晶片; 至少在所述接合晶片上形成氧化膜; 通过氧化膜将氢离子或稀有气体离子注入到接合晶片中，以在接合晶片内形成微小的气泡层（封闭层）; 离子注入表面与基底晶片的表面紧密接触; 然后进行热处理，使用微细气泡层作为分层面从接合晶片分离薄膜，制造具有SOI层的SOI晶片; 并且其中形成在接合晶片上的氧化膜的厚度的偏差被控制为小于离子注入深度的偏差，以及由此制造的SOI晶片。提供了具有改善的厚度均匀性的SOI层的SOI晶片。

55. 外观设计

USD390244S Television camera 失效
公开(公告)号：USD390244S
公开(公告)日：1998-02-03
申请号：US70608
申请日：1997-05-09
申请人： Yasuki Yamakawa , Kiyoshi Mitani
设计人： Yasuki Yamakawa , Kiyoshi Mitani

56. 发明授权

US5702973A Method for forming epitaxial semiconductor wafer for CMOS integrated circuits 失效
标题翻译：用于形成用于CMOS集成电路的外延半导体晶片的方法
公开(公告)号：US5702973A
公开(公告)日：1997-12-30
申请号：US477997
申请日：1995-06-07
申请人： Kiyoshi Mitani , Witiwat Wijaranakula
发明人： Kiyoshi Mitani , Witiwat Wijaranakula
IPC分类号： H01L27/092 , H01L21/70
CPC分类号： H01L27/0921 , H01L27/0925
摘要： The present invention is a CMOS epitaxial semiconductor wafer (50) on which CMOS integrated circuits (16) can be manufactured, including such circuits that include bipolar components (referred to as "BiCMOS" circuits). The CMOS wafer includes a lightly doped monocrystalline silicon substrate (56) having a major surface (54) that supports a lightly doped monocrystalline epitaxial silicon layer (52). The substrate includes a heavily doped diffused layer (58) extending a short distance (64) into the substrate from the major surface toward a lightly doped bulk portion (66) of the substrate. CMOS integrated circuits manufactured on the epitaxial layer of the CMOS wafer of this invention have a low susceptibility to latch-up. The low susceptibility is provided by the relatively low resistivity of the diffused layer. Since the diffused layer is relatively thin and the bulk portion is lightly doped, the oxygen content of the bulk can be readily measured and controlled.
摘要翻译：本发明是一种可以制造CMOS集成电路（16）的CMOS外延半导体晶片（50），包括包括双极组件（称为“BiCMOS”电路）的电路。 CMOS晶片包括具有支撑轻掺杂单晶外延硅层（52）的主表面（54）的轻掺杂单晶硅衬底（56）。衬底包括从衬底的主表面向衬底的轻掺杂体部分（66）延伸短距离（64）到衬底中的重掺杂扩散层（58）。在本发明的CMOS晶片的外延层上制造的CMOS集成电路具有低的闩锁敏感性。低磁化率由扩散层的较低电阻率提供。由于扩散层相对较薄并且本体部分被轻掺杂，因此容易测量和控制本体的氧含量。

57. 发明授权

US08575722B2 Semiconductor substrate having multilayer film and method to reuse the substrate by delaminating a porous layer 有权
标题翻译：具有多层膜的半导体衬底和通过使多孔层分层来再利用衬底的方法
公开(公告)号：US08575722B2
公开(公告)日：2013-11-05
申请号：US13142544
申请日：2009-12-08
申请人： Kiyoshi Mitani , Tsuyoshi Ohtsuki , Toru Takahashi , Wei Feig Qu
发明人： Kiyoshi Mitani , Tsuyoshi Ohtsuki , Toru Takahashi , Wei Feig Qu
IPC分类号： H01L29/06 , H01L21/46 , H01L21/00
CPC分类号： H01L21/76259 , H01L21/0203 , H01L21/02032 , H01L27/1214 , H01L27/1266
摘要： A method for producing a semiconductor wafer having a multilayer film, in production of a semiconductor device by the steps of forming a porous layer on a surface of a semiconductor wafer by changing a surface portion into the porous layer, forming a semiconductor film on a surface of the porous layer to produce a semiconductor wafer having a multilayer film, fabricating a device on the semiconductor film, and producing the semiconductor device by delaminating the semiconductor film along the porous layer, the semiconductor film having the device formed thereon, including flattening the semiconductor wafer after delaminating and reusing the flattened semiconductor wafer, the method further including a thickness adjusting step of adjusting a whole thickness of the semiconductor wafer having a multilayer film to be produced by reusing the semiconductor wafer so as to satisfy a predetermined standard.
摘要翻译：一种制造具有多层膜的半导体晶片的制造方法，其特征在于，在半导体装置的制造中，通过将表面部分变为多孔层，在半导体晶片的表面形成多孔层，在表面形成半导体膜的多孔层，以制造具有多层膜的半导体晶片，在半导体膜上制造器件，并且通过沿着多孔层分层半导体膜来制造半导体器件，该半导体膜具有形成在其上的器件，包括使半导体所述方法还包括：通过重新使用所述半导体晶片以满足预定标准来调整具有要制造的多层膜的半导体晶片的整体厚度的厚度调整步骤。

58. 发明授权

US07560313B2 SOI wafer and method for producing the same 有权
标题翻译： SOI晶片及其制造方法
公开(公告)号：US07560313B2
公开(公告)日：2009-07-14
申请号：US10473352
申请日：2002-03-29
申请人： Hiroji Aga , Kiyoshi Mitani
发明人： Hiroji Aga , Kiyoshi Mitani
IPC分类号： H01L21/00
CPC分类号： H01L21/76254
摘要： The present invention provides a SOI wafer produced by an ion implantation delamination method wherein a width of a SOI island region in a terrace portion generated in an edge portion of the SOI wafer where a surface of a base wafer is exposed is narrower than 1 mm and a density of pit-shaped defects having a size of 0.19 μm or more existing in a surface of a SOI layer detected by a LPD inspection is 1 counts/cm2 or less, and also provides a method for producing the SOI wafer. Thereby, there is provided a SOI wafer produced by an ion implantation delamination method wherein generation of SOI islands generated in delamination can be suppressed and a defect density of LPDs existing in a surface of the SOI wafer can be reduced, and a method for producing the same, so that device failure can be reduced.
摘要翻译：本发明提供一种通过离子注入分层方法制造的SOI晶片，其中在SOI晶片的边缘部分中产生的露台部分中的SOI岛区域的宽度基底晶片暴露的距离窄于1mm，存在于通过LPD检查检测的SOI层的表面中的具有0.19μm以上的尺寸的凹坑状缺陷的密度为1个/ cm 2以下，并且还提供了SOI晶片的制造方法。因此，提供了通过离子注入分层方法制造的SOI晶片，其中可以抑制在分层中产生的SOI岛的产生，并且可以减少存在于SOI晶片的表面中的LPD的缺陷密度，以及制造相同，从而可以减少设备故障。

59. 发明授权

US07524744B2 Method of producing SOI wafer and SOI wafer 有权
标题翻译：制造SOI晶圆和SOI晶圆的方法
公开(公告)号：US07524744B2
公开(公告)日：2009-04-28
申请号：US10544374
申请日：2004-02-13
申请人： Isao Yokokawa , Hiroji Aga , Kiyotaka Takano , Kiyoshi Mitani
发明人： Isao Yokokawa , Hiroji Aga , Kiyotaka Takano , Kiyoshi Mitani
IPC分类号： H01L21/425
CPC分类号： H01L21/76243 , H01L21/26533
摘要： The present invention provides a method of producing an SOI wafer, comprising at least steps of forming an oxygen ion-implanted layer by implanting oxygen ions into a silicon wafer from one main surface thereof, subjecting the silicon wafer to oxide film-forming heat treatment to convert the oxygen ion-implanted layer into a buried oxide film, and thereby producing an SOI wafer having an SOI layer on the buried oxide film, wherein when the buried oxide film is formed in the silicon wafer, the buried oxide film is formed so that a thickness thereof is thicker than a thickness of the buried oxide film which the SOI wafer to be produced has, and thereafter the silicon wafer in which the thicker buried oxide film is formed is subjected to a heat treatment to reduce the thickness of the buried oxide film. Thereby, there can be provided a method of producing an SOI wafer in which a high quality SOI wafer having a buried oxide film of which a film thickness is thin and perfectness is high and an SOI layer of which crystallinity and surface quality are extremely good can be produced by using SIMOX method.
摘要翻译：本发明提供一种制造SOI晶片的方法，其至少包括通过从其一个主表面将氧离子注入硅晶片来形成氧离子注入层的步骤，将硅晶片进行氧化膜形成热处理将氧离子注入层转换为埋入氧化膜，由此在埋入氧化膜上制造具有SOI层的SOI晶片，其中，当在硅晶片中形成掩埋氧化膜时，形成掩埋氧化膜，使得其厚度比所制造的SOI晶片的埋入氧化膜的厚度厚，然后对其中形成较厚掩埋氧化膜的硅晶片进行热处理，以减小掩埋氧化物的厚度电影。因此，可以提供一种制造SOI晶片的方法，其中具有膜厚度薄且完整性高的掩埋氧化膜的高品质SOI晶片和结晶度和表面质量非常好的SOI层使用SIMOX法生产。

60. 发明申请

US20080286937A1 Manufacturing Method for Bonded Wafer 有权
标题翻译：粘结晶片的制造方法
公开(公告)号：US20080286937A1
公开(公告)日：2008-11-20
申请号：US11629074
申请日：2005-06-06
申请人： Kiyoshi Mitani
发明人： Kiyoshi Mitani
IPC分类号： H01L21/265
CPC分类号： H01L21/26506 , H01L21/76254
摘要： In a first ion implantation step (a1), a delamination-intended ion implantation layer 3 is formed by implanting ions at a dosage less than a critical dosage from the insulating film 2 side of a bond wafer 1. In an additional function layer deposition step (b2), an additional function layer 4 is deposited on the insulating film 2 of the bond wafer 1. In a second ion implantation step (c1), by implanting ions at a dosage, the delamination-intended ion implantation layer 3 is matured into a delamination ion implantation layer 3′. Thereby, the delamination ion implantation layer is formed by two steps of ion implantation having the additional function layer deposition step therebetween, and therefore non-uniformity of the additional function layer does not influence uniformity of a film thickness of a bonded semiconductor thin layer.
摘要翻译：在第一离子注入步骤（a1）中，通过从接合晶片1的绝缘膜2侧以小于临界剂量的剂量注入离子而形成分层预期的离子注入层3。在另外的功能层沉积步骤（b2）中，附着功能层4沉积在接合晶片1的绝缘膜2上。在第二离子注入步骤（c1）中，通过以剂量注入离子，分层预期的离子注入层3成熟为分层离子注入层3'。因此，分离离子注入层通过离子注入两步形成，其间具有附加功能层沉积步骤，因此附加功能层的不均匀性不影响键合的半导体薄层的膜厚度的均匀性。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式