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    • 51. 发明申请
    • PWM circuit and PWM integrated circuit for use in PWM circuit
    • PWM电路和PWM集成电路用于PWM电路
    • US20070290729A1
    • 2007-12-20
    • US11454459
    • 2006-06-16
    • Isaac Y. Chen
    • Isaac Y. Chen
    • H03K3/017
    • H03K7/08
    • The present invention discloses a PWM integrated circuit which may receive a programming signal without any extra pin. The PWM integrated circuit comprises: a comparator having two outputs; two pins respectively electrically connected with the two outputs; and a programming unit electrically connected with at least one of the two pins for setting a parameter inside the PWM integrated circuit. The two pins of the PWM integrated circuit may be used to respectively control a control switch and a synchronous switch, constituting a PWM circuit for generating PWM signals.
    • 本发明公开了一种PWM集成电路,其可以在没有任何额外的引脚的情况下接收编程信号。 PWM集成电路包括:具有两个输出的比较器; 两个引脚分别与两个输出端电连接; 以及编程单元,与所述两个引脚中的至少一个电连接,用于在所述PWM集成电路内设置参数。 PWM集成电路的两个引脚可以分别用于控制控制开关和同步开关,构成用于产生PWM信号的PWM电路。
    • 53. 发明授权
    • Light emitting device driver chip
    • 发光装置驱动芯片
    • US09398657B2
    • 2016-07-19
    • US14595743
    • 2015-01-13
    • Tong-Cheng JaoIsaac Y. ChenYi-Wei Lee
    • Tong-Cheng JaoIsaac Y. ChenYi-Wei Lee
    • H05B37/00H05B39/00H05B41/00H05B33/08
    • H05B33/083H05B33/0812
    • The present invention discloses a light emitting device driver chip for driving light emitting devices in series. The chip includes: plural pins electrically connected to corresponding light emitting devices, respectively, wherein an internal voltage is provided through a predetermined one of the pins; a voltage regulation circuit for providing an operation voltage according to the internal voltage; a switch circuit including plural switch groups electrically connected to corresponding pins, respectively; a current source circuit for providing a current to the light emitting devices; and a switch control circuit for controlling the switch groups to determine which light emitting device is turned ON. The light emitting device driver chip does not directly receive the rectified input voltage.
    • 本发明公开了一种串联驱动发光装置的发光装置驱动芯片。 芯片包括:分别电连接到对应的发光器件的多个引脚,其中通过预定的一个引脚提供内部电压; 电压调节电路,用于根据内部电压提供工作电压; 开关电路,包括分别电连接到相应引脚的多个开关组; 用于向发光器件提供电流的电流源电路; 以及用于控制开关组以确定哪个发光器件导通的开关控制电路。 发光装置驱动芯片不直接接收整流输入电压。
    • 55. 发明授权
    • Light emitting device driver circuit
    • 发光装置驱动电路
    • US09277616B1
    • 2016-03-01
    • US14595910
    • 2015-01-13
    • Tong-Cheng JaoIsaac Y. ChenYi-Wei Lee
    • Tong-Cheng JaoIsaac Y. ChenYi-Wei Lee
    • H05B37/00H05B39/00H05B41/00H05B33/08
    • H05B33/083
    • The present invention discloses a light emitting device driver circuit. The light emitting device driver circuit drives a light emitting device circuit. The light emitting device circuit includes plural light emitting devices connected in series and a diode circuit, wherein the plural light emitting devices are divided to plural groups. The light emitting device driver circuit includes: a first switch circuit, a second switch circuit, a current source circuit, and a control circuit. The first switch circuit includes plural first switches connected in parallel to the corresponding groups respectively. The second switch circuit includes plural second switches coupled to a forward end and a reverse end of the diode circuit respectively, wherein the second switch circuit determines whether to conduct the forward end or the reverse end to the current source circuit according to the voltages of the forward end and the reverse end.
    • 本发明公开了一种发光器件驱动电路。 发光装置驱动电路驱动发光器件电路。 发光器件电路包括串联连接的多个发光器件和二极管电路,其中多个发光器件被分成多个组。 发光器件驱动电路包括:第一开关电路,第二开关电路,电流源电路和控制电路。 第一开关电路包括分别与相应组并联连接的多个第一开关。 第二开关电路包括分别耦合到二极管电路的前端和反向端的多个第二开关,其中第二开关电路根据第二开关电路的电压来确定是否将前端或反向端导向电流源电路 前端和后端。
    • 58. 发明申请
    • Protection Device and Calibration Method Thereof
    • 保护装置及其校准方法
    • US20140316735A1
    • 2014-10-23
    • US14153804
    • 2014-01-13
    • Tong-Cheng JaoIsaac Y. Chen
    • Tong-Cheng JaoIsaac Y. Chen
    • G01R35/00
    • H02H3/006
    • The present invention discloses a protection device and a calibration method thereof. The protection device includes a sensing circuit and a detection circuit. The detection circuit includes: a comparing circuit, a setting circuit and an automatic calibration circuit. The comparing circuit is coupled to the sensing circuit and generates a protection signal according to a sensing signal and an offset setting. The setting circuit is coupled to the comparing circuit and generates the offset setting according to a calibration signal. The automatic calibration circuit is coupled between the comparing circuit and the setting circuit, for generating the calibration signal. The automatic calibration circuit automatically sets a protection threshold and stores the calibration signal which corresponds to the protection threshold.
    • 本发明公开了一种保护装置及其校准方法。 保护装置包括检测电路和检测电路。 检测电路包括:比较电路,设定电路和自动校准电路。 比较电路耦合到感测电路,并根据感测信号和偏移设置产生保护信号。 设置电路耦合到比较电路,并根据校准信号产生偏移设置。 自动校准电路耦合在比较电路和设置电路之间,用于产生校准信号。 自动校准电路自动设置保护阈值,并存储与保护阈值对应的校准信号。
    • 59. 发明申请
    • Single-Wire Asynchronous Serial Interface
    • 单线异步串行接口
    • US20120002732A1
    • 2012-01-05
    • US13175906
    • 2011-07-04
    • Isaac Y. Chen
    • Isaac Y. Chen
    • H04L25/34
    • H04L25/4923H04L5/04H04L7/044
    • The present invention discloses a single-wire asynchronous serial interface, and a method for transmitting commands and data through one transmission wire, wherein the transmission wire is capable of transmitting signals of three level states. The disclosed interface comprises a signal level extraction circuit receiving signals transmitted through the wire and outputting logic or functional bits according to the received signals; a clock extraction circuit generating clock signals according to the functional bits, and a memory circuit controlled by the clock signals and storing the logic bits. The disclosed method comprises: using two of the level states to represent logic 0 and logic 1, and the third of the states as a functional bit; and determining whether a group of signals is a command or data by the existence of a functional bit within the group.
    • 本发明公开了一种单线异步串行接口,以及一种通过一条传输线传输命令和数据的方法,其中传输线能传输三电平状态信号。 所公开的接口包括:信号电平提取电路,接收通过线路传输的信号,并根据接收到的信号输出逻辑或功能位; 根据功能位产生时钟信号的时钟提取电路和由时钟信号控制并存储逻辑比特的存储器电路。 所公开的方法包括:使用两个电平状态来表示逻辑0和逻辑1,并且将第三个状态用作功能位; 以及通过所述组内的功能位的存在来确定一组信号是否是命令或数据。
    • 60. 发明授权
    • Single-wire asynchronous serial interface
    • 单线异步串行接口
    • US08064534B2
    • 2011-11-22
    • US12684440
    • 2010-01-08
    • Isaac Y. Chen
    • Isaac Y. Chen
    • H04L25/49
    • H04L25/4923H04L5/04H04L7/044
    • The present invention discloses a single-wire asynchronous serial interface, and a method for transmitting commands and data through one transmission wire, wherein the transmission wire is capable of transmitting signals of three level states. The disclosed interface comprises a signal level extraction circuit receiving signals transmitted through the wire and outputting logic or functional bits according to the received signals; a clock extraction circuit generating clock signals according to the functional bits, and a memory circuit controlled by the clock signals and storing the logic bits. The disclosed method comprises: using two of the level states to represent logic 0 and logic 1, and the third of the states as a functional bit; and determining whether a group of signals is a command or data by the existence of a functional bit within the group.
    • 本发明公开了一种单线异步串行接口,以及一种通过一条传输线传输命令和数据的方法,其中传输线能传输三电平状态信号。 所公开的接口包括:信号电平提取电路,接收通过线路传输的信号,并根据接收到的信号输出逻辑或功能位; 根据功能位产生时钟信号的时钟提取电路和由时钟信号控制并存储逻辑比特的存储器电路。 所公开的方法包括:使用两个电平状态来表示逻辑0和逻辑1,并且将第三个状态用作功能位; 以及通过所述组内的功能位的存在来确定一组信号是否是命令或数据。