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51. 发明专利

JPH0483362A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURE OF THE SAME 失效
公开(公告)号：JPH0483362A
公开(公告)日：1992-03-17
申请号：JP19703190
申请日：1990-07-25
申请人： HITACHI LTD
发明人： SATO MASAYUKI
IPC分类号： H01L23/02 , H01L21/321 , H01L21/60 , H01L23/12
摘要： PURPOSE:To improve reliability and yield by making a connection part, connecting the rear of a semiconductor chip and a cap, of a material liquefied at a temperature at least in hermetically sealing or circuit operation. CONSTITUTION:A connection part 13 to connect the rear of a semiconductor chip 3 and a cap 4 is made in a space defined by the rear of the semiconductor chip 3, the inner wall of the cap 4, and a frame formation member 12. The connection part 13 is made of a material liquefied, for example, in hermetically sealing, circuit operation, a temperature cycle test, and a thermal shock test. Voids 14 are made when the connection part 13 in the space defined by the rear of the semiconductor chip 3, the inner wall of the cap 4, and the frame member 12 is liquefied. This is to prevent stress from being applied to the semiconductor chip 3 and sealing parts 10 even if the volume of the connection part 13 increases when it is liquefied. That is, thermal distortion caused in CCB bumps 8 and the connection part 13 has no effect on the sealing parts 10.

52. 发明专利

JPH01264245A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH01264245A
公开(公告)日：1989-10-20
申请号：JP9156688
申请日：1988-04-15
申请人： HITACHI LTD
发明人： SATO MASAYUKI
IPC分类号： H01L21/60
摘要： PURPOSE:To easily form band drum-shaped CCB bumps by a method wherein, after large and small contact holes have been formed in a photoresist, lead and tin are evaporated one after another on the surface, an unnecessary solder- evaporated film is removed and this assembly is wet-backed inside a furnace. CONSTITUTION:An integrated circuit pattern is formed on a wafer 1; after that, a glass protective film 2 is applied to the surface; holes are made in prescribed positions; contact holes 4 are made; after that, thin solder substratum electrodes 5 are evaporated and formed on inner peripheral faces. Then, a photoresist 6 is applied; inverted taper-shaped contact holes 4a, 4b are formed at the upper part of the solder substratum electrodes 5; lead and tin are evaporated on the surface; solder evaporated films 7a whose volume is large and whose tin content is high are applied to the inside of the contact holes 4a having a large diameter; solder evaporated films 7b whose volume is small and whose tin content is low are applied to the inside of the contact holes 4b having a small diameter. Then, these films are melted and united inside a reflow furnace; molten solders whose volume is small are stretched in the upward and downward directions; hand drum shapes are formed. Accordingly, it is possible to easily form hand drum-shaped CCB bumps.

53. 发明专利

JPH01128545A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH01128545A
公开(公告)日：1989-05-22
申请号：JP28532687
申请日：1987-11-13
申请人： HITACHI LTD
发明人： SATO MASAYUKI
IPC分类号： H01L21/60
摘要： PURPOSE:To reduce the connecting resistance of bump electrodes to wirings by so forming a pad larger than an opening on the opening as to connect it through the opening to the wiring, and providing the electrodes on the pad. CONSTITUTION:A pad 16P is connected through a connecting hole 15 to aluminum wirings 13. The upper face of the pad P16 is flattened. The area of the pad 16P is, since there is no restriction in the periphery, much larger than that of the hole 15, and can be formed, for example, 25 times or more as large as it. The pad 16P is covered by the substrate metal film 19 of the electrode 20B. That is, since the pad 16P having an area larger than the opening 15 is formed on the opening 15, the connecting area of the wirings 13 to the film 19 is equivalently increased. Here, when the diameter of the hole 15 is set to 10mum, the connecting resistance of the pad 16P to the wirings 13, i.e., the connecting resistance of the aluminum film to the aluminum film is

54. 发明专利

JPS637613B2 失效
公开(公告)号：JPS637613B2
公开(公告)日：1988-02-17
申请号：JP10971182
申请日：1982-06-28
申请人： HITACHI LTD
发明人： TAKAHASHI MICHIRO , SATO MASAYUKI
IPC分类号： G01L1/24

55. 发明专利

JPS6229192B2 失效
公开(公告)号：JPS6229192B2
公开(公告)日：1987-06-24
申请号：JP505182
申请日：1982-01-18
申请人： HITACHI LTD
发明人： SATO MASAYUKI
IPC分类号： B25J15/04 , B25J15/00

56. 发明专利

JPS62120927A FINE MOVING MECHANISM PERFORMING ROTARY MOTION IN MULTI DEGREE OF FREEDOM 失效
公开(公告)号：JPS62120927A
公开(公告)日：1987-06-02
申请号：JP25854785
申请日：1985-11-20
申请人： HITACHI LTD , HITACHI CONSTRUCTION MACHINERY
发明人： SUGIMOTO KOICHI , SATO MASAYUKI , MURAYAMA TAKESHI
IPC分类号： B23Q1/00 , B23Q1/34 , B23Q1/36 , B23Q1/44 , B23Q1/54 , B23Q5/34
摘要： PURPOSE:To compactly form a fine moving mechanism which performs rotary motion in multi degree of freedom, by arranging a stationary part, output part and three driving parts for connecting these former said parts so that an intersecting point of all the rotary axes of the driving parts agrees. CONSTITUTION:A stationary part 1 and an output part 2 are constituted of three driving parts 3. The stationary part 1 is fixed, and a desired motion is taken out from the output part 2. Three cut parts 4, 5, 6 are provided in the driving part 3, and it is divided into a link 7 connected with the stationary part, link 10 connected with the output part 2 and intermediate links 8, 9. Said driving part 3 is driven by a lead shaft connected with a motor. The cut parts 4, 5, 6 are machined so that their axes of rotary motion agree crossing through a point O. hereupon, a motion of the output part obtains a rotary motion about an axis passing through the point O.

57. 发明专利

JPS6215088A HANDLING DEVICE 失效
公开(公告)号：JPS6215088A
公开(公告)日：1987-01-23
申请号：JP15022585
申请日：1985-07-10
申请人： HITACHI LTD
发明人： SATO MASAYUKI , TAKAHASHI MICHIRO , SUGIMOTO KOICHI , KOIZUMI KIYOHIDE
IPC分类号： B25J9/06

58. 发明专利

JPS6179762A Vapor deposition device 失效
标题翻译：蒸气沉积装置
公开(公告)号：JPS6179762A
公开(公告)日：1986-04-23
申请号：JP19956684
申请日：1984-09-26
申请人： Hitachi Ltd
发明人： SATO MASAYUKI
IPC分类号： C23C14/24 , C23C14/56 , C23F4/00 , H01L21/203 , H01L21/285 , H01L21/302
CPC分类号： C23C14/56
摘要： PURPOSE:To improve the adhesive strength of a metallic film deposited by evaporation on wafers to be treated after sputter etching and to decrease through-hole resistance by constituting a vapor deposition device of three chambers; an etching chamber, evaporating source chamber and vapor deposition chamber. CONSTITUTION:The plural Si wafers are attached to a substrate holder 24 and are first put into the etching chamber 21. The inside of the chamber 21 is evacuated and gaseous Ar is introduced through an inlet 37 into the chamber; thereafter, a high- frequency voltage is impressed between a counter electrode 33 and the holder 24 by an electric power source 31 and the surface of the wafers 25 are etched by Ar ions. The gas contg. the generated SiO2 particles is discharged through a discharge port 38 and thereafter the holder 24 is introduced into the vapor deposition chamber 26 by opening a gate valve 39. The metallic vapor from the evaporating source 22 in the lower evaporating source chamber 23 is then deposited by evaporation on the wafer surfaces by opening the gate valve 56 in the lower part of the chamber 26. Impurities such as SiO2 do not stick on the vapor deposited surfaces of the wafers and therefore the film deposited by evaporation is deposited with the high adhesive strength by evaporation on the wafer surfaces.
摘要翻译：目的：提高溅镀后待处理晶片上蒸发沉积金属膜的粘合强度，并通过构成三室蒸镀装置降低通孔阻力; 蚀刻室，蒸发源室和气相沉积室。构成：将多个Si晶片连接到基板保持器24，并首先放入蚀刻室21.腔室21的内部被抽真空，气态Ar通过入口37引入到腔室中; 此后，通过电源31在对置电极33和保持器24之间施加高频电压，并且通过Ar离子蚀刻晶片25的表面。气体生成的SiO 2颗粒通过排出口38排出，然后通过打开闸阀39将保持器24引入蒸镀室26.然后，将来自下部蒸发源室23的来自蒸发源22的金属蒸气沉积在通过打开室26的下部的闸阀56来打开晶片表面上的蒸发。诸如SiO 2的杂质不粘附在晶片的气相沉积表面上，因此通过蒸发沉积的膜以高的粘合强度沉积晶圆表面蒸发。

59. 发明专利

JPS6178140A Semiconductor device and manufacture thereof 失效
标题翻译：半导体器件及其制造
公开(公告)号：JPS6178140A
公开(公告)日：1986-04-21
申请号：JP19956584
申请日：1984-09-26
申请人： Hitachi Ltd
发明人： SATO MASAYUKI
IPC分类号： H01L21/60 , H01L21/321 , H01L21/92
CPC分类号： H01L2224/11 , H01L2224/13099 , H01L2924/01013 , H01L2924/01033 , H01L2924/01073 , H01L2924/014 , H01L2924/00012
摘要： PURPOSE:To enable to electrically and favorably connect the base metal film of the bump electrode with the wirings for connection even though the bump electrode is microscopically formed by a method wherein the wirings for connection, which are electrically connected with the base metal film, are formed at a position in the same height as that up to the surface of the wiring substrate or the surface of the insulating film for semiconductor chip protection. CONSTITUTION:First wiring films 4, first interlayer insulating films 5 and second wiring films 6 are formed on a wiring substrate 1 and second interlayer insulating films 7 are formed on the second wiring films 6. Moreover, wiring films 8 for connection and a third aluminum wiring film are formed on the second interlayer insulating films 7 and metal films 10 for isolation are formed on the wiring films 8 and the third aluminum wiring film 9. Then, masks 13 are formed using a photolithography technique, an etching is performed on the metal films 10 for isolation, and furthermore, an etching is performed on the aluminum film for third-layer wiring to form the wirings 8 for connection and the third wiring 9. After that, the masks 13 are removed using a release agent, an insulating film 11 for semiconductor chip protection is coated, the shoulder parts of the wirings 8 for connection are made to expose by performing a soft etching and an etching is performed on tantalum films 14 and 15. Lastly, a solder bump base metal film 12 and a bump electrode 2 are formed. As the diameter of the bump electrode 2 can be made smaller without forming any hole in the insulating film 11 for protection, a higher integration can be contrived.
摘要翻译：目的：为了使凸起电极的贱金属膜与用于连接的布线电连接，即使通过其中与基底金属膜电连接的用于连接的布线的显微镜形成凸起电极，形成在与布线基板的表面相同高度的位置或用于半导体芯片保护的绝缘膜的表面上。构成：第一布线膜4，第一层间绝缘膜5和第二布线膜6形成在布线基板1上，第二层间绝缘膜7形成在第二布线膜6上。此外，用于连接的布线膜8和第三铝布线膜形成在第二层间绝缘膜7上，并且在布线膜8和第三铝布线膜9上形成用于隔离的金属膜10.然后，使用光刻技术形成掩模13，对金属进行蚀刻隔膜用薄膜10，另外，对第三层布线的铝膜进行蚀刻，形成连接用布线8和第三布线9.之后，使用脱模剂除去掩模13，将绝缘膜如图11所示，半导体芯片保护被涂覆，用于连接的布线8的肩部通过进行软蚀刻而进行曝光，并对钽膜14和15进行蚀刻。形成焊料凸块基底金属膜12和突起电极2。由于凸起电极2的直径可以在保护用绝缘膜11中没有形成任何孔的情况下变小，因此可以提高更高的一体化。

60. 发明专利

JPS51102786A 失效
公开(公告)号：JPS51102786A
公开(公告)日：1976-09-10
申请号：JP2738575
申请日：1975-03-06
申请人： HITACHI LTD
发明人： SHIOHATA HIRONORI , FUJISAWA FUMIO , SATO MASAYUKI
IPC分类号： F16F15/12 , F16F15/129 , F16F15/139 , F16F15/16

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