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51. 发明授权

US5835529A Digital communication apparatus 失效
公开(公告)号：US5835529A
公开(公告)日：1998-11-10
申请号：US763338
申请日：1996-12-11
申请人： Shoichi Koga , Yuji Igata , Satoshi Hasako , Masahiro Maki , Michinori Kishimoto
发明人： Shoichi Koga , Yuji Igata , Satoshi Hasako , Masahiro Maki , Michinori Kishimoto
IPC分类号： H04B1/713 , H04J4/00 , H04L1/00 , H04L1/20 , H04L27/00 , H04L27/10 , H04L27/26 , H04W56/00 , H04W72/04 , H04W72/08 , H04W76/02 , H04B15/00
CPC分类号： H04L1/0068 , H04B1/713 , H04L1/0041 , H04L1/0054 , H04L1/0071 , H04L1/20 , H04L27/0012 , H04L27/103 , H04L27/2608 , H04L5/0046 , H04L5/006 , H04B2001/71563
摘要： A highly reliable and high-speed data transmission is made by using an FH or MFSK mode as suitably selected according to the usage of channels. When a reception signal is entered into a receiver through a transmission line, (i) a signal processing unit supplies the spectrum intensity values of carrier frequencies, (ii) a channel detection unit controls the phase of a time slot based on the spectrum intensity values, selects the MFSK or FH modulation mode, and supplies reception code data corresponding to detected carrier frequencies, and (iii) a decoder supplies reception information data based on the reception code data. When transmission information data are entered into a transmitter, (i) a coding unit supplies, according to the selected modulation mode, transmission code data based on the transmission information data, (ii) a channel generation unit supplies, based on the transmission code data, carrier frequencies to be used and (iii) a waveform generation unit supplies a transmission signal to a transmission line.

52. 发明授权

US09147496B2 Display device 有权
标题翻译：显示设备
公开(公告)号：US09147496B2
公开(公告)日：2015-09-29
申请号：US13486236
申请日：2012-06-01
申请人： Hiroyuki Abe , Masahiro Maki , Hiroaki Komatsu
发明人： Hiroyuki Abe , Masahiro Maki , Hiroaki Komatsu
IPC分类号： G09G3/36 , G11C19/28 , G09G3/20
CPC分类号： G09G3/3677 , G09G3/20 , G09G3/2018 , G09G3/3674 , G09G2310/0281 , G09G2310/0283 , G09G2310/0286 , G09G2310/08 , G09G2330/021 , G11C19/28
摘要： A driving circuit of a display device includes first to third output signal lines which are continuously arranged, a first transistor that has a source connected to the second output signal line and a drain connected to a first clock signal line, and a second transistor that provides a non-active potential to a gate of the first transistor when a second clock signal becomes the active potential, wherein a circuit that outputs the active potential to the first output signal line and the third output signal line is disposed at an opposite side to a circuit that outputs the active potential to the second output signal line with a display region interposed therebetween, and wherein the gate of the first transistor is connected to the first output signal line and the third output signal line via rectifying circuits.
摘要翻译：显示装置的驱动电路包括连续布置的第一至第三输出信号线，具有连接到第二输出信号线的源极和连接到第一时钟信号线的漏极的第一晶体管和提供当第二时钟信号变为有效电位时，对第一晶体管的栅极的非有效电位，其中向第一输出信号线和第三输出信号线输出有效电位的电路设置在与第电路，其具有介于其间的显示区域向第二输出信号线输出有效电位，并且其中第一晶体管的栅极经由整流电路连接到第一输出信号线和第三输出信号线。

53. 发明授权

US08558779B2 Display device 有权
标题翻译：显示设备
公开(公告)号：US08558779B2
公开(公告)日：2013-10-15
申请号：US13556283
申请日：2012-07-24
申请人： Hideo Sato , Shigeyuki Nishitani , Takayuki Nakao , Masahiro Maki
发明人： Hideo Sato , Shigeyuki Nishitani , Takayuki Nakao , Masahiro Maki
IPC分类号： G09G3/36 , G11C19/00
CPC分类号： G09G3/3688 , G09G3/3677 , G09G2310/0289
摘要： A display device comprises a driver circuit having a shift register circuit having a level conversion function is provided with a simple circuit configuration of first, second, and third basic circuits connected in tandem at multistages. A common clear signal is supplied to a control electrode of a third transistor of each basic circuit, a first clock is supplied to a control electrode of a first transistor of each of the first and third basic circuits, a second clock different in phase from the first clock is supplied to a control electrode of a first transistor of the second basic circuit, outputs of the first and second basic circuit are respectively supplied to control electrodes of second transistors of the second and third basic circuits, and an inversion output of the third basic circuit is supplied to a control electrode of a fourth transistor of the first basic circuit.
摘要翻译：显示装置包括具有电平转换功能的移位寄存器电路的驱动电路具有以多级串联连接的第一，第二和第三基本电路的简单电路配置。向每个基本电路的第三晶体管的控制电极提供公共的清除信号，第一时钟被提供给第一和第三基本电路中的每一个的第一晶体管的控制电极，与第第一时钟被提供给第二基本电路的第一晶体管的控制电极，第一和第二基本电路的输出分别提供给第二和第三基本电路的第二晶体管的控制电极，第三基极的第二晶体管的反相输出基本电路被提供给第一基本电路的第四晶体管的控制电极。

54. 发明授权

US08508513B2 Display device 有权
标题翻译：显示设备
公开(公告)号：US08508513B2
公开(公告)日：2013-08-13
申请号：US12398326
申请日：2009-03-05
申请人： Takumi Shigaki , Toshio Miyazawa , Hideo Sato , Masahiro Maki
发明人： Takumi Shigaki , Toshio Miyazawa , Hideo Sato , Masahiro Maki
IPC分类号： G09G5/00
CPC分类号： G09G3/3648 , G09G3/3614 , G09G3/3655 , G09G3/3677 , G09G2310/0286 , G09G2310/06 , G11C19/28 , G11C19/287
摘要： A display device which enhances time-wise likelihood for a leak current from a floating memory node by increasing the number of writings of a voltage to a floating memory node. A vertical driver includes: a shift register including basic circuits which output common electrode driving pulses based on a transfer; and a common electrode driver including common basic circuits which receive the common electrode driving pulses and the transfer clock. Each common basic circuit includes: a circuit A which fetches an AC signal based on the common electrode driving pulse; a circuit B which outputs, based on the AC signal, a first common voltage or a second common voltage which differs from the first common voltage in voltage level to the common electrodes corresponding to the AC signal; and a circuit C which holds a state of the circuit B based on the transfer clock.
摘要翻译：一种显示装置，其通过将电压写入数量增加到浮动存储器节点来增强来自浮动存储器节点的泄漏电流的时间似然。垂直驱动器包括：移位寄存器，包括基于转移输出公共电极驱动脉冲的基本电路; 以及公共电极驱动器，其包括接收公共电极驱动脉冲和传送时钟的公共基本电路。每个公共基本电路包括：基于公共电极驱动脉冲取出AC信号的电路A; 电路B，其基于所述AC信号，将与所述AC信号对应的公共电极的电压电平的第一公共电压不同的第一公共电压或第二公共电压输出; 以及基于传送时钟保持电路B的状态的电路C.

55. 发明申请

US20120306844A1 DISPLAY DEVICE 有权
标题翻译：显示设备
公开(公告)号：US20120306844A1
公开(公告)日：2012-12-06
申请号：US13486236
申请日：2012-06-01
申请人： Hiroyuki ABE , Masahiro Maki , Hiroaki Komatsu
发明人： Hiroyuki ABE , Masahiro Maki , Hiroaki Komatsu
IPC分类号： G06F3/038
CPC分类号： G09G3/3677 , G09G3/20 , G09G3/2018 , G09G3/3674 , G09G2310/0281 , G09G2310/0283 , G09G2310/0286 , G09G2310/08 , G09G2330/021 , G11C19/28
摘要： A driving circuit of a display device includes first to third output signal lines which are continuously arranged, a first transistor that has a source connected to the second output signal line and a drain connected to a first clock signal line, and a second transistor that provides a non-active potential to a gate of the first transistor when a second clock signal becomes the active potential, wherein a circuit that outputs the active potential to the first output signal line and the third output signal line is disposed at an opposite side to a circuit that outputs the active potential to the second output signal line with a display region interposed therebetween, and wherein the gate of the first transistor is connected to the first output signal line and the third output signal line via rectifying circuits.
摘要翻译：显示装置的驱动电路包括连续布置的第一至第三输出信号线，具有连接到第二输出信号线的源极和连接到第一时钟信号线的漏极的第一晶体管和提供当第二时钟信号变为有效电位时，对第一晶体管的栅极的非有效电位，其中向第一输出信号线和第三输出信号线输出有效电位的电路设置在与第电路，其具有介于其间的显示区域向第二输出信号线输出有效电位，并且其中第一晶体管的栅极经由整流电路连接到第一输出信号线和第三输出信号线。

56. 发明授权

US08259055B2 Display device 有权
标题翻译：显示设备
公开(公告)号：US08259055B2
公开(公告)日：2012-09-04
申请号：US11703161
申请日：2007-02-07
申请人： Hideo Sato , Shigeyuki Nishitani , Takayuki Nakao , Masahiro Maki
发明人： Hideo Sato , Shigeyuki Nishitani , Takayuki Nakao , Masahiro Maki
IPC分类号： G09G3/36 , G11C19/00
CPC分类号： G09G3/3688 , G09G3/3677 , G09G2310/0289
摘要： A display device comprises a driver circuit having a shift register circuit having a level conversion function is provided with a simple circuit configuration of first, second, and third basic circuits connected in tandem at multistages. A common clear signal is supplied to a control electrode or a third transistor of each basic circuit, a first clock is supplied to a control electrode of a first transistor of each of the first and third basic circuits, a second cock different in phase from the first clock is supplied to a control electrode of a first transistor of the second basic circuit, outputs of the first and second basic circuit are respectively supplied to control electrodes of second transistors of the second and third basic circuits, and an inversion output of the third basic circuit is supplied to a control electrode of a fourth transistor of the first basic circuit.
摘要翻译：显示装置包括具有电平转换功能的移位寄存器电路的驱动电路具有以多级串联连接的第一，第二和第三基本电路的简单电路配置。向每个基本电路的控制电极或第三晶体管提供公共的清除信号，第一时钟被提供给第一和第三基本电路中的每一个的第一晶体管的控制电极，第一时钟被提供给第二基本电路的第一晶体管的控制电极，第一和第二基本电路的输出分别提供给第二和第三基本电路的第二晶体管的控制电极，第三基极的第二晶体管的反相输出基本电路被提供给第一基本电路的第四晶体管的控制电极。

57. 发明申请

US20120188220A1 GATE SIGNAL LINE DRIVE CIRCUIT AND DISPLAY DEVICE 有权
标题翻译：门控信号线驱动电路和显示设备
公开(公告)号：US20120188220A1
公开(公告)日：2012-07-26
申请号：US13356700
申请日：2012-01-24
申请人： Hiroyuki ABE , Masahiro Maki , Hideo Sato , Hiroaki Komatsu
发明人： Hiroyuki ABE , Masahiro Maki , Hideo Sato , Hiroaki Komatsu
IPC分类号： G09G5/00
CPC分类号： G09G3/3677 , G09G3/006 , G09G3/3611 , G09G3/3688 , G09G2310/0248 , G09G2310/0251 , G09G2310/0281 , G09G2310/0283 , G09G2310/0286 , G09G2310/0289 , G09G2310/0297 , G09G2310/08
摘要： A gate signal line driving circuit includes plural basic circuits, each outputting to a gate signal line a gate signal which is high during a high signal period and low during a low signal period. Each of the basic circuits includes: agate line high voltage application circuit which is turned on in accordance with the high signal period to apply the high voltage to the gate signal line; a gate line low voltage application circuit which is turned on in accordance with the low signal period to apply the low voltage to the gate signal line; and a second gate line low voltage application circuit which is turned on to apply the low voltage to the gate signal line in at least a part of a period between turning off the gate line high voltage application circuit and turning on the gate line low voltage application circuit.
摘要翻译：栅极信号线驱动电路包括多个基本电路，每个基本电路向门信号线输出在高信号周期期间为高电平的栅极信号，并在低信号周期期间输出低电平。每个基本电路包括：玛瑙线高压施加电路，根据高信号周期接通，将高电压施加到栅极信号线; 栅极线路低电压施加电路，其根据低信号周期接通，以将低电压施加到栅极信号线; 以及第二栅极线低电压施加电路，其在关闭栅极线高压应用电路和接通栅极线路的低电压应用之间的至少一部分周期中接通以将低电压施加到栅极信号线电路。

58. 发明申请

US20120086477A1 GATE SIGNAL LINE DRIVE CIRCUIT AND DISPLAY DEVICE 有权
标题翻译：门控信号线驱动电路和显示设备
公开(公告)号：US20120086477A1
公开(公告)日：2012-04-12
申请号：US13253202
申请日：2011-10-05
申请人： Hideo SATO , Masahiro Maki , Hiroyuki Abe
发明人： Hideo SATO , Masahiro Maki , Hiroyuki Abe
IPC分类号： H03K3/00
CPC分类号： G09G3/3677 , G09G3/00
摘要： Provided is a gate signal line driving circuit including: 2n clock signal lines where 2n-phase clock signals are input in the normal order of the sequence in normal-directional scanning and in the inverse order of the sequence in inverse-directional scanning, respectively; and a plurality of basic circuits, each being connected with the 2n clock signal lines and outputting a gate signal from an output terminal, in which each of the basic circuits includes a high-voltage applying switching circuit where one clock signal line is connected to an input side and applies a voltage applied to the clock signal line to the output terminal and an off-signal applying switching circuit that applies an off-voltage to a switch of the high-voltage applying switching circuit, and a clock signal line where a clock signal having an inverse phase is connected to a switch of the off-signal applying switching circuit.
摘要翻译：提供了一种栅极信号线驱动电路，包括：2n频相位信号线，其中2n相位时钟信号分别以正向扫描中的顺序的正常顺序和逆序扫描中的顺序的逆顺序输入; 以及多个基本电路，每个基本电路均与2n个时钟信号线连接，并从输出端输出一个门信号，其中每个基本电路包括一个高电压施加开关电路，其中一个时钟信号线连接到施加到时钟信号线的电压到输出端子，以及向高电压施加开关电路的开关施加截止电压的截止信号施加开关电路，以及时钟信号线，其中时钟具有反相的信号连接到断开信号施加开关电路的开关。

59. 发明申请

US20110242471A1 Liquid crystal display device 审中-公开
标题翻译：液晶显示装置
公开(公告)号：US20110242471A1
公开(公告)日：2011-10-06
申请号：US13067599
申请日：2011-06-13
申请人： Takahiro Ochiai , Takayuki Nakao , Toshio Miyazawa , Masahiro Maki , Tohru Sasaki
发明人： Takahiro Ochiai , Takayuki Nakao , Toshio Miyazawa , Masahiro Maki , Tohru Sasaki
IPC分类号： G02F1/1343
CPC分类号： G02F1/134363 , G02F1/133555 , G02F1/136227 , G02F1/136286 , G02F2201/40 , H01L27/12
摘要： A liquid crystal display device having a liquid crystal display panel includes a first substrate, a second substrate, and liquid crystal interposed between the first and second substrates. The first substrate includes an active element, a first insulating film formed on the active element, a plurality of first electrodes disposed on the first insulating film, a second insulating film disposed on the first electrodes, and a pixel electrode disposed on the second insulating film. The pixel electrode is electrically coupled to the active element via a portion defining a contact hole formed in a portion defining a clearance between the plurality of first electrodes.
摘要翻译：具有液晶显示面板的液晶显示装置包括第一基板，第二基板以及置于第一和第二基板之间的液晶。第一基板包括有源元件，形成在有源元件上的第一绝缘膜，设置在第一绝缘膜上的多个第一电极，设置在第一电极上的第二绝缘膜，以及设置在第二绝缘膜上的像素电极。像素电极经由形成在限定多个第一电极之间的间隙的部分中的接触孔的部分电耦合到有源元件。

60. 发明授权

US07834964B2 Transflective liquid crystal display device 有权
标题翻译：透反式液晶显示装置
公开(公告)号：US07834964B2
公开(公告)日：2010-11-16
申请号：US11819907
申请日：2007-06-29
申请人： Takahiro Ochiai , Toshio Miyazawa , Masahiro Maki , Tohru Sasaki , Masateru Morimoto
发明人： Takahiro Ochiai , Toshio Miyazawa , Masahiro Maki , Tohru Sasaki , Masateru Morimoto
IPC分类号： G02F1/1335
CPC分类号： G02F1/133555 , G02F1/1337 , G02F1/134363 , G02F2001/134345
摘要： A transflective liquid crystal display device with improved display quality in which the liquid initial alignment direction of the liquid crystal layer is in a direction perpendicular to the extending direction of a clearance between the counter electrode of a transmission portion and a counter electrode of a reflection portion or in a direction within a range of ±2° in the clockwise direction perpendicular to the extending direction of the clearance in a case where the liquid crystal layer comprises positive type liquid crystals, or the liquid crystal initial alignment direction of the liquid crystal layer is in a direction parallel with the extending direction of a clearance, or a direction within a range of ±2° in the clockwise direction relative to the extending direction of the clearance in a case where the liquid crystal layer comprises negative type liquid crystals.
摘要翻译：一种透射型液晶显示装置，其具有改善的显示质量，其中液晶层的液体初始取向方向在与透射部分的对电极和反射部分的对电极之间的间隙的延伸方向垂直的方向上或者在液晶层包含正型液晶的情况下，在垂直于间隙的延伸方向的顺时针方向上在±2°的范围内的方向，或者液晶层的液晶初始取向方向为在液晶层包含负型液晶的情况下，在与间隙的延伸方向平行的方向上，或相对于间隙的延伸方向在顺时针方向±2°的范围内的方向。

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