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    • 53. 发明申请
    • Recording material and recording sheet
    • 记录材料和记录纸
    • US20050148468A1
    • 2005-07-07
    • US10999630
    • 2004-11-30
    • Tadashi KawakamiShinichi SatoHiroshi Fujii
    • Tadashi KawakamiShinichi SatoHiroshi Fujii
    • B41M5/155B41M5/30B41M5/333B41M5/337B41M5/20B41M5/24
    • B41M5/3336B41M5/155B41M5/3333B41M5/3375B41M2205/04
    • The present invention provides a composition and a recording material made from the composition having an excellent dynamic sensitivity in recording as well as an excellent image stability and, particularly, having excellent resistance for heat and humidity, heat, light, plasticizer and water. The composition and the recording material include the following compounds (1), (2), and (3): wherein R1, R2, R6, R7, R11, and R12 each represents hydrogen or an alkyl group; a1 to a3 each represents an integer of 1-6; n1 to n3 each represents 0, 1 or 2; m1, m4 and m7 each represents 0, 1, 2 or 3; R3, R4, R8, R9, R13 and R14 each represents an alkyl group; m2, m3, m5, m6, m8 and m9 each represents 0, 1 or 2; and Y1 to Y3 each represents CO or NRCO (R represents hydrogen, etc.).
    • 本发明提供一种由该组合物制成的组合物和记录材料,其具有良好的记录动态灵敏度和良好的图像稳定性,特别是具有优异的耐热,耐湿,耐光,增塑剂和水的耐性。 组合物和记录材料包括以下化合物(1),(2)和(3):其中R 1,R 2,R 6, R 11,R 11,R 12和R 12各自表示氢或烷基; 每个 1 1 各自表示1-6的整数; n <1> 1〜n 3各自表示0,1或2; m 1,m 4和m 7各自表示0,1,2或3; R 3,R 4,R 8,R 9,R 13和R 9, R 14各自表示烷基; m 2,m 3,m 5,m 6,m 8,和8, 每个表示0,1或2; 和Y 1〜Y 3各自表示CO或NRCO(R表示氢等)。
    • 56. 发明授权
    • Input interface circuit for semiconductor integrated circuit device
    • US06653884B2
    • 2003-11-25
    • US09915390
    • 2001-07-27
    • Hiroshi FujiiHideaki Ishihara
    • Hiroshi FujiiHideaki Ishihara
    • H03K508
    • H03K19/00315H01L2924/0002H01L2924/00
    • An input interface circuit for a semiconductor integrated circuit device is provided which includes a pair of diodes, first, second, and third PMOSFETs, and first, second, and third NMOSFETs. The diodes serve to clamp a high positive or negative voltage input at a level that is the sum of the power supply voltage and the forward voltage of the diodes or the difference between the ground potential and the forward voltage. The first and second PMOSFETs are connected in series between the power supply and an inside input terminal coupled to an internal circuit element of the semiconductor integrated circuit device. The first and second NMOSFETs are connected in series between ground and the inside input terminal. The third PMOSFET is connected in series between the outside input terminal and a gate of the first PMOSFET. The third NMOSFET is connected in series between the outside input terminal and a gate of the second NMOSFET. The voltage which is intermediate between ground potential and the voltage of the power supply is applied to a gate of each of the first NMOSFET, the second PMOSFET, the third PMOSFET, and the third NMOSFT. This structure serves to protect the circuit elements against an input of an undesirable higher positive or negative voltage to the input interface circuit.
    • 57. 发明授权
    • Tape cassette and cassette holder
    • US06612513B2
    • 2003-09-02
    • US09880133
    • 2001-06-14
    • Shuichi OtaHiroshi Fujii
    • Shuichi OtaHiroshi Fujii
    • G11B2304
    • G11B15/67584G11B23/08785
    • Disclosed is a tape cassette which is loaded in a tape drive apparatus by a manner of inserting the tape cassette in a cassette holder and then moving the cassette holder relative to a main chassis of the tape drive apparatus. The tape cassette includes a mouth portion provided in a front portion of a cassette shell in such a manner as to be opened forward, upward, and downward. Part of a magnetic tape (tape-like recording medium) is positioned to cross the front end of the mouth portion. The tape cassette also includes a front lid for covering the front side of the magnetic tape. The front lid is opened when the tape cassette is inserted in the cassette holder. This tape cassette is characterized by including two side butting portions and two upper butting portions which are brought into contact with two side receiving portions and two upper receiving portions of the cassette holder when the tape cassette is inserted in the cassette holder. With this configuration, it is possible to ensure the positioning of the tape cassette to the cassette holder with an improved accuracy, and to loosen the dimensional accuracy of each of the tape cassette and cassette holder.
    • 58. 发明授权
    • Method for calculating inertia moment and driver for electric motor
    • 计算电机惯性矩和驱动器的方法
    • US06611125B2
    • 2003-08-26
    • US09791680
    • 2001-02-26
    • Koichiro NagataToshiaki OkuyamaHiroshi FujiiShigetoshi Okamatsu
    • Koichiro NagataToshiaki OkuyamaHiroshi FujiiShigetoshi Okamatsu
    • H02P528
    • H02P21/06
    • An electric motor is rotated at a velocity &ohgr;1. After that, during &Dgr;t12 seconds, the 1st acceleration is executed at a rate (&ohgr;2−&ohgr;1)/&Dgr;t12. During this acceleration, the torque &tgr;m is calculated so as to execute the time integration. After the lapse of &Dgr;t12, the integrated result is stored. Next, the velocity is set to be &ohgr;3. After that, during &Dgr;t34 seconds, the 2nd acceleration is executed at a rate (&ohgr;4−&ohgr;3)/&Dgr;t34. At the 2nd acceleration, although the integration-starting and the integration-terminating velocities are each equal to those at the 1st acceleration, the acceleration rate is modified (&ohgr;3=&ohgr;1, &ohgr;4=&ohgr;2, &Dgr;t12≠&Dgr;t34). During this acceleration, the torque &tgr;m is calculated so as to execute the time integration, after the lapse of &Dgr;t34, storing the integrated result. The inertia J is calculated using the 1st and 2nd integrated results.
    • 电动机以速度ω1旋转。 之后,在DELTA12秒期间,第一加速度以速率(ω2-ω1)/ DELTAt12执行。 在该加速期间,计算转矩taum以便执行时间积分。 经过DELTAt12后,存储了积分结果。 接下来,将速度设为ω3。 之后,在DELTA34秒期间,以速率(ω4-ω3)/ DELTAt34执行第二加速度。 在第二加速度下,虽然积分开始和积分终止速度均等于第一加速度时的加速度,但是加速度被修改(ω=ω,ω,ω=ω,DELTAt12,ΔTATA34)。 在该加速期间,计算转矩taum,以便在DELTAt34经过DELTAt34之后执行时间积分,从而存储积分结果。 使用第1和第2综合结果计算惯性J。