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    • 51. 发明专利
    • BUS CONTROL DEVICE
    • JPS63128461A
    • 1988-06-01
    • JP27407986
    • 1986-11-19
    • HITACHI LTDHITACHI PROCESS COMPUTER ENG
    • SASAKI WATARUYAMAOKA HIROMASAAMAHI YASUHIROSAITOU SUMIHISAYOKOTA TAKAHIRO
    • G06F13/36G06F9/52G06F15/16G06F15/177
    • PURPOSE:To improve the throughput of a bus control device by providing a bus occupation time monitor circuit to each bus master to discriminate a case where an access is given to a bus slave within its own processor from a case where an access is given to the bus slave within another processor via a bus extending device. CONSTITUTION:The relation Tb>Ta+Tc is satisfied where Ta shows the bus occupation monitor time set when accesses are given to bus slaves set on the same bus together with Tb showing the bus occupation monitor time set in case accesses are given to bus slaves set on other buses, and Tc showing the maximum time needed for delivery of a bus using request through acquisition of the bus using right respectively. Then the bus occupation monitor time is equal to Tb when a bus master 13 occupies a bus 11 to give an access to a bus slave 24. If a bus master 23 gives an access to an unpackaged area under such conditions, the time during which the master 23 occupies a bus 21 is equal to Ta. Thus the master 23 releases the bus 21 earlier than a fact that the master 13 releases the bus 11 since Tb>Ta is satisfied. As a result, the master 13 also acquires the using right of the bus 21 and can give an access to the slave 24.