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51. 发明申请

US20170076422A1 METHODS AND APPARATUS TO SUPPORT DYNAMIC ADJUSTMENT OF GRAPHICS PROCESSING UNIT FREQUENCY 审中-公开
标题翻译：支持图形处理单元频率的动态调整的方法和装置
公开(公告)号：US20170076422A1
公开(公告)日：2017-03-16
申请号：US15122108
申请日：2014-03-27
申请人： Lei Shen , Guei-Yuan Lueh , Yong Jiang , lntel Corporation
发明人： Lei Shen , Guei-Yuan Lueh , Yong Jiang
IPC分类号： G06T1/60 , G06F9/50 , G06T1/20 , G06F1/32
CPC分类号： G06T1/60 , G06F1/324 , G06F1/3243 , G06F1/3296 , G06F8/451 , G06F9/505 , G06T1/20 , Y02D10/126 , Y02D10/152
摘要： Disclosed methods support dynamic adjustment of graphics processing unit (GPU) frequency. According to one embodiment, a program comprises workload to execute, at least in part, on a GPU of a data processing system. A predetermined memory/compute ratio for the program is automatically retrieved, in response to the program being called for execution. The memory/compute ratio represents a ratio of memory accesses within the program, relative to compute operations within the program. In addition, a frequency of the GPU is automatically adjusted, based on the predetermined memory/compute ratio for the program. For instance, the GPU may be set to a relatively low frequency if the predetermined memory/compute ratio is relatively high, or to a relatively high frequency if the predetermined ratio is relatively low. After the frequency of the GPU is automatically adjusted, the program may execute, at least in part, on the GPU. Other embodiments are described and claimed.
摘要翻译：公开的方法支持图形处理单元（GPU）频率的动态调整。根据一个实施例，程序包括至少部分地在数据处理系统的GPU上执行的工作负载。响应于要执行的程序，自动检索程序的预定存储器/计算比。存储器/计算比率表示程序内存储器访问的比率，相对于程序内的计算操作。此外，基于程序的预定存储器/计算比率，自动调整GPU的频率。例如，如果预定的存储器/计算比率相对较高，则GPU可以被设置为相对低的频率，或者如果预定比率相对较低，则可以将其设置为相对较低的频率。在GPU的频率被自动调整之后，该程序可以至少部分地在GPU上执行。描述和要求保护其他实施例。

52. 发明授权

US06966057B2 Static compilation of instrumentation code for debugging support 失效
标题翻译：用于调试支持的仪表代码的静态编译
公开(公告)号：US06966057B2
公开(公告)日：2005-11-15
申请号：US09823105
申请日：2001-03-30
申请人： Guei-Yuan Lueh
发明人： Guei-Yuan Lueh
IPC分类号： A01D13/00 , G06F9/45 , G06F11/36
CPC分类号： G06F11/3624 , G06F8/41 , G06F9/45516 , G06F11/3644
摘要： The present invention is a method and system to support debug. A function is compiled. The function includes a byte code sequence having a field byte code that accesses or modifies a field. The compiled function provides a native code and occupies a code space. An instrumentation code corresponding to a field match of a field is generated. The instrumentation code is inserted to the native code.
摘要翻译：本发明是一种支持调试的方法和系统。编译一个函数该功能包括具有访问或修改字段的字段字节码的字节码序列。编译的函数提供一个本机代码并占用一个代码空间。生成对应于字段的字段匹配的检测码。仪器代码被插入本机代码。

53. 发明申请

US20050216900A1 Instruction scheduling 审中-公开
标题翻译：指令调度
公开(公告)号：US20050216900A1
公开(公告)日：2005-09-29
申请号：US10812373
申请日：2004-03-29
申请人： Xiaohua Shi , Bu Cheng , Guei-Yuan Lueh
发明人： Xiaohua Shi , Bu Cheng , Guei-Yuan Lueh
IPC分类号： G06F9/45
CPC分类号： G06F8/445 , G06F9/45516
摘要： A technique includes providing a virtual machine for instruction scheduling by extending a register scoreboard. A system assigns a number of stall cycles between a first and a second instruction and schedules the first and second instructions for execution based on the assigned stall cycles.
摘要翻译：一种技术包括通过扩展注册记分板来提供用于指令调度的虚拟机。系统在第一和第二指令之间分配多个停顿周期，并根据所分配的失速周期调度第一和第二指令以供执行。

54. 发明授权

US06658657B1 Method and apparatus for reducing the overhead of virtual method invocations 失效
标题翻译：减少虚拟方法调用开销的方法和装置
公开(公告)号：US06658657B1
公开(公告)日：2003-12-02
申请号：US09539373
申请日：2000-03-31
申请人： Guei-Yuan Lueh
发明人： Guei-Yuan Lueh
IPC分类号： G06F945
CPC分类号： G06F8/41 , G06F9/449
摘要： A method including compiling a method bar having a virtual method call. The virtual method call is eliminated. The method bar is inlined without generating checking code, and dynamically loading a class.
摘要翻译：一种方法，包括编译具有虚拟方法调用的方法栏。虚拟方法调用被消除。方法栏内联而不生成检查代码，并动态加载类。

55. 发明申请

US20170178384A1 Increasing Thread Payload for 3D Pipeline with Wider SIMD Execution Width 审中-公开
公开(公告)号：US20170178384A1
公开(公告)日：2017-06-22
申请号：US14976122
申请日：2015-12-21
申请人： Jayashree Venkatesh , Gang Chen , Thomas F. Raoux , Guei-Yuan Lueh , Subramaniam Maiyuran
发明人： Jayashree Venkatesh , Gang Chen , Thomas F. Raoux , Guei-Yuan Lueh , Subramaniam Maiyuran
IPC分类号： G06T15/00 , G06T15/80 , G06T17/10
摘要： Reducing SIMD fragmentation for SIMD execution widths of 32 or even 64 channels in a single hardware thread leads to better EU utilization. Increasing SIMD execution widths to 32 or 64 channels per thread, enables handling more vertices, patches, primitives and triangles per EU hardware thread. Modified 3D pipeline shader payloads can handle multiple patches in case of domain shaders or multiple primitives when primitive object instance count is greater than one in the case of geometry shaders and multiple triangles in case of pixel shaders.

56. 发明申请

US20170178274A1 Multiple-Patch SIMD Dispatch Mode for Domain Shaders 审中-公开
公开(公告)号：US20170178274A1
公开(公告)日：2017-06-22
申请号：US14976306
申请日：2015-12-21
申请人： Jayashree Venkatesh , Guei-Yuan Lueh , Subramaniam Maiyuran
发明人： Jayashree Venkatesh , Guei-Yuan Lueh , Subramaniam Maiyuran
IPC分类号： G06T1/20 , G06T17/20
CPC分类号： G06F9/46 , G06F8/41 , G06F9/50 , G06F12/0842 , G06F2209/507 , G06T1/60 , G06T15/005 , G06T17/20
摘要： To use SIMD lanes efficiently for domain shader execution, domain point data from different domain shader patches may be packed together into a single SIMD thread. To generate an efficient code sequence, each domain point occupies one SIMD lane and all attributes for the domain point reside in their own partition of General Register File (GRF) space. This technique is called the multiple-patch SIMD dispatch mode.

57. 发明授权

US09015687B2 Register liveness analysis for SIMD architectures 有权
标题翻译：注册SIMD架构的活动分析
公开(公告)号：US09015687B2
公开(公告)日：2015-04-21
申请号：US13075590
申请日：2011-03-30
申请人： Biju George , Guei-Yuan Lueh
发明人： Biju George , Guei-Yuan Lueh
IPC分类号： G06F9/44 , G06F9/45
CPC分类号： G06F8/441 , G06T1/20
摘要： Systems and methods of allocating physical registers to variables may involve identifying a partial definition of a variable in an inter-procedural control flow graph. A determination can be made as to whether to terminate a live range of the variable based at least in part on the partial definition. Additionally, a physical register may be allocated to the variable based at least in part on the live range.
摘要翻译：将物理寄存器分配给变量的系统和方法可以涉及在程序间控制流程图中识别变量的部分定义。可以至少部分地基于部分定义来确定是否终止变量的生存范围。另外，物理寄存器可以至少部分地基于生存范围分配给变量。

58. 发明授权

US08237726B2 Register allocation for message sends in graphics processing pipelines 有权
标题翻译：在图形处理流水线中注册消息发送的分配
公开(公告)号：US08237726B2
公开(公告)日：2012-08-07
申请号：US12492500
申请日：2009-06-26
申请人： Wei-Yu Chen , Guei-Yuan Lueh
发明人： Wei-Yu Chen , Guei-Yuan Lueh
IPC分类号： G09G5/36 , G06T1/60 , G06F12/02
CPC分类号： G06T1/20
摘要： Message sends may be implemented in a graphics pipeline using biased graph coloring. Registers may be allocated by shaders for message sends using biased graph coloring.
摘要翻译：消息发送可以在使用偏置图形着色的图形管道中实现。寄存器可以由着色器分配，用于使用偏置图形着色的消息发送。

59. 发明申请

US20080162522A1 Methods and apparatuses for compaction and/or decompaction 审中-公开
标题翻译：用于压实和/或解压缩的方法和装置
公开(公告)号：US20080162522A1
公开(公告)日：2008-07-03
申请号：US11648260
申请日：2006-12-29
申请人： Guei-Yuan Lueh , Hong Jiang , Andrew T. Riffel , Bixia Zheng , Chu-Cheow Lim , Milind Girkar , David C. Sehr , Thomas A. Piazza
发明人： Guei-Yuan Lueh , Hong Jiang , Andrew T. Riffel , Bixia Zheng , Chu-Cheow Lim , Milind Girkar , David C. Sehr , Thomas A. Piazza
IPC分类号： G06F17/30
CPC分类号： G06F8/4434 , G06F8/447 , G06F9/30036 , G06F9/30156 , G06F9/30167 , G06F9/30178 , G06F9/3853
摘要： In some embodiments, a data structure may be received in a first processing system. The data structure may represent a plurality of instructions for a second processing system. For at least one instruction of the plurality of instructions, a determination may be made as to whether the instruction can be replaced by a compact instruction for the second processing system. A compact instruction may be generated if the instruction can be replaced by a compact instruction. In some embodiments, an instruction may be received in a processing system. A determination may be made as to whether the instruction is a compact instruction. A decompacted instruction may be generated if the instruction is a compact instruction.
摘要翻译：在一些实施例中，可以在第一处理系统中接收数据结构。数据结构可以表示用于第二处理系统的多个指令。对于多个指令中的至少一个指令，可以确定该指令是否可以由第二处理系统的紧凑指令代替。如果可以用紧凑指令代替指令，则可能会产生紧凑指令。在一些实施例中，可以在处理系统中接收指令。可以确定该指令是否是紧凑指令。如果指令是紧凑指令，则可能会生成解压缩指令。

60. 发明授权

US07367022B2 Methods and apparatus for optimizing the operating speed and size of a computer program 有权
标题翻译：用于优化计算机程序的操作速度和大小的方法和装置
公开(公告)号：US07367022B2
公开(公告)日：2008-04-29
申请号：US10235468
申请日：2002-09-05
申请人： Guei-Yuan Lueh , Ali-Reza Adl-Tabatabai , Tatiana Shpeisman
发明人： Guei-Yuan Lueh , Ali-Reza Adl-Tabatabai , Tatiana Shpeisman
IPC分类号： G06F9/45 , G06F9/44
CPC分类号： G06F11/3419 , G06F11/3466 , G06F2201/81 , G06F2201/88
摘要： Apparatus and methods for optimizing an operating speed and size of a computer program are disclosed. In an example, an apparatus includes an execution module to run a computer program, an exception detector to detect throws to an exception handler and to detect locations from which the throws occur, a memory to store data developed by the exception detector and a code adjuster to at least one of inline and fold the exception handler with respect to at least one of the detected locations.
摘要翻译：公开了用于优化计算机程序的操作速度和大小的装置和方法。在一个示例中，一种装置包括用于运行计算机程序的执行模块，用于检测抛出异常处理程序并检测出现发生的位置的异常检测器，用于存储由异常检测器开发的数据的存储器和代码调整器涉及至少一个检测到的位置的内联和折叠异常处理程序中的至少一个。

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