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51. 发明授权

US06828623B1 Floating gate memory device with homogeneous oxynitride tunneling dielectric 有权
标题翻译：具有均匀氧氮化物隧道电介质的浮栅存储器件
公开(公告)号：US06828623B1
公开(公告)日：2004-12-07
申请号：US10232487
申请日：2002-08-30
申请人： Xin Guo , Nian Yang , Zhigang Wang
发明人： Xin Guo , Nian Yang , Zhigang Wang
IPC分类号： H01L29788
CPC分类号： H01L29/518 , H01L21/28273 , H01L29/7885
摘要： A memory device with homogeneous oxynitride tunneling dielectric. Specifically, the present invention describes a flash memory cell that includes a tunnel oxide dielectric layer including homogeneous oxynitride. The tunnel oxide dielectric layer separates a floating gate from a channel region that is formed between a source region and a drain region in a substrate. The flash memory cell further includes a dielectric layer that separates a control gate from the floating gate. In one case, the homogenous oxynitride is a defect free silicon nitride. The homogeneity of the oxynitride is due to the uniform distribution of nitride within the tunnel oxide dielectric layer. Further, the use of the homogeneous oxynitride can increase the dielectric constant and lower the barrier height of the tunnel oxide dielectric layer for increased performance. Also, the homogenous oxynitride supports source-side channel hot hole erasing in the flash memory cell.
摘要翻译：具有均匀氧氮化物隧道电介质的存储器件。具体地，本发明描述了一种闪存单元，其包括包括均匀氮氧化物的隧道氧化物介电层。隧道氧化物电介质层将浮置栅极与形成在衬底中的源极区域和漏极区域之间的沟道区域分离。闪存单元还包括将控制栅极与浮动栅极分离的介质层。在一种情况下，均匀的氮氧化合物是无缺陷的氮化硅。氧氮化物的均匀性是由于氮化物在隧道氧化物介电层内的均匀分布。此外，为了提高性能，使用均匀的氮氧化物可以增加介电常数并降低隧道氧化物介电层的势垒高度。此外，均匀的氮氧化物支持闪存单元中的源极侧通道热孔擦除。

52. 发明授权

US06822259B1 Method of detecting and distinguishing stack gate edge defects at the source or drain junction 有权
标题翻译：在源极或漏极结处检测和区分堆叠栅极边缘缺陷的方法
公开(公告)号：US06822259B1
公开(公告)日：2004-11-23
申请号：US10126193
申请日：2002-04-19
申请人： Zhigang Wang , Nian Yang , Xin Guo
发明人： Zhigang Wang , Nian Yang , Xin Guo
IPC分类号： H01L2358
CPC分类号： H01L21/28273 , G11C16/04 , G11C29/006 , G11C2029/0403 , G11C2029/5002
摘要： A method and apparatus for testing semiconductors comprising stacked floating gate structures. A floating gate is programmed (710). An electrical stress or disturb voltage is applied to a control gate with a source and a drain in a specific set of conditions (720). Subsequent to the stressing, a drain current versus gate voltage relationship is measured (730). The sequence of programming, stressing and measuring may be repeated (740) with different conditions for source and drain. More particularly, positive and negative biases are applied to a source while a drain is held at ground, and similar biases are applied to a drain while a source is held at ground. Through inspection of the measurement information taken after this sequence of stress applications, a stack gate edge-defect may be identified (750) as associated with a source edge or a drain edge. In this novel manner, stack gate edge defects may be identified and localized via non-destructive means, and corrective actions to the semiconductor manufacturing process and/or the partially manufactured wafer may be taken.
摘要翻译：一种用于测试包括堆叠浮栅结构的半导体的方法和装置。浮动门被编程（710）。电应力或干扰电压在特定条件（720）中用源极和漏极施加到控制栅极。在应力之后，测量漏极电流与栅极电压的关系（730）。编程，应力和测量的顺序可以重复（740），具有不同的源和漏源条件。更具体地，在将源极保持在地面的同时将漏极保持在接地处时，将正和负偏压施加到源极，并且在将源保持在地面的同时将类似的偏压施加到漏极。通过检查在该应力应用序列之后采取的测量信息，可以将源极边缘或漏极边缘的叠栅极边缘缺陷识别（750）。以这种新颖的方式，可以通过非破坏性手段识别和定位堆叠栅极边缘缺陷，并且可以采取对半导体制造工艺和/或部分制造的晶片的校正动作。

53. 发明授权

US06646462B1 Extraction of drain junction overlap with the gate and the channel length for ultra-small CMOS devices with ultra-thin gate oxides 失效
标题翻译：漏极结的提取与具有超薄栅极氧化物的超小型CMOS器件的栅极和沟道长度重叠
公开(公告)号：US06646462B1
公开(公告)日：2003-11-11
申请号：US10178144
申请日：2002-06-24
申请人： Nian Yang , Zhigang Wang , Xin Guo
发明人： Nian Yang , Zhigang Wang , Xin Guo
IPC分类号： H01L2998
CPC分类号： H01L22/34 , H01L29/7836 , H01L2924/0002 , H01L2924/00
摘要： The present invention generally relates to a method of determining a source/drain junction overlap and a channel length of a small device, such as a MOS transistor. A large reference device having a known channel length is provided, and a source, drain, and substrate on which the device has been formed are grounded. A predetermined gate voltage is applied to a gate of the large device, and a gate to channel current of the reference device is measured. A source, drain, and substrate on which the small device has been formed are grounded, and the predetermined voltage is applied to a gate of the small device, and a gate to channel current of the small device is measured. The substrate and one of the source or the drain of the small device is floated, and a predetermined drain voltage is applied to source or the drain which is not floating. A gate to drain current for the small device is measured, and a source/drain junction overlap length is calculated. The source/drain junction overlap length is then used to calculate the channel length of the small device.
摘要翻译：本发明一般涉及一种确定诸如MOS晶体管的小器件的源/漏结重叠和沟道长度的方法。提供具有已知通道长度的大参考装置，并且其上形成有装置的源极，漏极和基板接地。将预定的栅极电压施加到大型器件的栅极，并测量参考器件的栅极到沟道电流。形成小型器件的源极，漏极和衬底接地，并且将预定电压施加到小器件的栅极，并且测量小器件的栅极到沟道电流。衬底和小器件的源极或漏极中的一个浮置，并且将预定的漏极电压施加到不浮动的源极或漏极。测量用于小器件的漏极电流的栅极，并计算源极/漏极结重叠长度。然后使用源极/漏极结重叠长度来计算小器件的沟道长度。

54. 发明授权

US06570787B1 Programming with floating source for low power, low leakage and high density flash memory devices 有权
标题翻译：使用浮动源编程，实现低功耗，低泄漏和高密度闪存设备
公开(公告)号：US06570787B1
公开(公告)日：2003-05-27
申请号：US10126330
申请日：2002-04-19
申请人： Zhigang Wang , Nian Yang , Xin Guo
发明人： Zhigang Wang , Nian Yang , Xin Guo
IPC分类号： G11C1604
CPC分类号： G11C16/12
摘要： The present invention relates to a flash memory array architecture comprising a plurality of flash memory cells arranged in a NOR type array configuration. Each of the plurality of flash memory cells have a source terminal coupled together to form a common source. The array architecture further comprises a common source selection component coupled between the common source of the array and a predetermined potential. The common source selection component is operable to couple the common source to the predetermined potential in a first state and electrically isolate or float the common source from the predetermined potential in a second state, thereby reducing leakage of non-selected cells associated with the activated bit line during a program mode of operation.
摘要翻译：本发明涉及一种闪存阵列架构，其包括以NOR型阵列配置布置的多个闪存单元。多个闪存单元中的每一个具有耦合在一起以形成公共源的源极端子。阵列结构还包括耦合在阵列的公共源和预定电位之间的公共源选择部件。公共源选择组件可操作以将公共源耦合到处于第一状态的预定电位，并且在第二状态下将公共源与预定电位电隔离或浮动，从而减少与激活位相关联的未选择单元的泄漏在程序运行模式下运行。

55. 发明授权

US06438037B1 Threshold voltage compacting for non-volatile semiconductor memory designs 失效
标题翻译：用于非易失性半导体存储器设计的阈值电压压缩
公开(公告)号：US06438037B1
公开(公告)日：2002-08-20
申请号：US09851773
申请日：2001-05-09
申请人： Richard Fastow , Xin Guo , Sameer S. Haddad
发明人： Richard Fastow , Xin Guo , Sameer S. Haddad
IPC分类号： G11C1606
CPC分类号： G11C16/3409 , G11C16/3404
摘要： A flash memory design with a compact threshold voltage distribution and a method for compacting the threshold voltage for a flash memory design in which the threshold voltage is compacted by erasing a plurality of memory cells to set the threshold voltage for the memory cells substantially towards a median erased threshold voltage; verifying at least one fast-erase memory cell; selectively soft-programming the memory cells; and erasing subsequent to selectively soft-programming.
摘要翻译：具有紧凑阈值电压分布的快闪存储器设计和用于压缩闪速存储器设计的阈值电压的方法，其中阈值电压通过擦除多个存储器单元而被压缩，以将存储器单元的阈值电压基本上朝向中位数擦除阈值电压; 验证至少一个快速擦除存储器单元; 选择性地软编程存储器单元; 并且在选择性软编程之后擦除。

56. 发明授权

US5427666A Method for in-situ cleaning a Ti target in a Ti + TiN coating process 失效
标题翻译： Ti + TiN涂层工艺中Ti靶的原位清洗方法
公开(公告)号：US5427666A
公开(公告)日：1995-06-27
申请号：US119769
申请日：1993-09-09
申请人： Mark A. Mueller , Xin Guo , John C. Egermeier
发明人： Mark A. Mueller , Xin Guo , John C. Egermeier
IPC分类号： C23C14/00 , C23C14/06 , C23C14/18 , C23C14/56 , C23C14/34 , H01L21/203
CPC分类号： C23C14/0036 , C23C14/0641 , C23C14/185 , C23C14/564 , Y10T428/24975 , Y10T428/265
摘要： A novel method of in-situ cleaning a Ti target in a Ti+TiN anti-reflective coating process when such Ti and TiN deposition process are conducted in the same process chamber by the addition of a simple process step and without the use of a shutter.
摘要翻译：当在相同的处理室中进行这种Ti和TiN沉积工艺时，通过添加简单的工艺步骤并且不使用快门，在Ti + TiN抗反射涂覆工艺中原位清洁Ti靶的新方法。

57. 发明授权

US10952080B2 Spectrum management device and method, geographic location database and subsystem 有权
公开(公告)号：US10952080B2
公开(公告)日：2021-03-16
申请号：US16300061
申请日：2017-04-18
申请人： Xin Guo , Sony Corporation
发明人： Xin Guo , Chen Sun
IPC分类号： H04W16/14 , H04W72/04 , H04W48/16 , H04W72/08 , H04L27/00
摘要： Provided in the present disclosure are a spectrum management device and method, a geographic location database, a coexistence discovery device, and subsystems for use in a radio communication system comprising a main system and subsystems. The spectrum management device comprises: a processing circuit, which is configured to: acquire spectrum usage information and spectrum adjustment capability information of subsystems managed by the spectrum management device, the spectrum usage information corresponding to information related to used spectrums assigned to and used by each subsystem, the spectrum adjustment capability information corresponding to information related to whether the subsystems support a spectrum adjustment operation, and an adjustment of the spectrums of the subsystems managed by the spectrum management device is determined on the basis of the spectrum usage information and the spectrum adjustment capability information, thus the interference caused by the subsystems as a result of spectrum usage to the main system is limited within a permissible range of the main system. The spectrum management device and method, the geographic location database, the coexistence discovery device, and the subsystems of the present disclosure achieve highly efficient use of spectrum resources.

58. 发明授权

US10667139B2 Frequency spectrum management device, electronic device, and method executed thereby 有权
公开(公告)号：US10667139B2
公开(公告)日：2020-05-26
申请号：US16346545
申请日：2017-12-13
申请人： Sony Corporation , Chen Sun , Xin Guo
发明人： Chen Sun , Xin Guo
IPC分类号： H04W16/10 , H04L5/00 , H04W16/14
摘要： A frequency spectrum management device includes a processing circuit and is configured so that: a first subsystem manages the frequency spectrum management device, an allocation coefficient between other subsystems and the first subsystem is determined on the basis of the distances from the first subsystem and the other subsystems to a main system, the allocation coefficient expresses the degree of interference of aggregated interference that the other subsystems and the first subsystem produce with respect to the main system; and a frequency spectrum resource is allocated to the first subsystem on the basis of the allocation coefficient. The use of the frequency spectrum management device, the electronic device, and the method executed thereby of the present disclosure increases the degree of rationality of frequency spectrum resource allocation for the subsystems.

59. 发明授权

US09164836B2 Cycling endurance extending for memory cells of a non-volatile memory array 有权
标题翻译：循环耐力延伸到非易失性存储器阵列的存储单元
公开(公告)号：US09164836B2
公开(公告)日：2015-10-20
申请号：US13976007
申请日：2011-12-28
申请人： Xin Guo , Kiran Pangal , Yogesh B. Wakchaure , Paul D. Ruby , Ravi J. Kumar
发明人： Xin Guo , Kiran Pangal , Yogesh B. Wakchaure , Paul D. Ruby , Ravi J. Kumar
IPC分类号： G06F11/00 , G06F11/10 , G11C11/56 , G11C16/06 , G11C16/26 , G11C16/34
CPC分类号： G06F11/1068 , G11C11/5642 , G11C16/06 , G11C16/26 , G11C16/3409
摘要： Examples are disclosed for cycling endurance extending for memory cells of a non-volatile memory array. The examples include implementing one or more endurance extending schemes based on program/erase cycle counts or a failure trigger. The one or more endurance extending schemes may include a gradual read window expansion, a gradual read window shift, an erase blank check algorithm, a dynamic soft-program or a dynamic pre-program.
摘要翻译：公开了用于对非易失性存储器阵列的存储器单元进行扩展的循环耐久性的示例。这些示例包括基于程序/擦除循环计数或故障触发来实现一个或多个耐力扩展方案。一个或多个耐力扩展方案可以包括逐渐读取窗口扩展，逐渐读取窗口移位，擦除空白校验算法，动态软程序或动态预编程。

60. 发明授权

US09150577B2 Heterocyclic compounds containing an indole core 有权
标题翻译：含有吲哚核的杂环化合物
公开(公告)号：US09150577B2
公开(公告)日：2015-10-06
申请号：US13513954
申请日：2010-11-30
申请人： Stephen J. Boyer , Donghong Amy Gao , Xin Guo , Thomas Martin Kirrane, Jr. , Christopher Ronald Sarko , Roger John Snow , Fariba Soleymanzadeh , Yunlong Zhang
发明人： Stephen J. Boyer , Donghong Amy Gao , Xin Guo , Thomas Martin Kirrane, Jr. , Christopher Ronald Sarko , Roger John Snow , Fariba Soleymanzadeh , Yunlong Zhang
IPC分类号： C07D487/04 , C07D487/20 , C07D491/20
CPC分类号： C07D487/04 , C07D487/20 , C07D491/20
摘要： Disclosed are novel compounds which inhibit RSK, methods of making such compounds and pharmaceutical compositions comprising such compounds. Also disclosed are methods of treating RSK2 regulated disorders using compounds of the invention.
摘要翻译：公开了抑制RSK的新化合物，制备这些化合物的方法和包含这些化合物的药物组合物。还公开了使用本发明化合物治疗RSK2调节性疾病的方法。

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