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51. 发明申请

US20060197190A1 Method of fabricating wafer-level packaging with sidewall passivation and related apparatus 有权
标题翻译：制造具有侧壁钝化和相关设备的晶片级封装的方法
公开(公告)号：US20060197190A1
公开(公告)日：2006-09-07
申请号：US11409350
申请日：2006-04-21
申请人： Trung Doan
发明人： Trung Doan
IPC分类号： H01L23/02
CPC分类号： H01L21/568 , H01L21/6835 , H01L23/3114 , H01L23/3185 , H01L24/11 , H01L24/13 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05572 , H01L2224/056 , H01L2224/11 , H01L2224/1191 , H01L2224/13 , H01L2224/13022 , H01L2224/13099 , H01L2224/16 , H01L2924/00013 , H01L2924/00014 , H01L2924/01013 , H01L2924/01032 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2224/29099 , H01L2924/00 , H01L2224/05099
摘要： A chip-scale or wafer-level package having passivation layers on substantially all surfaces thereof to form a hermetically sealed package is provided. The package may be formed by disposing a first passivation layer on the passive or backside surface of a semiconductor wafer. The semiconductor wafer may be attached to a flexible membrane and diced, such as by a wafer saw, to separate the semiconductor devices. Once diced, the flexible membrane may be stretched so as to laterally displace the individual semiconductor devices away from one another and substantially expose the side edges thereof. Once the side edges of the semiconductor devices are exposed, a passivation layer may be formed on the side edges and active surfaces of the devices. A portion of the passivation layer over the active surface of each semiconductor device may be removed so as to expose conductive elements formed therebeneath.
摘要翻译：提供了在其基本上所有表面上具有钝化层以形成气密密封封装的芯片级或晶圆级封装。封装可以通过在半导体晶片的无源或背面上设置第一钝化层来形成。半导体晶片可以附接到柔性膜并且例如通过晶片锯切割，以分离半导体器件。一旦切割，柔性膜可以被拉伸，以使各个半导体器件彼此横向移位并且基本上暴露其侧边缘。一旦半导体器件的侧边缘被暴露，就可以在器件的侧边缘和有源表面上形成钝化层。可以去除每个半导体器件的有源表面上的钝化层的一部分，以便暴露在其下形成的导电元件。

52. 发明申请

US20060118953A1 Semiconductor component having thinned die with conductive vias 有权
标题翻译：半导体元件具有导电通孔的薄模
公开(公告)号：US20060118953A1
公开(公告)日：2006-06-08
申请号：US11339177
申请日：2006-01-20
申请人： Warren Farnworth , Alan Wood , Trung Doan
发明人： Warren Farnworth , Alan Wood , Trung Doan
IPC分类号： H01L23/52 , H01L23/48 , H01L29/40
CPC分类号： H01L23/48 , B33Y70/00 , B33Y80/00 , H01L21/304 , H01L21/3043 , H01L21/56 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L21/6836 , H01L21/76802 , H01L21/76898 , H01L21/78 , H01L23/24 , H01L23/3114 , H01L23/36 , H01L23/3672 , H01L23/481 , H01L23/49531 , H01L23/49575 , H01L24/05 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/27 , H01L24/94 , H01L24/96 , H01L25/105 , H01L25/50 , H01L29/0657 , H01L2221/68327 , H01L2221/68331 , H01L2221/68372 , H01L2224/0401 , H01L2224/05599 , H01L2224/11849 , H01L2224/11901 , H01L2224/12105 , H01L2224/13009 , H01L2224/13022 , H01L2224/13025 , H01L2224/13099 , H01L2224/16 , H01L2224/16235 , H01L2224/274 , H01L2224/73104 , H01L2224/73253 , H01L2224/94 , H01L2225/06541 , H01L2225/1035 , H01L2225/1058 , H01L2225/107 , H01L2225/1094 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01039 , H01L2924/01041 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/05042 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/1433 , H01L2924/19041 , H01L2924/19042 , H01L2924/3512 , H01L2924/00 , H01L2224/29099 , H01L2224/27
摘要： A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A method for fabricating the component includes the steps of providing a substrate containing multiple dice, forming trenches on the substrate proximate to peripheral edges of the dice, and depositing a polymer material into the trenches. In addition, the method includes the steps of planarizing the back side of the substrate to contact the polymer filled trenches, and cutting through the polymer trenches to singulate the components from the substrate. Prior to the singulating step the components can be tested and burned-in while they remain on the substrate.
摘要翻译：半导体部件包括在六个表面上具有保护性聚合物层的变薄的半导体管芯。该组件还包括嵌入在电路侧聚合物层中的裸片上的接触凸块，并且密集区域阵列中接触凸块上的端子接触。一种用于制造该部件的方法包括以下步骤：提供包含多个骰子的基底，在基底上邻近骰子的周边边缘形成沟槽，以及将聚合物材料沉积到沟槽中。此外，该方法包括以下步骤：平坦化衬底的背面以接触聚合物填充的沟槽，并切割穿过聚合物沟槽以从衬底中分离组分。在分离步骤之前，组分可以在它们保留在基材上时被测试和燃烧。

53. 发明申请

US20060024517A1 Coating for aluminum component 有权
标题翻译：铝组件涂层
公开(公告)号：US20060024517A1
公开(公告)日：2006-02-02
申请号：US10910096
申请日：2004-08-02
申请人： Trung Doan , Kenny Ngan
发明人： Trung Doan , Kenny Ngan
IPC分类号： B32B15/04 , B32B19/00
CPC分类号： C23C16/20 , C23C16/0227 , C23C16/0272 , C23C16/56
摘要： A coated aluminum component for a substrate processing chamber comprises an aluminum component having a surface; a first aluminum oxide layer formed on the surface of the aluminum component, the aluminum oxide layer having a surface comprising penetrating surface features; and a second aluminum oxide layer on the first aluminum oxide layer, the second aluminum oxide layer substantially completely filling the penetrating surface features of the first aluminum oxide layer. A method of forming the coated aluminum component is also described.
摘要翻译：用于基板处理室的涂覆铝部件包括具有表面的铝部件; 形成在铝部件的表面上的第一氧化铝层，所述氧化铝层具有包括穿透表面特征的表面; 和在第一氧化铝层上的第二氧化铝层，第二氧化铝层基本上完全填充第一氧化铝层的穿透表面特征。还描述了形成涂覆的铝组分的方法。

54. 发明申请

US20050250053A1 Selective provision of a diblock copolymer material 有权
标题翻译：选择性提供二嵌段共聚物材料
公开(公告)号：US20050250053A1
公开(公告)日：2005-11-10
申请号：US10840535
申请日：2004-05-06
申请人： Eugene Marsh , Daryl New , Trung Doan
发明人： Eugene Marsh , Daryl New , Trung Doan
IPC分类号： G03F7/00 , G03F7/039 , H01L21/312
CPC分类号： H01L21/0274 , G03F7/039 , H01L21/312
摘要： Disclosed herein are techniques for using diblock copolymer (DBCP) films as etch masks to form small dots or holes in integrated circuit layers. In an embodiment, the DBCP film is deposited on the circuit layer to be etched. Then the DCBP film is confined to define an area of interest in the DCBP film in which hexagonal domains will eventually be formed. Such confinement can constitute masking and exposing the DCBP film using photolithographic techniques. Such masking preferably incorporates knowledge of the domain spacing and/or grain size of the to-be-formed domains in the area of interest to ensure that a predictable number and/or orientation of the domains will result in the area of interest, although this is not strictly necessary in all useful embodiments. Domains are then formed in the area of interest in the DBCP film which comprises a hexagonal array of cylindrical domains in a matrix. The film is then treated (e.g., with osmium or ozone) to render either the domains or the matrix susceptible to removal, while the other component is then used as a mask to etch either dots or holes in the underlying circuit layer.
摘要翻译：本文公开了使用二嵌段共聚物（DBCP）膜作为蚀刻掩模在集成电路层中形成小点或孔的技术。在一个实施例中，DBCP膜沉积在待蚀刻的电路层上。然后将DCBP膜限制在DCBP膜中限定最终将形成六方结构域的感兴趣区域。这种约束可以使用光刻技术构成掩蔽和暴露DCBP膜。这种掩蔽优选地结合了感兴趣区域中待形成区域的结构域间隔和/或晶粒尺寸的知识，以确保域的可预测数量和/或取向将导致感兴趣的区域，尽管这在所有有用的实施例中并不是绝对必要的。然后在DBCP膜中的感兴趣区域中形成畴，其包括在矩阵中的圆柱形域的六边形阵列。然后将膜处理（例如，用锇或臭氧）以使得区域或基质易于除去，而另一种组分然后用作掩模来蚀刻底层电路层中的任何点或孔。

55. 发明授权

US06945857B1 Polishing pad conditioner and methods of manufacture and recycling 失效
标题翻译：抛光垫调节剂及其制造和回收方法
公开(公告)号：US06945857B1
公开(公告)日：2005-09-20
申请号：US10888941
申请日：2004-07-08
申请人： Trung Doan , Venkata R. Balagani , Kenny King-Tai Ngan
发明人： Trung Doan , Venkata R. Balagani , Kenny King-Tai Ngan
IPC分类号： B24B1/00 , B24B53/007 , B24B53/12
CPC分类号： B24B53/017 , B24B53/12
摘要： A recycled polishing pad conditioner comprises a base plate and a reversed abrasive disc that is flipped over from its original configuration. The reversed disc comprises an exposed abrasive face having an unused abrasive face comprising abrasive particles. A bond face of the disc is affixed to the base plate, the bond face comprising a used abrasive face that was previously used to condition polishing pads. Also described is a pad conditioner having an abrasive face comprising exposed portions of abrasive particles, with at least about 60% of the abrasive particles having a crystalline structure with substantially the same crystal symmetry.
摘要翻译：回收的抛光垫调节器包括从其原始构造翻转的基板和反转的研磨盘。反向盘包括暴露的研磨面，其具有包含研磨颗粒的未使用的研磨面。盘的粘合面固定到基板上，粘合面包括先前用于调节抛光垫的用过的研磨面。还描述了一种垫调节剂，其具有包括磨料颗粒的暴露部分的研磨面，至少约60％的磨料颗粒具有基本相同的晶体对称性的晶体结构。

56. 发明申请

US20050200028A1 Encapsulated semiconductor component having thinned die with conductive vias 有权
标题翻译：封装的半导体元件具有带导电孔的薄模
公开(公告)号：US20050200028A1
公开(公告)日：2005-09-15
申请号：US11052279
申请日：2005-02-07
申请人： Warren Farnworth , Alan Wood , Trung Doan
发明人： Warren Farnworth , Alan Wood , Trung Doan
IPC分类号： H01L21/301 , H01L21/304 , H01L21/44 , H01L21/56 , H01L21/60 , H01L21/68 , H01L21/768 , H01L21/78 , H01L23/24 , H01L23/31 , H01L23/367 , H01L23/48 , H01L23/485 , H01L23/49 , H01L23/495 , H01L29/06
CPC分类号： H01L23/48 , B33Y70/00 , B33Y80/00 , H01L21/304 , H01L21/3043 , H01L21/56 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L21/6836 , H01L21/76802 , H01L21/76898 , H01L21/78 , H01L23/24 , H01L23/3114 , H01L23/36 , H01L23/3672 , H01L23/481 , H01L23/49531 , H01L23/49575 , H01L24/05 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/27 , H01L24/94 , H01L24/96 , H01L25/105 , H01L25/50 , H01L29/0657 , H01L2221/68327 , H01L2221/68331 , H01L2221/68372 , H01L2224/0401 , H01L2224/05599 , H01L2224/11849 , H01L2224/11901 , H01L2224/12105 , H01L2224/13009 , H01L2224/13022 , H01L2224/13025 , H01L2224/13099 , H01L2224/16 , H01L2224/16235 , H01L2224/274 , H01L2224/73104 , H01L2224/73253 , H01L2224/94 , H01L2225/06541 , H01L2225/1035 , H01L2225/1058 , H01L2225/107 , H01L2225/1094 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01039 , H01L2924/01041 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/05042 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/1433 , H01L2924/19041 , H01L2924/19042 , H01L2924/3512 , H01L2924/00 , H01L2224/29099 , H01L2224/27
摘要： A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A method for fabricating the component includes the steps of providing a substrate containing multiple dice, forming trenches on the substrate proximate to peripheral edges of the dice, and depositing a polymer material into the trenches. In addition, the method includes the steps of planarizing the back side of the substrate to contact the polymer filled trenches, and cutting through the polymer trenches to singulate the components from the substrate. Prior to the singulating step the components can be tested and burned-in while they remain on the substrate.
摘要翻译：半导体部件包括在六个表面上具有保护性聚合物层的变薄的半导体管芯。该组件还包括嵌入在电路侧聚合物层中的裸片上的接触凸块，并且密集区域阵列中接触凸块上的端子接触。一种用于制造该部件的方法包括以下步骤：提供包含多个骰子的基底，在基底上邻近骰子的周边边缘形成沟槽，以及将聚合物材料沉积到沟槽中。此外，该方法包括以下步骤：平坦化衬底的背面以接触聚合物填充的沟槽，并切割穿过聚合物沟槽以从衬底中分离组分。在分离步骤之前，组分可以在它们保留在基材上时被测试和燃烧。

57. 发明申请

US20050199486A1 Refurbishment of sputtering targets 有权
标题翻译：溅射靶材的翻新
公开(公告)号：US20050199486A1
公开(公告)日：2005-09-15
申请号：US10799361
申请日：2004-03-12
申请人： Trung Doan , Kenny Ngan
发明人： Trung Doan , Kenny Ngan
IPC分类号： B22F3/115 , C23C4/12 , C23C14/34 , C23C14/32
CPC分类号： B23K35/0205 , B23K11/11 , B23K11/16 , B23K35/0261 , B23K35/286 , B23K35/302 , C23C4/131 , C23C14/3414 , C23C26/02
摘要： In a method of refurbishing a deposition target, a surface of the target is provided in a process zone. An electrical arc is generated in the process zone, and a consumable metal wire is inserted into the process zone to form liquefied metal. A pressurized gas is injected into the process zone to direct the liquefied metal toward the surface of the target to splatter the liquefied metal on the surface, thereby forming a coating having the metal on at least a portion of the surface of the target that exhibits reduced contamination from the environment.
摘要翻译：在翻新沉积靶的方法中，靶的表面设置在处理区中。在工艺区域产生电弧，并将消耗性金属丝插入加工区以形成液化金属。将加压气体注入到处理区域中以将液化金属引导到靶的表面以将表面上的液化金属溅射，从而在目标表面的至少一部分表面上形成具有金属的涂层，其表现出减少的污染环境。

58. 发明申请

US20050181540A1 Semiconductor component and system having thinned, encapsulated dice 有权
公开(公告)号：US20050181540A1
公开(公告)日：2005-08-18
申请号：US11052378
申请日：2005-02-07
申请人： Warren Farnworth , Alan Wood , Trung Doan
发明人： Warren Farnworth , Alan Wood , Trung Doan
IPC分类号： H01L21/301 , H01L21/304 , H01L21/44 , H01L21/56 , H01L21/60 , H01L21/68 , H01L21/768 , H01L21/78 , H01L23/24 , H01L23/31 , H01L23/367 , H01L23/48 , H01L23/485 , H01L23/49 , H01L23/495 , H01L29/06
CPC分类号： H01L23/48 , B33Y70/00 , B33Y80/00 , H01L21/304 , H01L21/3043 , H01L21/56 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L21/6836 , H01L21/76802 , H01L21/76898 , H01L21/78 , H01L23/24 , H01L23/3114 , H01L23/36 , H01L23/3672 , H01L23/481 , H01L23/49531 , H01L23/49575 , H01L24/05 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/27 , H01L24/94 , H01L24/96 , H01L25/105 , H01L25/50 , H01L29/0657 , H01L2221/68327 , H01L2221/68331 , H01L2221/68372 , H01L2224/0401 , H01L2224/05599 , H01L2224/11849 , H01L2224/11901 , H01L2224/12105 , H01L2224/13009 , H01L2224/13022 , H01L2224/13025 , H01L2224/13099 , H01L2224/16 , H01L2224/16235 , H01L2224/274 , H01L2224/73104 , H01L2224/73253 , H01L2224/94 , H01L2225/06541 , H01L2225/1035 , H01L2225/1058 , H01L2225/107 , H01L2225/1094 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01039 , H01L2924/01041 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/05042 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/1433 , H01L2924/19041 , H01L2924/19042 , H01L2924/3512 , H01L2924/00 , H01L2224/29099 , H01L2224/27
摘要： A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A method for fabricating the component includes the steps of providing a substrate containing multiple dice, forming trenches on the substrate proximate to peripheral edges of the dice, and depositing a polymer material into the trenches. In addition, the method includes the steps of planarizing the back side of the substrate to contact the polymer filled trenches, and cutting through the polymer trenches to singulate the components from the substrate. Prior to the singulating step the components can be tested and burned-in while they remain on the substrate.

59. 发明申请

US20050167799A1 Method of fabricating wafer-level packaging with sidewall passivation and related apparatus 有权
标题翻译：制造具有侧壁钝化和相关设备的晶片级封装的方法
公开(公告)号：US20050167799A1
公开(公告)日：2005-08-04
申请号：US10767952
申请日：2004-01-29
申请人： Trung Doan
发明人： Trung Doan
IPC分类号： H01L21/44 , H01L21/68 , H01L23/02 , H01L23/31 , H01L23/485 , H01L29/40
CPC分类号： H01L21/568 , H01L21/6835 , H01L23/3114 , H01L23/3185 , H01L24/11 , H01L24/13 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05572 , H01L2224/056 , H01L2224/11 , H01L2224/1191 , H01L2224/13 , H01L2224/13022 , H01L2224/13099 , H01L2224/16 , H01L2924/00013 , H01L2924/00014 , H01L2924/01013 , H01L2924/01032 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2224/29099 , H01L2924/00 , H01L2224/05099
摘要： A method of fabricating a chip-scale or wafer-level package having passivation layers on substantially all surfaces thereof to form a hermetically sealed package. The package may be formed by disposing a first passivation layer on the passive or backside surface of a semiconductor wafer. The semiconductor wafer may be attached to a flexible membrane and diced, such as by a wafer saw, to separate the semiconductor devices. Once diced, the flexible membrane may be stretched so as to laterally displace the individual semiconductor devices away from one another and substantially expose the side edges thereof. Once the side edges of the semiconductor devices are exposed, a passivation layer may be formed on the side edges and active surfaces of the devices. A portion of the passivation layer over the active surface of each semiconductor device may be removed so as to expose conductive elements formed therebeneath.
摘要翻译：一种在其基本上所有表面上制造具有钝化层的芯片级或晶片级封装的方法，以形成气密封装。封装可以通过在半导体晶片的无源或背面上设置第一钝化层来形成。半导体晶片可以附接到柔性膜并且例如通过晶片锯切割，以分离半导体器件。一旦切割，柔性膜可以被拉伸，以使各个半导体器件彼此横向移位并基本上暴露其侧边缘。一旦半导体器件的侧边缘被暴露，就可以在器件的侧边缘和有源表面上形成钝化层。可以去除每个半导体器件的有源表面上的钝化层的一部分，以便暴露在其下形成的导电元件。

60. 发明申请

US20050148160A1 Encapsulated semiconductor components and methods of fabrication 审中-公开
标题翻译：封装的半导体元件和制造方法
公开(公告)号：US20050148160A1
公开(公告)日：2005-07-07
申请号：US10646897
申请日：2003-08-22
申请人： Warren Farnworth , Alan Wood , Trung Doan
发明人： Warren Farnworth , Alan Wood , Trung Doan
IPC分类号： H01L21/301 , H01L21/304 , H01L21/44 , H01L21/56 , H01L21/60 , H01L21/68 , H01L21/768 , H01L21/78 , H01L23/24 , H01L23/31 , H01L23/367 , H01L23/48 , H01L23/485 , H01L23/49 , H01L23/495 , H01L29/06
CPC分类号： H01L23/48 , B33Y70/00 , B33Y80/00 , H01L21/304 , H01L21/3043 , H01L21/56 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L21/6836 , H01L21/76802 , H01L21/76898 , H01L21/78 , H01L23/24 , H01L23/3114 , H01L23/36 , H01L23/3672 , H01L23/481 , H01L23/49531 , H01L23/49575 , H01L24/05 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/27 , H01L24/94 , H01L24/96 , H01L25/105 , H01L25/50 , H01L29/0657 , H01L2221/68327 , H01L2221/68331 , H01L2221/68372 , H01L2224/0401 , H01L2224/04105 , H01L2224/05599 , H01L2224/11849 , H01L2224/11901 , H01L2224/12105 , H01L2224/13009 , H01L2224/13022 , H01L2224/13025 , H01L2224/13099 , H01L2224/16 , H01L2224/16235 , H01L2224/274 , H01L2224/73104 , H01L2224/73253 , H01L2224/94 , H01L2225/06541 , H01L2225/1035 , H01L2225/1058 , H01L2225/107 , H01L2225/1094 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01039 , H01L2924/01041 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/05042 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/1433 , H01L2924/19041 , H01L2924/19042 , H01L2924/3512 , H01L2924/00 , H01L2224/29099 , H01L2224/27
摘要： A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A method for fabricating the component includes the steps of providing a substrate containing multiple dice, forming trenches on the substrate proximate to peripheral edges of the dice, and depositing a polymer material into the trenches. In addition, the method includes the steps of planarizing the back side of the substrate to contact the polymer filled trenches, and cutting through the polymer trenches to singulate the components from the substrate. Prior to the singulating step the components can be tested and burned-in while they remain on the substrate.
摘要翻译：半导体部件包括在六个表面上具有保护性聚合物层的变薄的半导体管芯。该组件还包括嵌入在电路侧聚合物层中的裸片上的接触凸块，并且密集区域阵列中接触凸块上的端子接触。一种用于制造该部件的方法包括以下步骤：提供包含多个骰子的基底，在基底上邻近骰子的周边边缘形成沟槽，以及将聚合物材料沉积到沟槽中。此外，该方法包括以下步骤：平坦化衬底的背面以接触聚合物填充的沟槽，并切割穿过聚合物沟槽以从衬底中分离组分。在分离步骤之前，组分可以在它们保留在基材上时被测试和燃烧。

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