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51. 发明公开

US20240169879A1 DISPLAY SUBSTRATE AND DISPLAY DEVICE 审中-公开
公开(公告)号：US20240169879A1
公开(公告)日：2024-05-23
申请号：US18396023
申请日：2023-12-26
申请人： BOE Technology Group Co., Ltd
发明人： Zhenzhen LI , Lujiang HUANGFU , Shanshan BAI , Kuo SUN
IPC分类号： G09G3/20
CPC分类号： G09G3/2074 , G09G2320/0673 , G09G2320/0686 , G09G2340/0407
摘要： A display substrate, a method for driving the same, a display device, and a high-precision metal mask are provided. The display area includes a first display sub-area in which pixels are distributed at a high density (e.g., a high resolution), and a second display sub-area in which pixels are distributed at a low density (e.g., a low resolution), and a transition display sub-area, with a distribution density of pixels (a resolution) between the distribution density of pixels in the first display sub-area and a distribution density of pixels in the second display sub-area, is arranged between the first display sub-area and the second display sub-area.

52. 发明公开

US20240078956A1 ARRAY SUBSTRATE AND DISPLAY DEVICE 审中-公开
公开(公告)号：US20240078956A1
公开(公告)日：2024-03-07
申请号：US18494796
申请日：2023-10-26
申请人： BOE TECHNOLOGY GROUP CO., LTD
发明人： Long HAN , Libin LIU , Lujiang HUANGFU
IPC分类号： G09G3/20 , G09G3/3233
CPC分类号： G09G3/2074 , G09G3/3233 , G09G2300/0408 , G09G2300/0426 , G09G2300/0465 , G09G2300/0819 , G09G2310/0202 , G09G2310/08 , G09G2320/066
摘要： The present disclosure relates to an array substrate and a display device. The array substrate includes a plurality of pixel units arranged in an array, each of the pixel units including a plurality of sub-pixels. The array substrate includes: a plurality of power lines which are arranged in a conductive layer on a base substrate, are arranged at intervals along a first direction and extend along a second direction, and are used for providing power signals to the sub-pixels; and a plurality of power leads which are arranged in another conductive layer, are arranged at intervals along the second direction and extend along the first direction. Projections of at least one of the power lines and at least one of the power leads on the base substrate intersect, and the projections of the power lines and the power leads on the base substrate form a grid-like structure.

53. 发明公开

US20230314674A1 DISPLAY SUBSTRATE AND DISPLAY DEVICE 审中-公开
公开(公告)号：US20230314674A1
公开(公告)日：2023-10-05
申请号：US18140699
申请日：2023-04-28
申请人： CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD.
发明人： Fengli JI , Chang LUO , Jianpeng WU , Lujiang HUANGFU
IPC分类号： G02B5/20 , G09F9/33 , G09F9/302 , G02F1/1343 , G02F1/136 , G02F1/1362 , H10K59/35
CPC分类号： G02B5/201 , G02F1/134309 , G02F1/136 , G02F1/1362 , G09F9/302 , G09F9/3023 , G09F9/33 , H10K59/353 , G02F1/134345
摘要： A display substrate and a display device are provided. The display substrate includes a plurality of repeat units. Each of the plurality of repeat units includes one first-color sub-pixel, one second-color sub-pixel pair and one third-color sub-pixel which are arranged in a first direction, the second-color sub-pixel pair includes two second-color sub-pixels arranging in a second direction. In three sub-pixels of different colors which are adjacent to each other, orthographic projections of light-emitting layers of at least two sub-pixels adjacent to each other on the base substrate are overlapped or connected, and a spacing is disposed between at least part of the light-emitting layers of two sub-pixels which are adjacent to each other.

54. 发明公开

US20230180550A1 ARRAY SUBSTRATE AND DISPLAY DEVICE 审中-公开
公开(公告)号：US20230180550A1
公开(公告)日：2023-06-08
申请号：US17630211
申请日：2021-02-04
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Long HAN , Libin LIU , Lujiang HUANGFU
IPC分类号： H10K59/131
CPC分类号： H10K59/131
摘要： The present disclosure provides an array substrate and a display device. The array substrate includes a plurality of initialization signal lines and a plurality of connection lines. The initialization signal lines are arranged in a first conductive layer, extend along a first direction and are arranged at intervals along a second direction; the connection lines are arranged in a second conductive layer, extend along the second direction and are arranged at intervals along the first direction; the first conductive layer and the second conductive layer are an identical layer or different layers; projections of at least one of the initialization signal lines and at least one of the connection lines on the base substrate are intersected and electrically connected, such that the projections of the initialization signal lines and the connection lines on the base substrate form a grid structure.

55. 发明申请

US20230042966A1 PIXEL DRIVING CIRCUIT, DRIVING METHOD FOR THE SAME, DISPLAY PANEL, AND DISPLAY APPARATUS 有权
公开(公告)号：US20230042966A1
公开(公告)日：2023-02-09
申请号：US17793841
申请日：2021-05-17
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Lujiang HUANGFU , Li WANG , Can ZHENG , Tian DONG , Libin LIU
IPC分类号： G09G3/3258
摘要： A pixel driving circuit includes: an energy storage sub-circuit, a reset sub-circuit, a compensation sub-circuit, a driving sub-circuit, and a current leakage suppression sub-circuit. The energy storage sub-circuit is coupled to a first node and a second node. The reset sub-circuit is coupled to the second node, a first scan timing signal terminal, and an initialization signal terminal. The compensation sub-circuit is coupled to the second node, a third node, and a second scan timing signal terminal. The driving sub-circuit is coupled to the second node, the third node, and a first voltage signal terminal. The current leakage suppression sub-circuit is coupled to the energy storage sub-circuit, the reset sub-circuit, and the compensation sub-circuit. The current leakage suppression sub-circuit is configured to suppress current leakage of the energy storage sub-circuit in a process of generating and transmitting the driving signal by the driving sub-circuit.

56. 发明申请

US20220392971A1 PIXEL ARRANGEMENT STRUCTURE, DISPLAY METHOD AND PREPARING METHOD OF PIXEL ARRANGEMENT STRUCTURE, AND DISPLAY SUBSTRATE 有权
公开(公告)号：US20220392971A1
公开(公告)日：2022-12-08
申请号：US17890427
申请日：2022-08-18
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Hongli WANG , Lujiang HUANGFU
IPC分类号： H01L27/32 , H01L51/56
摘要： A pixel arrangement structure, a display method and a preparing method of a pixel arrangement structure, and a display substrate are provided. The pixel arrangement structure includes first color sub-pixel blocks, second color sub-pixel blocks, and third color sub-pixel blocks. Each of the plurality of minimum repeating regions has a rectangular shape and includes a first virtual rectangle, and the first virtual rectangle includes one first color sub-pixel block, one second color sub-pixel block and one third color sub-pixel block. Any edge of the first virtual rectangle has a non-zero included angle with a first direction, and the first direction is a row direction or a column direction. The first color sub-pixel block is on a perpendicular bisector of the first edge, the second color sub-pixel block and the third color sub-pixel block are on different sides of the perpendicular bisector of the first edge.

57. 发明申请

US20220199022A1 DISPLAY PANEL, PIXEL CIRCUIT AND METHOD FOR DRIVING THE PIXEL CIRCUIT 有权
公开(公告)号：US20220199022A1
公开(公告)日：2022-06-23
申请号：US17599387
申请日：2021-01-14
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Lujiang HUANGFU , Libin LIU , Can ZHENG
IPC分类号： G09G3/3233
摘要： The present disclosure provides a display panel, a pixel circuit and a method for driving the pixel circuit, the pixel circuit includes: a storage capacitor circuit; a light-emitting element; a driving transistor; a reset circuit, the reset circuit is configured to receive a reset control signal and reset a first node and a second node according to the reset control signal, or receive a writing control signal and/or a timing sequence control signal of an adjacent pixel row and reset the first node and the second node according to the writing control signal and/or the timing sequence control signal of the adjacent pixel row; a threshold compensation circuit, configured to receive a compensation control signal and write a compensation voltage into the first node according to the compensation control signal; a writing circuit; and a light-emitting control circuit.

58. 发明申请

US20220114958A1 DISPLAY PANEL AND DISPLAY DEVICE 有权
公开(公告)号：US20220114958A1
公开(公告)日：2022-04-14
申请号：US17278713
申请日：2020-05-09
申请人： BOE Technology Group Co., Ltd.
发明人： Yu FENG , Libin LIU , Lujiang HUANGFU
IPC分类号： G09G3/3233 , G09G3/3258 , H01L27/12
摘要： The display panel includes: a base substrate; a silicon semiconductor layer, the silicon semiconductor layer including active silicon layers of a driving transistor and an initialization transistor, each of the active silicon layers being provided with a first region, a second region and a first channel region therebetween; a first insulating layer, a first conducting layer, a second insulating layer and an oxide semiconductor layer, the oxide semiconductor layer including an active oxide layer of a voltage stabilizing transistor, the oxide semiconductor layer being provided with a third region, a fourth region and a second channel region therebetween. In the same sub-pixel, the second region of the active silicon layer of the initialization transistor is electrically connected to the third region, and the fourth region is electrically connected to a gate electrode of the driving transistor.

59. 发明申请

US20220059623A1 PIXEL ARRANGEMENT STRUCTURE, DISPLAY SUBSTRATE, AND DISPLAY DEVICE 有权
公开(公告)号：US20220059623A1
公开(公告)日：2022-02-24
申请号：US17453438
申请日：2021-11-03
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Wenjing TAN , Lujiang HUANGFU , Hongli WANG , Hui ZHAO
IPC分类号： H01L27/32 , G09G3/20
摘要： A pixel arrangement structure, a display substrate, and a display device. The pixel arrangement structure comprises pixel groups (10) extending in a first direction and arranged in a second direction, and each pixel group (10) comprises a first sub-pixel row (100), a second sub-pixel row (200), and a third sub-pixel row (300). The first sub-pixel row (100) comprises a plurality of first sub-pixels (110), the second sub-pixel row (200) comprises a plurality of second sub-pixel pairs (210), and the third sub-pixel row (300) comprises a plurality of third sub-pixels (310). The pitches of the plurality of first sub-pixels (110), the plurality of second sub-pixel pairs (210), and the plurality of third sub-pixels (310) in the first direction are same. In each pixel group (10), a line connecting the centers of a first sub-pixel (110) and a third sub-pixel (310) adjacent to each other are substantially parallel to the second direction, and the first sub-pixel row (100) and the second sub-pixel row (200) are shifted by one half of the pitch in the first direction. The orthographic projections of a second sub-pixel pair (210) and a first sub-pixel (110) adjacent to each other on a straight line extending in the first direction are overlapped, and the first sub-pixel rows (100) in the two adjacent pixel groups (10) are shifted by one-half of the pitch in the first direction. The pixel arrangement structure reduces the grainy sensation of the second sub-pixel pairs during display.

60. 发明申请

US20210391396A1 ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR, DISPLAY DEVICE, AND MASK PLATE 有权
公开(公告)号：US20210391396A1
公开(公告)日：2021-12-16
申请号：US17281606
申请日：2020-05-08
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Qian YANG , Lujiang HUANGFU , Libin LIU
IPC分类号： H01L27/32 , H01L51/56
摘要： Provided are an array substrate and a manufacturing method therefor, a display device, and a mask plate. The array substrate includes a pixel defining layer having a first opening, a second opening, and a third opening passing through the pixel defining layer. Every two of the first to third openings are adjacent to each other. The pixel defining layer includes first to third opening denning portions. At least one of the ratio of the slope angle of a portion of the first opening defining portion located between the first opening and the second opening to the slope angle of the third opening defining portion, and the ratio of the slope angle of a portion of the second opening defining portion located between the first opening and the second opening to the slope angle of the third opening defining portion is from 0.8 to 1.25.

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