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51. 发明授权

US5905387A Analog voltage-signal selector device 失效
标题翻译：模拟电压信号选择器
公开(公告)号：US5905387A
公开(公告)日：1999-05-18
申请号：US742978
申请日：1996-11-01
申请人： Mauro Chinosi , Roberto Canegallo , Alan Kramer , Roberto Guerrieri
发明人： Mauro Chinosi , Roberto Canegallo , Alan Kramer , Roberto Guerrieri
IPC分类号： G06N3/063 , H03K5/24 , G01R19/00 , H03L5/00
CPC分类号： G06N3/0635
摘要： The present invention relates to an analog voltage-signal selector device of the type comprising at least one plurality of comparator circuits operating in parallel and each having at least a first and second input terminals and designed to receive respectively an analog voltage-comparison signal and analog voltage signals of predetermined value and at least one output terminal for digital voltage signals. This selector device also comprises at least one logic circuit having a plurality of input terminals each connected to a corresponding output terminal of the comparator circuits and at least one output terminal. Finally the selector incorporates at least one plurality of latches each having at least one input terminal connected to the output terminal of a corresponding comparator circuit and at least one drive terminal coupled to the output terminal of the logic circuit with each of the memory circuits having at least one output terminal corresponding to an output of the selector.
摘要翻译：本发明涉及一种模拟电压信号选择器装置，其类型包括至少一个并联工作的多个比较器电路，每个具有至少一个第一和第二输入端，并被设计成分别接收模拟电压比较信号和模拟预定值的电压信号和用于数字电压信号的至少一个输出端子。该选择器装置还包括具有多个输入端的至少一个逻辑电路，每个输入端连接到比较器电路的相应输出端和至少一个输出端。最后，选择器包括至少一个多个锁存器，每个锁存器具有至少一个输入端子连接到对应的比较器电路的输出端子，以及耦合到逻辑电路的输出端子的至少一个驱动端子，每个存储器电路具有对应于选择器的输出的至少一个输出端子。

52. 发明授权

US5438293A Low power analog absolute differencing circuit and architecture 失效
标题翻译：低功耗模拟绝对差分电路和架构
公开(公告)号：US5438293A
公开(公告)日：1995-08-01
申请号：US132447
申请日：1993-10-04
申请人： Roberto Guerrieri , Alan Kramer
发明人： Roberto Guerrieri , Alan Kramer
IPC分类号： G06G7/14 , G06G7/22 , H03F3/45 , H04N7/26 , H03K19/00
CPC分类号： G06G7/22
摘要： A low power analog absolute differencing circuit includes an integrating amplifier with an input node connected to a common integration line. The common integration line is connected to a set of analog comparison circuits to form an analog vector absolute differencing circuit row. Each of the analog comparison circuits compares a first analog signal to a second analog signal to produce an absolute difference signal. The absolute difference signal from each analog comparison circuit is transmitted in the form of charge drawn from the common integration line. The integrating amplifier provides an integration sum corresponding to the sum of the absolute difference signals. The analog absolute differencing architecture includes a set of analog vector absolute differencing circuit rows arranged to form an analog absolute difference computing array. The analog absolute difference computing array is loaded with a data block input array and a data frame input array. The data block input array inputs a first set of analog signals corresponding to a first set of data. The data frame input array inputs a second set of analog signals corresponding to a second set of data. The integrating amplifiers of the analog vector absolute differencing circuit rows of the analog absolute difference computing array constitute a distance integration array. A distance evaluation block takes as input the set of distances computed by the distance integration array and evaluates these distances to provide a single output, usually an address of a single row of the distance integration array.
摘要翻译：低功率模拟绝对差分电路包括具有连接到公共集成线的输入节点的积分放大器。公共集成线连接到一组模拟比较电路，以形成模拟矢量绝对差分电路行。每个模拟比较电路将第一模拟信号与第二模拟信号进行比较以产生绝对差信号。来自每个模拟比较电路的绝对差信号以从公共集成线提取的电荷的形式传输。积分放大器提供对应于绝对差信号之和的积分和。模拟绝对差分架构包括一组模拟矢量绝对差分电路行，其布置成形成模拟绝对差分计算阵列。模拟绝对差分计算阵列装载有数据块输入阵列和数据帧输入阵列。数据块输入阵列输入对应于第一组数据的第一组模拟信号。数据帧输入阵列输入对应于第二组数据的第二组模拟信号。模拟绝对差分计算阵列的模拟矢量绝对差分电路行的积分放大器构成距离积分阵列。距离评估块将由距离积分阵列计算的距离集合作为输入，并评估这些距离以提供单个输出，通常是距离积分阵列的单行的地址。

53. 发明申请

US20090164797A1 SECURE OFF-CHIP PROCESSING SUCH AS FOR BIOMETRIC DATA 有权
标题翻译：安全的片外处理，如生物量数据
公开(公告)号：US20090164797A1
公开(公告)日：2009-06-25
申请号：US11963637
申请日：2007-12-21
申请人： Alan Kramer
发明人： Alan Kramer
IPC分类号： H04L9/00
CPC分类号： G06F21/32 , G06K9/00885 , G06K2009/00959 , H04L9/3231 , H04L63/0861
摘要： In a biometric sensor system and method, storage of acquired biometric data and/or processing of that data may be shifted from specialized secure processing hardware to host system resources for improved speed and reduced cost of biometric sensor devices and systems. Stored data may be encrypted and/or signed by the specialized secure processing hardware and/or software. A database of authorized biometric data (e.g., patterns or key features representing all or a portion of the fingerprints of authorized users) may be stored on the host system either encrypted or non-encrypted or both. Preliminary matching against a database of many enrolled fingerprints may be accomplished by the system processor to ease the processing burden on the specialized secure processing hardware/software. Final match confirmation remains within exclusive control of the specialized secure processing hardware/software in order to prevent data tampering or other efforts to defeat the security provided by biometric identification.
摘要翻译：在生物测定传感器系统和方法中，获取的生物特征数据的存储和/或该数据的处理可以从专用的安全处理硬件转移到主机系统资源，以提高生物特征传感器设备和系统的速度和降低的成本。存储的数据可以由专门的安全处理硬件和/或软件加密和/或签名。授权生物特征数据的数据库（例如，表示授权用户的指纹的全部或一部分的模式或关键特征）可以被存储在主机系统上，该系统是加密的或非加密的，或两者都是。可以通过系统处理器来实现与许多登记指纹的数据库的初步匹配，以减轻专门的安全处理硬件/软件的处理负担。最终匹配确认仍然是专门的安全处理硬件/软件的专属控制，以防止数据篡改或其他努力来击败由生物识别提供的安全性。

54. 发明授权

US06437583B1 Capacitive distance sensor 有权
标题翻译：电容距离传感器
公开(公告)号：US06437583B1
公开(公告)日：2002-08-20
申请号：US09614093
申请日：2000-07-11
申请人： Marco Tartagni , Bhusan Gupta , Alan Kramer
发明人： Marco Tartagni , Bhusan Gupta , Alan Kramer
IPC分类号： G01R2726
CPC分类号： G01B7/023 , G01B7/004 , G01B7/287 , G01B7/34 , G06K9/0002
摘要： A distance sensor has a capacitive element in turn having a first capacitor plate which is positioned facing a second capacitor plate whose distance is to be measured. In the case of fingerprinting, the second capacitor plate is defined directly by the skin surface of the finger being printed. The sensor comprises an inverting amplifier, between the input and output of which the capacitive element is connected to form a negative feedback branch. By supplying an electric charge step to the input of the inverting amplifier, a voltage step directly proportional to the distance being measured is obtained at the output.
摘要翻译：距离传感器具有电容元件，其依次具有第一电容器板，该第一电容器板面对要测量距离的第二电容器板。在指纹的情况下，第二电容器板由被打印的手指的皮肤表面直接限定。该传感器包括反相放大器，在其输入和输出之间电容元件连接以形成负反馈支路。通过向反相放大器的输入端提供电荷步骤，在输出端获得与测量距离成正比的电压阶跃。

55. 发明授权

US06182239B2 Fault-tolerant codes for multi-level memories 失效
标题翻译：多层存储器的容错代码
公开(公告)号：US06182239B2
公开(公告)日：2001-01-30
申请号：US09020064
申请日：1998-02-06
申请人： Alan Kramer
发明人： Alan Kramer
IPC分类号： H02H305
CPC分类号： G06F11/1666 , G06F11/006 , G06F11/20 , G11C11/5642
摘要： A fault-tolerant code semiconductor memory storage device includes a array of individual multi-level storage devices arranged in a prescribed sequence. A controller is provided for programming the array with sequential data. The controller detects an occurrence of a faulty storage device in the array during a programming of the array with the sequential data. The controller further codes the occurrence of the faulty storage device in a subsequent storage device in the sequence of devices using a fault-tolerant code. A method of fault-tolerant coding of a semiconductor memory storage device is also disclosed.
摘要翻译：容错码半导体存储装置包括以规定顺序排列的各个多级存储装置的阵列。提供控制器用于使用顺序数据对阵列进行编程。在使用顺序数据对阵列进行编程期间，控制器检测阵列中故障存储设备的发生。控制器使用容错代码在设备序列中进一步编码故障存储设备在后续存储设备中的出现。还公开了半导体存储器存储装置的容错编码方法。

56. 发明授权

US06044004A Memory integrated circuit for storing digital and analog data and method 有权
标题翻译：用于存储数字和模拟数据和方法的存储器集成电路
公开(公告)号：US06044004A
公开(公告)日：2000-03-28
申请号：US219548
申请日：1998-12-22
申请人： Alan Kramer
发明人： Alan Kramer
IPC分类号： G11C7/10 , G11C11/56 , G11C27/00 , G11C7/00 , G11C16/06
CPC分类号： G11C16/3418 , G11C11/5621 , G11C11/5628 , G11C11/5642 , G11C16/3431 , G11C27/005 , G11C7/1045 , G11C7/16
摘要： A memory device includes an array of floating gate FET memory cells capable of storing either analog or digital data. The memory device includes first read-write circuitry for storage and retrieval of digital data, and second read-write circuitry for storage and retrieval of analog data. As a result, the digital data storage capability facilitates real-time operation of devices using the memory device without sacrificing the memory capacity capabilities of analog data storage. When a host device using the memory device is not in use, the stored digital data may be read out from the memory device, converted to analog form and then stored in the memory device, re-capturing the data density capabilities of analog data storage in floating gate FET memory cells. Analog data latency comparable to digital data latency is achieved by reading the analog data out from the memory cells, refreshing the analog data and then re-storing digital or analog data corresponding to the refreshed analog data in the memory cells in response to predetermined criteria.
摘要翻译：存储器件包括能够存储模拟或数字数据的浮栅FET存储单元的阵列。存储器件包括用于存储和检索数字数据的第一读写电路和用于存储和检索模拟数据的第二读写电路。因此，数字数据存储能力便于使用存储器件的设备的实时操作，而不牺牲模拟数据存储的存储器容量能力。当使用存储设备的主机设备不被使用时，可以从存储设备中读出存储的数字数据，转换为模拟形式，然后存储在存储设备中，重新捕获模拟数据存储的数据密度能力浮栅FET存储单元。与数字数据延迟相当的模拟数据延迟通过从存储器单元读出模拟数据，刷新模拟数据，然后响应于预定标准将对应于刷新的模拟数据的数字或模拟数据重新存储在存储器单元中来实现。

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