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51. 发明授权

US06968421B2 Partial block data programming and reading operations in a non-volatile memory 有权
标题翻译：非易失性存储器中的部分块数据编程和读取操作
公开(公告)号：US06968421B2
公开(公告)日：2005-11-22
申请号：US10841388
申请日：2004-05-07
申请人： Kevin M. Conley
发明人： Kevin M. Conley
IPC分类号： G11C16/02 , G06F12/00 , G06F12/02 , G11C16/06 , G11C16/10
CPC分类号： G11C16/102 , G06F12/0246 , G06F2212/1016 , G06F2212/1032 , G06F2212/7202 , G06F2212/7208 , G06F2212/7209 , G11C16/105 , G11C2216/16
摘要： Data in less than all of the pages of a non-volatile memory block are updated by programming the new data in unused pages of either the same or another block. In order to prevent having to copy unchanged pages of data into the new block, or to program flags into superceded pages of data, the pages of new data are identified by the same logical address as the pages of data which they superceded and a time stamp is added to note when each page was written. When reading the data, the most recent pages of data are used and the older superceded pages of data are ignored. This technique is also applied to metablocks that include one block from each of several different units of a memory array, by directing all page updates to a single unused block in one of the units.
摘要翻译：通过对相同或另一块的未使用页面中的新数据进行编程来更新少于非易失性存储器块的所有页面中的数据。为了防止不必要将不变的数据页复制到新的块中，或者将标记编程到被替换的数据页面中，新数据的页面被与它们所取代的数据页面相同的逻辑地址标识，并且时间戳当每个页面被写入时都会添加注释。当读取数据时，将使用最新的数据页面，并忽略较旧的旧版数据页面。通过将所有页面更新指向一个单元中的单个未使用的块，该技术也应用于包含来自存储器阵列的几个不同单元中的每一个的一个块的元区块。

52. 发明授权

US06871257B2 Pipelined parallel programming operation in a non-volatile memory system 有权
公开(公告)号：US06871257B2
公开(公告)日：2005-03-22
申请号：US10081375
申请日：2002-02-22
申请人： Kevin M. Conley , Yoram Cedar
发明人： Kevin M. Conley , Yoram Cedar
IPC分类号： G06F5/06 , G06F12/00 , G11C7/10 , G11C11/34 , G11C16/06 , G11C16/10
CPC分类号： G11C16/105 , G11C16/10 , G11C16/102 , G11C2216/22
摘要： The present invention allows for an increase in programming parallelism in a non-volatile memory system without incurring additional data transfer latency. Data is transferred from a controller to a first memory chip and a programming operation is caused to begin. While that first memory chip is busy performing that program operation, data is transferred from the controller to a second memory chip and a programming operation is caused to begin in that chip. Data transfer can begin to the first memory chip again once it has completed its programming operation even though the second chip is still busy performing its program operation. In this manner high parallelism of programming operation is achieved without incurring the latency cost of performing the additional data transfers. Two sets of embodiments are presented, one that preserves the host data in a buffer until successful programming of that data is confirmed and one that does not require that success be achieved and that does not preserve the data thus achieving a higher rate of data programming throughput.

53. 发明授权

US06684289B1 Techniques for operating non-volatile memory systems with data sectors having different sizes than the sizes of the pages and/or blocks of the memory 有权
标题翻译：用于操作具有与存储器的页面和/或块的大小不同的大小的数据扇区的非易失性存储器系统的技术
公开(公告)号：US06684289B1
公开(公告)日：2004-01-27
申请号：US09718802
申请日：2000-11-22
申请人： Carlos Gonzalez , Kevin M. Conley , Eliyahou Harari
发明人： Carlos Gonzalez , Kevin M. Conley , Eliyahou Harari
IPC分类号： G06F1202
CPC分类号： G06F12/04 , G06F12/0246 , G06F2212/7209
摘要： A non-volatile memory system, such as a flash EEPROM system, is disclosed to be divided into a plurality of blocks and each of the blocks into one or more pages, with sectors of data being stored therein that are of a different size than either the pages or blocks. One specific technique packs more sectors into a block than pages provided for that block. Error correction codes and other attribute data for a number of user data sectors are preferably stored together in different pages and blocks than the user data.
摘要翻译：公开了一种诸如闪存EEPROM系统的非易失性存储器系统，其被划分为多个块和每个块到一个或多个页面，其中存储数据扇区的大小不同于任何一个页面或块。一个特定的技术将更多的扇区包装到块中，而不是为该块提供的页面。用于多个用户数据扇区的纠错码和其他属性数据优选地存储在与用户数据不同的页面和块中。

54. 发明授权

US08869288B2 Method for using time from a trusted host device 有权
标题翻译：从可信主机设备使用时间的方法
公开(公告)号：US08869288B2
公开(公告)日：2014-10-21
申请号：US11811346
申请日：2007-06-08
申请人： Kevin M. Conley , Michael Holtzman , Rotem Sela , Ron Barzilai , Fabrice E. Jogand-Coulomb
发明人： Kevin M. Conley , Michael Holtzman , Rotem Sela , Ron Barzilai , Fabrice E. Jogand-Coulomb
IPC分类号： G06F7/00 , G06F21/10 , G11B20/00
CPC分类号： G06F21/10 , G06F21/725 , G11B20/00086 , Y10S705/901 , Y10S705/912
摘要： A method for using time from a trusted host device is disclosed. In one embodiment, an application on a memory device receives a request to perform a time-based operation from an entity authenticated by the memory device, wherein the entity is running on a host device. The application selects time from the host device instead of time from a time module on the memory device to perform the time-based operation and uses the time from the host device to perform the time-based operation. Other embodiments are disclosed, and each of the embodiments can be used alone or together in combination.
摘要翻译：公开了一种从可信主机设备使用时间的方法。在一个实施例中，存储设备上的应用从由存储器设备认证的实体接收执行基于时间的操作的请求，其中所述实体在主机设备上运行。应用程序从主机设备中选择时间，而不是从存储设备上的时间模块开始执行时间操作，并使用主机设备执行时间操作的时间。公开了其它实施例，并且每个实施例可以单独使用或组合使用。

55. 发明授权

US08621323B2 Pipelined data relocation and improved chip architectures 有权
标题翻译：流水线数据迁移和改进的芯片架构
公开(公告)号：US08621323B2
公开(公告)日：2013-12-31
申请号：US12353185
申请日：2009-01-13
申请人： Sergey Anatolievich Gorobets , Kevin M. Conley
发明人： Sergey Anatolievich Gorobets , Kevin M. Conley
IPC分类号： G11C29/00 , G06F3/00
CPC分类号： G06F12/0246 , G06F11/1008 , G11C7/1039 , G11C7/1051 , G11C16/3436
摘要： The present invention presents methods and architectures for the pipelining of read operation with write operations. In particular, methods are presented for pipelining data relocation operations that allow for the checking and correction of data in the controller prior to its being re-written, but diminish or eliminate the additional time penalty this would normally incur. A number of architectural examples are described to facilitate these methods, including: introducing two registers on the memory where each is independently accessible by the controller; allowing a first memory register to be written from while a second register is written to; introducing two registers on the memory where the contents of the registers can be swapped.
摘要翻译：本发明提出了用于具有写入操作的读取操作的流水线的方法和架构。特别地，提出了用于流水线数据迁移操作的方法，其允许在控制器被重写之前检查和校正控制器中的数据，但是减少或消除通常会产生的额外时间损失。描述了许多架构示例来促进这些方法，包括：在存储器中引入两个寄存器，每个寄存器可由控制器独立访问; 允许在写入第二个寄存器时写入第一个存储器寄存器; 在存储器中引入两个寄存器，其中寄存器的内容可以交换。

56. 发明授权

US08315950B2 Powerfully simple digital media player and methods for use therewith 有权
标题翻译：强大简单的数字媒体播放器及其使用方法
公开(公告)号：US08315950B2
公开(公告)日：2012-11-20
申请号：US11967861
申请日：2007-12-31
申请人： Kevin M. Conley , Daniel Schreiber , Avraham Shmuel , Noam Kedem
发明人： Kevin M. Conley , Daniel Schreiber , Avraham Shmuel , Noam Kedem
IPC分类号： G06F17/30
CPC分类号： G06F17/30053 , G06F17/30749 , G06F17/30772 , G06F17/30775 , G06Q30/0277 , G11B27/105 , G11B27/34
摘要： A powerfully simple digital media player and methods for use therewith are disclosed. In one embodiment, a digital media player with a simplified user interface is disclosed that, like an FM radio, allows a user to easily select a category of digital media for playback. In another embodiment, to make the experience more FM-radio-like for a user, instead of charging the user for the digital audio files, digital media files can be distributed for free (or at a reduced charge) by playing advertisements before, during, or after the playback of a digital audio file. In yet another embodiment, an exemplary network infrastructure is provided. In another embodiment, a generic streaming content file interface is presented. Other embodiments are disclosed, and any of these embodiments can be used alone or in combination with one another.
摘要翻译：公开了一种强大简单的数字媒体播放器及其使用方法。在一个实施例中，公开了具有简化的用户界面的数字媒体播放器，其与FM无线电一样，允许用户容易地选择用于播放的数字媒体类别。在另一个实施例中，为了使用户体验更像FM-收音机，代替数字音频文件的用户收费，数字媒体文件可以通过在之前，之前播放广告而免费（或以减少的费用）分发，或在数字音频文件播放之后。在另一个实施例中，提供了示例性网络基础设施。在另一个实施例中，呈现通用流式传输内容文件界面。公开了其它实施例，并且这些实施例中的任一个可以单独使用或彼此组合使用。

57. 发明授权

US08223547B2 Flash EEprom system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks 有权
标题翻译：闪存EEprom系统，具有同时多个数据扇区编程和存储其他指定块中的物理块特性
公开(公告)号：US08223547B2
公开(公告)日：2012-07-17
申请号：US13027055
申请日：2011-02-14
申请人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
发明人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
IPC分类号： G11C16/04
CPC分类号： G11C16/107 , G06F12/0246 , G06F2212/7203 , G06F2212/7207 , G06F2212/7208 , G11C16/10 , G11C16/3459 , G11C29/82 , G11C2216/14
摘要： A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Bytes of data in the stream may be shifted to avoid defective locations in the memory such as bad columns. Error correction codes may also be generated from the streaming data with a single generation circuit for the multiple sectors of data. The stream of data may further be transformed in order to tend to even out the wear among the blocks of memory. Yet another feature, for memory systems having multiple memory integrated circuit chips, provides a single system record that includes the capacity of each of the chips and assigned contiguous logical address ranges of user data blocks within the chips which the memory controller accesses when addressing a block, making it easier to manufacture a memory system with memory chips having different capacities. A typical form of the memory system is as a card that is removably connectable with a host system but may alternatively be implemented in a memory embedded in a host system. The memory cells may be operated with multiple states in order to store more than one bit of data per cell.
摘要翻译：非易失性存储器系统由以块为单位布置的浮动栅极存储单元形成为可以一起可擦除的最小单元的存储器单元。该系统包括可以单独地或以各种协作组合实现的多个特征。一个特征是在单独的块中存储其中存储用户数据的大量小区块的特性。正在访问的用户数据块的这些特征可以在存储器系统由其控制器操作期间被存储在随机存取存储器中以便于访问和更新。根据另一特征，通过将来自扇区的数据块交替地流向多个存储块，一次存储多个扇区的用户数据。可以移动流中的数据字节以避免存储器中的不良位置，例如不良列。也可以通过用于多扇区数据的单一生成电路从流数据生成纠错码。可以进一步转换数据流，以便趋向于均匀地消除存储器块之间的磨损。对于具有多个存储器集成电路芯片的存储器系统，又一特征提供了单个系统记录，该系统记录包括每个芯片的容量，并且在寻址块时存储器控制器访问的芯片内分配的用户数据块的连续逻辑地址范围，使得容易制造具有不同容量的存储器芯片的存储器系统。存储器系统的典型形式是可拆卸地与主机系统连接的卡，但是也可以在嵌入在主机系统中的存储器中实现。存储器单元可以以多种状态操作，以便存储每个单元的多于一位的数据。

58. 发明申请

US20120092796A1 N-Way Power Supply Over Current Protection 审中-公开
公开(公告)号：US20120092796A1
公开(公告)日：2012-04-19
申请号：US12904029
申请日：2010-10-13
申请人： Donald A. LIEBERMAN , Michael O'Connor , Raymond Bruce Wong , Kevin M. Conley
发明人： Donald A. LIEBERMAN , Michael O'Connor , Raymond Bruce Wong , Kevin M. Conley
IPC分类号： H02H9/02
CPC分类号： H02J13/0003 , G06F1/26 , G06F1/30 , Y02B90/228 , Y04S20/18
摘要： A method and apparatus for managing over current protection in a power supply unit is disclosed. One aspect of certain embodiments includes comparing for each conductor of a plurality of conductors the current flowing through the particular conductor with over current protection limit associated with that particular conductor.

59. 发明授权

US08161289B2 Voice controlled portable memory storage device 有权
标题翻译：语音控制便携式存储设备
公开(公告)号：US08161289B2
公开(公告)日：2012-04-17
申请号：US11314933
申请日：2005-12-21
申请人： Kevin M. Conley
发明人： Kevin M. Conley
IPC分类号： G06F21/00
CPC分类号： G06F21/32
摘要： Method for a portable memory storage device is provided. The method includes, enrolling the device after the device interfaces with a host system and an application is launched that requests a user to provide voice input; receiving the user voice input and storing the voice input as a template for subsequent user access; wherein the template is stored in non-volatile memory cells of the device; and authenticating a user by receiving user voice input and comparing the voice input with the stored template, wherein access to user files is provided after the user is authenticated.
摘要翻译：提供了一种用于便携式存储器存储装置的方法。该方法包括：在设备与主机系统接口并启动请求用户提供语音输入的应用之后注册设备; 接收用户语音输入并存储语音输入作为后续用户访问的模板; 其中所述模板存储在所述设备的非易失性存储单元中; 以及通过接收用户语音输入并将语音输入与存储的模板进行比较来认证用户，其中在用户被认证之后提供对用户文件的访问。

60. 发明申请

US20110212634A1 AC INTERCONNECT SCHEME FOR PSU 审中-公开
标题翻译： AC互连方案
公开(公告)号：US20110212634A1
公开(公告)日：2011-09-01
申请号：US12714366
申请日：2010-02-26
申请人： Donald LIEBERMAN , Kevin M. Conley , Andy Paul , Michael Gerard O'Connor
发明人： Donald LIEBERMAN , Kevin M. Conley , Andy Paul , Michael Gerard O'Connor
IPC分类号： H01R13/447 , H01R24/00 , H01R13/62 , H01B5/08
CPC分类号： G06F1/26
摘要： An ATX compatible power supply unit having at least one AC power inlet and at least one AC power cable, the AC power inlet configured to support nominal contact resistances of less than 8 milliohms per contact or the AC power cable configured to support series resistances of less than 4 milliohms per linear foot of individual conductor is disclosed.
摘要翻译：具有至少一个AC电力入口和至少一个AC电力电缆的ATX兼容电源单元，所述AC电力入口被配置为支持每触点小于8毫欧姆的标称接触电阻或被配置为支持较小的串联电阻的AC电力电缆公开了每单线直径4毫欧。

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