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51. 发明授权

US08278644B2 Switching device and nonvolatile memory device 有权
标题翻译：开关器件和非易失性存储器件
公开(公告)号：US08278644B2
公开(公告)日：2012-10-02
申请号：US12710942
申请日：2010-02-23
申请人： Shosuke Fujii , Koichi Muraoka
发明人： Shosuke Fujii , Koichi Muraoka
IPC分类号： H01L29/06
CPC分类号： H01L29/51 , H01L29/1606 , H01L29/7781 , H01L29/78
摘要： A switching device includes: a first layer including a carbon material having a six-member ring network structure; a first electrode electrically connected to a first portion of the first layer; a second electrode electrically connected to a second portion of the first layer and provided apart from the first electrode; a third electrode including a fourth portion provided opposing a third portion between the first portion and the second portion of the first layer; and a second layer provided between the third portion of the first layer and the fourth portion of the third electrode. The second layer includes: a base portion; and a functional group portion. The functional group portion is provided between the base portion and the first layer. The functional group portion is bonded to the base portion. A ratio of sp2-bonded carbon and sp3-bonded carbon of the first layer is changeable by a voltage applied between the first layer and the third electrode.
摘要翻译：开关装置包括：第一层，包括具有六元环网结构的碳材料; 电连接到第一层的第一部分的第一电极; 电连接到第一层的第二部分并且与第一电极分开设置的第二电极; 第三电极，包括与所述第一层的第一部分和第二部分之间的第三部分相对设置的第四部分; 以及设置在第一层的第三部分和第三电极的第四部分之间的第二层。第二层包括：基部; 和官能团部分。功能组部分设置在基部和第一层之间。官能团部分结合到基部。第一层的sp2键合碳和sp3键合碳的比例可以通过施加在第一层和第三电极之间的电压而改变。

52. 发明授权

US07238997B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07238997B2
公开(公告)日：2007-07-03
申请号：US11197593
申请日：2005-08-05
申请人： Daisuke Matsushita , Koichi Muraoka , Yasushi Nakasaki , Koichi Kato , Takashi Shimizu
发明人： Daisuke Matsushita , Koichi Muraoka , Yasushi Nakasaki , Koichi Kato , Takashi Shimizu
IPC分类号： H01L29/94
CPC分类号： H01L21/02112 , H01L21/02274 , H01L21/28202 , H01L21/3143 , H01L21/318 , H01L29/513 , H01L29/518 , H01L29/78
摘要： According to an aspect of the present invention, there is disclosed a semiconductor device comprising a semiconductor substrate, and a gate insulating film of a P-channel MOS transistor, formed on the semiconductor substrate. The gate insulating film has an oxide film (SiO2), and a diffusion preventive film (BN) containing boron and nitrogen atoms.
摘要翻译：根据本发明的一个方面，公开了一种半导体器件，包括半导体衬底和形成在半导体衬底上的P沟道MOS晶体管的栅极绝缘膜。栅极绝缘膜具有氧化膜（SiO 2）和含有硼和氮原子的防扩散膜（BN）。

53. 发明申请

US20060278940A1 Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060278940A1
公开(公告)日：2006-12-14
申请号：US11287192
申请日：2005-11-28
申请人： Koichi Kato , Daisuke Matsushita , Koichi Muraoka , Yasushi Nakasaki , Yuichiro Mitani , Nobutoshi Aoki
发明人： Koichi Kato , Daisuke Matsushita , Koichi Muraoka , Yasushi Nakasaki , Yuichiro Mitani , Nobutoshi Aoki
IPC分类号： H01L29/94
CPC分类号： H01L29/16 , H01L21/28176 , H01L21/28185 , H01L29/518
摘要： A semiconductor device includes a semiconductor substrate; an insulation film provided on the semiconductor substrate; and an electrode provided on the insulation film, and containing boron and a semiconductor material, wherein at least one element of the group V and carbon is introduced into an interface between the insulation film and the electrode.
摘要翻译：半导体器件包括半导体衬底; 设置在所述半导体基板上的绝缘膜; 以及设置在所述绝缘膜上并且含有硼和半导体材料的电极，其中所述V族和碳族中的至少一种元素被引入到所述绝缘膜和所述电极之间的界面中。

54. 发明申请

US20060170017A1 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060170017A1
公开(公告)日：2006-08-03
申请号：US11154815
申请日：2005-06-17
申请人： Koichi Muraoka
发明人： Koichi Muraoka
IPC分类号： H01L29/78 , H01L21/4763
CPC分类号： H01L21/28255 , H01L29/513 , H01L29/517
摘要： A method of manufacturing a semiconductor device includes forming a semiconductor layer containing a semiconductor material having a first oxide-generating Gibbs free energy required to become an oxide; forming a first material for a gate insulator on the semiconductor layer, said first material containing an element having a second oxide-generating Gibbs free energy required to become an oxide and becoming insulative when the element is oxidized or nitrided; and annealing the first material in an atmosphere containing hydrogen atoms, or heavy hydrogen atoms, and oxygen atoms in a temperature range where the first oxide-generating Gibbs free energy is equal to or higher than the second oxide-generating Gibbs free energy.
摘要翻译：一种制造半导体器件的方法包括：形成包含半导体材料的半导体层，所述半导体材料具有成为氧化物所需的第一氧化物生成吉布斯自由能; 在所述半导体层上形成用于栅极绝缘体的第一材料，所述第一材料包含当所述元件被氧化或氮化时，所述第一材料具有成为氧化物所需的具有第二氧化物产生的吉布斯自由能并变得绝缘的元素; 以及在所述第一氧化物产生吉布斯自由能等于或高于所述第二氧化物产生吉布斯自由能的温度范围内，在包含氢原子或重氢原子的气氛中和所述第一材料退火。

55. 发明申请

US20130069134A1 MEMORY INCLUDING TRANSISTORS WITH DOUBLE FLOATING GATE STRUCTURES 失效
标题翻译：包含两个浮动门结构的晶体管的存储器
公开(公告)号：US20130069134A1
公开(公告)日：2013-03-21
申请号：US13608436
申请日：2012-09-10
申请人： Tetsufumi TANAMOTO , Kosuke Tatsumura , Kiwamu Sakuma , Atsuhiro Kinoshita , Shinobu Fujita , Koichi Muraoka
发明人： Tetsufumi TANAMOTO , Kosuke Tatsumura , Kiwamu Sakuma , Atsuhiro Kinoshita , Shinobu Fujita , Koichi Muraoka
IPC分类号： H01L27/11
CPC分类号： H01L29/42332 , G11C11/412 , G11C14/0063 , H01L27/1104 , H01L29/7881
摘要： In a memory of an embodiment, first and second P-channel transistors are formed on a first semiconductor region, and each of the first and second P-channel transistors has a structure formed by stacking a first insulating film, a first floating gate, a second insulating film, a second floating gate, a third insulating film, and a first control gate in this order on the first semiconductor region. In the memory, first and second N-channel transistors are formed on a second semiconductor region, and each of the first and second N-channel transistors has a structure formed by stacking a fourth insulating film, a third floating gate, a fifth insulating film, a fourth floating gate, a sixth insulating film, and a second control gate in this order on the second semiconductor region.
摘要翻译：在实施例的存储器中，第一和第二P沟道晶体管形成在第一半导体区域上，并且第一和第二P沟道晶体管中的每一个具有通过堆叠第一绝缘膜，第一浮动栅极，第二绝缘膜，第二浮栅，第三绝缘膜和第一控制栅极。在存储器中，第一和第二N沟道晶体管形成在第二半导体区域上，并且第一和第二N沟道晶体管中的每一个具有通过堆叠第四绝缘膜，第三浮栅，第五绝缘膜，第四浮栅，第六绝缘膜和第二控制栅极。

56. 发明申请

US20120139030A1 NONVOLATILE SEMICONDUCTOR MEMORY 失效
标题翻译：非易失性半导体存储器
公开(公告)号：US20120139030A1
公开(公告)日：2012-06-07
申请号：US13316603
申请日：2011-12-12
申请人： Kiwamu SAKUMA , Atsuhiro Kinoshita , Masahiro Kiyotoshi , Daisuke Hagishima , Koichi Muraoka
发明人： Kiwamu SAKUMA , Atsuhiro Kinoshita , Masahiro Kiyotoshi , Daisuke Hagishima , Koichi Muraoka
IPC分类号： H01L27/105 , H01L21/8239
CPC分类号： H01L29/42328 , H01L21/28273 , H01L21/28282 , H01L27/11521 , H01L27/11524 , H01L27/11551 , H01L27/11568 , H01L27/11578 , H01L29/42344 , H01L29/66825 , H01L29/66833 , H01L29/7881 , H01L29/792
摘要： According to one embodiment, a nonvolatile semiconductor memory includes first to n-th (n is a natural number not less than 2) semiconductor layers in a first direction and extend in a second direction, and the semiconductor layers having a stair case pattern in a first end of the second direction, a common semiconductor layer connected to the first to n-th semiconductor layers commonly in the first end of the second direction, first to n-th layer select transistors which are provided in order from the first electrode side between the first electrode and the first to n-th memory strings, and first to n-th impurity regions which make the i-th layer select transistor (i is one of 1 to n) a normally-on state in the first end of the second direction of the i-th semiconductor layer.
摘要翻译：根据一个实施例，非易失性半导体存储器包括在第一方向上的第一至第n（n是不小于2的自然数）半导体层，并且在第二方向上延伸，并且半导体层具有阶梯状图案第二方向的第一端，在第二方向的第一端中共同连接到第一至第n半导体层的公共半导体层，第一至第n层选择晶体管，其从第一电极侧第一电极和第一至第n存储器串以及使第i层选择晶体管（i为1至n之一）的第一至第n杂质区在第一端中的正常导通状态第i个半导体层的第2方向。

57. 发明授权

US07999303B2 NAND-type nonvolatile semiconductor memory device 有权
标题翻译： NAND型非易失性半导体存储器件
公开(公告)号：US07999303B2
公开(公告)日：2011-08-16
申请号：US12353586
申请日：2009-01-14
申请人： Shoko Kikuchi , Yasushi Nakasaki , Koichi Muraoka
发明人： Shoko Kikuchi , Yasushi Nakasaki , Koichi Muraoka
IPC分类号： H01L29/788
CPC分类号： H01L27/11568 , H01L21/28282 , H01L29/513 , H01L29/517 , H01L29/78
摘要： The present invention provides a high-performance MONOS-type NAND-type nonvolatile semiconductor memory device using an aluminum oxide film as a part of gate insulating film in a select transistor and as a block insulating film in a memory transistor. The NAND-type nonvolatile semiconductor memory device has, on a semiconductor substrate, a plurality of memory cell transistors connected to each other in series and a select transistor. The memory cell transistor includes a first insulating film on the semiconductor substrate, a charge trapping layer, a second insulating film made of aluminum oxide,a first control gate electrode, and a first source/drain region. The select transistor includes a third insulating film on the semiconductor substrate, a fourth insulating film made of an aluminum oxide containing at least one of a tetravalent cationic element, a pentavalent cationic element, and N (nitrogen), a second control gate electrode, and a second source/drain region.
摘要翻译：本发明提供一种在选择晶体管中使用氧化铝膜作为栅绝缘膜的一部分的高性能MONOS型NAND型非易失性半导体存储器件，并且作为存储晶体管中的块绝缘膜。 NAND型非易失性半导体存储器件在半导体衬底上具有串联连接的多个存储单元晶体管和选择晶体管。存储单元晶体管包括半导体衬底上的第一绝缘膜，电荷俘获层，由氧化铝制成的第二绝缘膜，第一控制栅极电极和第一源极/漏极区域。选择晶体管包括半导体衬底上的第三绝缘膜，由包含四价阳离子元素，五价阳离子元素和N（氮）中的至少一种的氧化铝制成的第四绝缘膜，第二控制栅电极和第二源极/漏极区域。

58. 发明授权

US07825458B2 Nonvolatile semiconductor memory and manufacturing method thereof 有权
标题翻译：非易失性半导体存储器及其制造方法
公开(公告)号：US07825458B2
公开(公告)日：2010-11-02
申请号：US12050427
申请日：2008-03-18
申请人： Tatsuo Shimizu , Koichi Muraoka , Masato Koyama , Shoko Kikuchi
发明人： Tatsuo Shimizu , Koichi Muraoka , Masato Koyama , Shoko Kikuchi
IPC分类号： H01L29/792
CPC分类号： H01L29/792 , H01L21/28282 , H01L29/4234 , H01L29/513 , H01L29/66833 , H01L29/785
摘要： A nonvolatile semiconductor memory includes a source area and a drain area provided on a semiconductor substrate with a gap which serves as a channel area, a first insulating layer, a charge accumulating layer, a second insulating layer (block layer) and a control electrode, formed successively on the channel area, and the second insulating layer is formed by adding an appropriate amount of high valence substance into base material composed of substance having a sufficiently higher dielectric constant than the first insulating layer so as to accumulate a large amount of negative charges in the block layer by localized state capable of trapping electrons, so that the high dielectric constant of the block layer and the high electronic barrier are achieved at the same time.
摘要翻译：非易失性半导体存储器包括设置在具有用作沟道区的间隙的半导体衬底上的源区和漏区，第一绝缘层，电荷累积层，第二绝缘层（阻挡层）和控制电极，在通道区域上依次形成，并且通过向具有比第一绝缘层高的介电常数的物质构成的基材中添加适量的高价态物质形成第二绝缘层，以便积累大量的负电荷在阻挡层中通过能够捕获电子的局部状态，从而同时实现阻挡层和高电子势垒的高介电常数。

59. 发明授权

US07816215B2 Semiconductor device manufacturing method 失效
标题翻译：半导体器件制造方法
公开(公告)号：US07816215B2
公开(公告)日：2010-10-19
申请号：US10941814
申请日：2004-09-16
申请人： Daisuke Matsushita , Koichi Muraoka , Seiji Inumiya , Koichi Kato , Kazuhiro Eguchi , Mariko Takayanagi , Yasushi Nakasaki
发明人： Daisuke Matsushita , Koichi Muraoka , Seiji Inumiya , Koichi Kato , Kazuhiro Eguchi , Mariko Takayanagi , Yasushi Nakasaki
IPC分类号： H01L21/336
CPC分类号： H01L21/28202 , H01L21/022 , H01L21/02329 , H01L21/0234 , H01L21/3144 , H01L29/513 , H01L29/518
摘要： A semiconductor device manufacturing method comprises: forming a gate insulative film on a semiconductor substrate by: forming a first nitride film on the substrate; forming a first oxide film and a second oxide film, the first oxide film being between the substrate and the first nitride film, the second oxide film being on the first nitride film; and nitriding the second oxide film to form, on the first nitride film, one of either: a second nitride film or an SiON film; and forming a gate electrode on the gate insulative film; wherein the equivalent oxide thickness of the gate insulative film is equal to or less than 1 nm.
摘要翻译：一种半导体器件制造方法，包括：在半导体衬底上形成栅极绝缘膜，方法是在衬底上形成第一氮化物膜; 形成第一氧化物膜和第二氧化物膜，所述第一氧化膜位于所述衬底和所述第一氮化物膜之间，所述第二氧化物膜位于所述第一氮化物膜上; 并且对所述第二氧化物膜进行氮化以在所述第一氮化物膜上形成以下之一：第二氮化物膜或SiON膜; 并在所述栅极绝缘膜上形成栅电极; 其中所述栅绝缘膜的等效氧化物厚度等于或小于1nm。

60. 发明授权

US07750394B2 Nonvolatile semiconductor memory 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US07750394B2
公开(公告)日：2010-07-06
申请号：US12189400
申请日：2008-08-11
申请人： Tatsuo Shimizu , Koichi Muraoka
发明人： Tatsuo Shimizu , Koichi Muraoka
IPC分类号： H01L29/94
CPC分类号： H01L29/792 , H01L21/28273 , H01L21/28282 , H01L29/513 , H01L29/517
摘要： A nonvolatile semiconductor memory device includes: a semiconductor substrate; and a memory cell. The memory cell includes: a source region and a drain region formed at a distance from each other on the semiconductor substrate; a tunnel insulating film formed on a channel region of the semiconductor substrate, the channel region being located between the source region and the drain region; a charge storage film formed on the tunnel insulating film; a charge block film formed on the charge storage film; and a control electrode that is formed on the charge block film. The control electrode includes a Hf oxide film or a Zr oxide film having at least one element selected from the first group consisting of V, Cr, Mn, and Tc added thereto, and having at least one element selected from the second group consisting of F, H, and Ta added thereto.
摘要翻译：非易失性半导体存储器件包括：半导体衬底; 和存储单元。存储单元包括：在半导体衬底上形成为彼此间隔一定距离的源极区域和漏极区域; 隧道绝缘膜，形成在所述半导体衬底的沟道区上，所述沟道区位于所述源极区和所述漏极区之间; 形成在隧道绝缘膜上的电荷存储膜; 形成在电荷存储膜上的电荷阻挡膜; 以及形成在电荷阻挡膜上的控制电极。控制电极包括Hf氧化物膜或Zr氧化物膜，其具有从添加有V，Cr，Mn和Tc的第一组中选择的至少一种元素，并且具有至少一种选自F ，H和Ta。

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