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51. 发明申请

US20080129749A1 METHODS AND SYSTEMS FOR UPDATING A BUFFER 有权
标题翻译：更新缓冲区的方法和系统
公开(公告)号：US20080129749A1
公开(公告)日：2008-06-05
申请号：US12020415
申请日：2008-01-25
申请人： George Alan Wiley , Brian Steele
发明人： George Alan Wiley , Brian Steele
IPC分类号： G09G5/36
CPC分类号： G09G5/393 , G09G5/12 , G09G5/395 , G09G2320/0247
摘要： The present invention relates to methods and systems for updating a buffer. In one aspect, the present invention provides a method for updating a buffer, which includes strategically writing to the buffer to enable concurrent read and write to the buffer. The method eliminates the need for double buffering, thereby resulting in implementation cost sad space saving's compared to conventional buffering approaches. The method also prevents image tearing when, used to update a frame buffer associated with a display, but is not limited to such applications. In another aspect, the present: invention provides efficient mechanisms to enable buffer update across a communication link. In one example, the present invention provides a method for relaying timing information across a communication link.
摘要翻译：本发明涉及用于更新缓冲器的方法和系统。一方面，本发明提供了一种用于更新缓冲器的方法，其包括对缓冲器进行战略性地写入，以便能够对缓冲器进行并行读写。该方法消除了对双缓冲的需要，从而与传统的缓冲方法相比，导致实现成本难以节省空间。当用于更新与显示器相关联的帧缓冲器时，该方法还防止图像撕裂，但不限于此类应用。在另一方面，本发明提供了有效的机制来实现跨越通信链路的缓冲器更新。在一个示例中，本发明提供了一种用于在通信链路上中继定时信息的方法。

52. 发明授权

US6078629A Digital synthesizer 失效
标题翻译：数字合成器
公开(公告)号：US6078629A
公开(公告)日：2000-06-20
申请号：US228140
申请日：1999-01-11
申请人： David Norton Critchlow , Moshe Yehushua , Graham Martin Avis , Wade Lyle Heimbigner , Karle Joseph Johnson , George Alan Wiley
发明人： David Norton Critchlow , Moshe Yehushua , Graham Martin Avis , Wade Lyle Heimbigner , Karle Joseph Johnson , George Alan Wiley
IPC分类号： G06F1/035 , H03B28/00 , H03C3/00 , H03D3/00 , H04L23/00 , H04L25/03 , H04L27/00 , H04L27/04 , H04L27/06 , H04L27/12 , H04L27/20
CPC分类号： H04L25/03343 , H03D3/007 , H04L27/00 , H04L27/2092 , H03B28/00 , H03C3/00 , H04L2025/03375 , H04L2025/03477
摘要： A subscriber unit for wireless communication with a base station in a wireless subscriber communication system includes a FIR chip, a DIF (digital intermediate frequency) chip, a single prccessor chip and a radio. The processor chip transcodes a digital voice input signal to provide digital input symbols; demodulates an output signal received from the base station to provide digital output symbols; and synthesizes a digital voice output signal from the digital output symbols. The FIR chip FIR filters the digital input symbols and generates timing signals for timing the transcoding and synthesizing operations in the processor chip. The DIF chip digitally synthesizes a digital intermediate frequency signal by direct digital synthesis (DDS) and modulates the digital intermediate frequency signal with the filtered input symbols to provide a modulated intermediate frequency input signal. The radio further processes the modulated input signal for transmission to the base station.
摘要翻译：用于与无线用户通信系统中的基站进行无线通信的用户单元包括FIR芯片，DIF（数字中频）芯片，单个处理器芯片和无线电装置。处理器芯片对数字语音输入信号进行转码以提供数字输入符号; 解调从基站接收的输出信号以提供数字输出符号; 并从数字输出符号合成数字语音输出信号。 FIR芯片FIR对数字输入符号进行滤波，并产生用于对处理器芯片中的代码转换和合成操作进行定时的定时信号。 DIF芯片通过直接数字合成（DDS）数字合成数字中频信号，并用滤波后的输入符号对数字中频信号进行调制，以提供调制中频输入信号。无线电进一步处理调制的输入信号以传输到基站。

53. 发明授权

US5859883A Subscriber unit for wireless digital subscriber communication system 失效
公开(公告)号：US5859883A
公开(公告)日：1999-01-12
申请号：US881339
申请日：1997-06-24
申请人： David Norton Critchlow , Moshe Yehushua , Graham Martin Avis , Wade Lyle Heimbigner , Karle Joseph Johnson , George Alan Wiley
发明人： David Norton Critchlow , Moshe Yehushua , Graham Martin Avis , Wade Lyle Heimbigner , Karle Joseph Johnson , George Alan Wiley
IPC分类号： G06F1/035 , H03B28/00 , H03C3/00 , H03D3/00 , H04L23/00 , H04L25/03 , H04L27/00 , H04L27/04 , H04L27/06 , H04L27/12 , H04L27/20
CPC分类号： H04L25/03343 , H03D3/007 , H04L27/00 , H04L27/2092 , H03B28/00 , H03C3/00 , H04L2025/03375 , H04L2025/03477
摘要： A subscriber unit for wireless communication with a base station in a wireless subscriber communication system includes a FIR chip, a DIF (digital intermediate frequency) chip, a single processor chip and a radio. The processor chip transcodes a digital voice input signal to provide digital input symbols; demodulates an output signal received from the base station to provide digital output symbols; and synthesizes a digital voice output signal from the digital output symbols. The FIR chip FIR filters the digital input symbols and generates timing signals for timing the transcoding and synthesizing operations in the processor chip. The DIF chip digitally synthesizes a digital intermediate frequency signal by direct digital synthesis (DDS) and modulates the digital intermediate frequency signal with the filtered input symbols to provide a modulated intermediate frequency input signal. The radio further processes the modulated input signal for transmission to the base station.

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