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51. 发明公开

EP2048527A3 Method of making circuitized substrate with internal optical pathway 审中-公开
标题翻译：与内部光路连接，用于制造基片的方法
公开(公告)号：EP2048527A3
公开(公告)日：2011-03-30
申请号：EP08253281.3
申请日：2008-10-08
申请人： Endicott Interconnect Technologies, Inc.
发明人： Chan, Benson , Magnuson, Roy K. , Lin, How T. , Markovich, Voya R. , Poliks, Mark D.
IPC分类号： G02B6/13 , G02B6/43
CPC分类号： G02B6/1221 , G02B6/132 , G02B6/136 , G02B6/4214 , G02B6/4246 , H05K1/0274
摘要： A circuitized substrate (11) (e.g., PCB) including an internal optical pathway (33) as part thereof such that the substrate (11) is capable of transmitting and/or receiving both electrical and optical signals. The substrate (11) includes an angular reflector (25) on one of the cladding layers (17) such that optical signals passing through the optical core (33) will impinge on the angled reflecting surfaces (31) of the angular reflector (25) and be reflected up through an opening (55) (including one with optically transparent material (61) therein), e.g., to a second circuitized substrate (73) also having at least one internal optical pathway as part thereof, to thus interconnect the two substrates (11, 73) optically. A method of making the substrate (11) is also provided.

52. 发明公开

EP2001271A3 Method for making a multilayered circuitized substrate 审中-公开
标题翻译：用于多层印刷电路板制造方法
公开(公告)号：EP2001271A3
公开(公告)日：2010-11-03
申请号：EP08251545.3
申请日：2008-04-28
申请人： Endicott Interconnect Technologies, Inc.
发明人： Davis, Thomas J. , Lauffer, John M. , Desai, Subahu D. , McNamara, James J. Jnr. , Markovich, Voya R.
IPC分类号： H05K1/00 , H05K3/46 , H05K3/44 , H05K3/40
CPC分类号： H05K3/429 , H05K3/0032 , H05K3/0038 , H05K3/427 , H05K3/445 , H05K3/4623 , H05K3/4641 , H05K2201/0355 , H05K2201/09536 , H05K2201/096 , H05K2203/0143 , H05K2203/0554 , H05K2203/1545 , H05K2203/1572 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165
摘要： A method of making a multilayered circuitized substrate (101) in which a continuous process is used to form electrically conductive layers (65) which each will form part of a sub-composite (75, 75', 75"). The sub-composites (75, 75', 75") are then aligned such that openings (57) within the conductive layers (65) are also aligned, the sub-composites (75, 75', 75") are then bonded together, and a plurality of holes (113) are then laser drilled through the entire thickness of the bonded structure. The dielectric layers (67, 69) used in the sub-composites (75, 75', 75") do not include continuous or semi-continuous fibers therein, thus expediting hole formation there-through.

53. 发明公开

EP2053906A2 Circuitized substrate with internal cooling structure and electrical assembly utilizing same 审中-公开
标题翻译： Geschaltetes Substrat mit internerKühlungsstrukturund elektrische Anordnung damit
公开(公告)号：EP2053906A2
公开(公告)日：2009-04-29
申请号：EP08253371.2
申请日：2008-10-17
申请人： Endicott Interconnect Technologies, Inc.
发明人： Chan, Benson , Lin, How T. , Egitto, Frank D. , Magnuson, Roy H. , Markovich, Voya R. , Thomas, David L.
IPC分类号： H05K1/02 , H05K3/46
CPC分类号： H05K1/0206 , H01L2924/0002 , H05K1/0272 , H05K3/0061 , H05K3/44 , H05K2201/064 , H05K2201/09745 , H05K2201/10674 , Y10S428/901 , Y10T29/49126 , Y10T29/4913 , Y10T428/24917 , H01L2924/00
摘要： An electrical assembly (31) which includes a circuitized substrate (39) including a first plurality of dielectric (25) and electrically conductive (27) circuit layers alternatively oriented in a stacked orientation, a thermal cooling structure (13) bonded to one of the dielectric layers (45) and at least one electrical component (33, 35) mounted on the circuitized substrate (39). The circuitized substrate (39) includes a plurality of electrically conductive (41) and thermally conductive (51) thru-holes located therein, selected ones of the thermally conductive thru-holes (51) thermally coupled to the electrical component(s) (33, 35) and extending through the first plurality of dielectric (25) and electrically conductive (27) circuit layers and being thermally coupled to the thermal cooling structure (13), each of these selected ones of thermally conductive thru-holes (51) providing a thermal path from the electrical component (33, 35) to the thermal cooling structure (13) during assembly operation. The thermal cooling structure (13) is adapted for having cooling fluid pass there-through during operation of the assembly. A method of making the substrate is also provided.
摘要翻译：一种电气组件（31），其包括电路化基板（39），所述电路化基板（39）包括以堆叠取向交替定向的第一多个电介质（25）和导电（27）电路层;热冷却结构（13）电介质层（45）和安装在电路化基板（39）上的至少一个电气部件（33,35）。电路化基板（39）包括位于其中的多个导电（41）和导热（51）通孔，选择的热耦合到电气部件（33）的导热通孔（51），35）并且延伸穿过所述第一多个电介质（25）和导电（27）电路层并且热耦合到所述热冷却结构（13），所述选择的导热通孔（51）中的每一个提供在组装操作期间从电气部件（33,35）到热冷却结构（13）的热路径。热冷却结构（13）适于在组件的操作期间使冷却流体通过。还提供了制造衬底的方法。

54. 发明公开

EP1976349A2 Circuitized substrate with internal organic memory device, method of making same, electrical assembly utilizing same, and information handling system utilizing same 审中-公开
标题翻译：具有内部有机存储装置切换基板，其制造方法，从而使电气组件和信息处理系统，使
公开(公告)号：EP1976349A2
公开(公告)日：2008-10-01
申请号：EP08012912.5
申请日：2005-07-20
申请人： Endicott Interconnect Technologies, Inc.
发明人： Desai, Subahu D. , Lin, How T. , Lauffer, John M. , Markovich, Voya R. , Thomas, David L.
IPC分类号： H05K1/16 , G11C11/22
CPC分类号： G11C11/22 , H01L2224/16 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H01L2924/16195 , H01L2924/3011 , H05K1/16 , H05K2201/0166 , H05K2201/0179 , H05K2201/09763 , H05K2201/10159 , H01L2224/0401
摘要： A circuitized substrate (11) comprised of at least one dielectric material (13) having an electrically conductive pattern thereon. At least part of the pattern is used as the first layer of an organic memory device (35) which further includes at least a second dielectric layer over the pattern and a second pattern aligned with respect to the lower part for achieving several points of contact to thus form the device. The substrate (11) is preferably combined with other dielectric-circuit layered assemblies to form a multilayered substrate on which can be positioned discrete electronic components (e.g., a logic chip) coupled to the internal memory device to work in combination therewith. An electrical assembly (71) capable of using the substrate is also provided, as is an information handling system (101) adapted for using one or more such electrical assemblies as part thereof.
摘要翻译：甲电路化衬底（11），包括具有在其上在导电图案的至少一个电介质材料（13）的。在图案的至少一部分被用作有机存储器装置（35），其还包括至少在相对于对准下部用于向实现联系的几个点的图案和第二图案的第二介电层的第一层因此形成该设备。基板（11）优选地与其他介电电路层状组件组合，以形成耦合到内部存储器装置上可定位的分立电子元件的多层基板（E. G.，逻辑芯片）结合在那里工作。因此，为了电气组件（71）能够使用设置在基材上，如用于使用一个或多个搜索电气组件作为其一部分的信息处理系统（101）。

55. 发明公开

EP1549118A3 Printed circuit board with low cross-talk noise 审中-公开
标题翻译：印刷电路板具有低串扰噪声
公开(公告)号：EP1549118A3
公开(公告)日：2007-07-18
申请号：EP04257721.3
申请日：2004-12-13
申请人： Endicott Interconnect Technologies, Inc.
发明人： Lauffer, John M. , Markovich, Voya R. , McNamara, James J., Jr. , Thomas, David L.
IPC分类号： H05K1/02 , H05K3/46
CPC分类号： H05K1/0216 , H05K1/0228 , H05K2201/09236 , H05K2201/09672 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165
摘要： A printed circuit board (10) and a method of making same in which the board includes a common power plane (11) having dielectric layers (19, 23) on opposing sides thereof and a signal layer (21, 25) on each of said dielectric layers (19, 23), each signal layer comprising a plurality of substantially parallel signal lines (22, 27) running in substantially similar directions across said signal layers (21, 25). Predetermined portions of the signal lines (22, 27) in one signal layer are aligned relative to and also parallel to corresponding signal lines in the other signal layer, with the power plane (11) being located between these portions. Through hole connections are provided between selected signal lines in the two layers, these occurring through clearance holes (13) in the power plane (11) so as to be isolated therefrom.

56. 发明公开

EP1443811A3 High speed circuit board and method for fabrication 审中-公开
标题翻译：高速电路板和过程及其制备
公开(公告)号：EP1443811A3
公开(公告)日：2007-03-07
申请号：EP04250455.5
申请日：2004-01-28
申请人： Endicott Interconnect Technologies, Inc.
发明人： Chan, Benson , Lauffer, John M. , Lin, How T. , Markovich, Voya R. , Thomas, David L.
IPC分类号： H05K3/46 , H05K1/02
CPC分类号： H05K3/4688 , H01L23/3128 , H01L23/5383 , H01L25/0652 , H01L25/0655 , H01L25/18 , H01L2224/16 , H01L2224/73253 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/12044 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/16195 , H01L2924/3011 , H01L2924/3025 , H05K1/024 , H05K1/113 , H05K3/4623 , H05K2201/09536 , H05K2201/096 , H05K2203/061 , Y10T29/49126 , Y10T29/49165 , H01L2224/0401
摘要： A multilayered PCB (30) including two multilayered portions, one of these (20) able to electrically connect electronic components (77) mounted on the PCB to assure high frequency connections therebetween. The PCB further includes a conventional PCB portion (31) to reduce costs while assuring a structure having a satisfactory overall thickness for use in the PCB field. Coupling is also possible to the internal portion from these components. Methods of making these structures have also been provided.

57. 发明公开

EP1549118A2 Printed circuit board with low cross-talk noise 审中-公开
标题翻译： Gedruckte Leiterplatte mit geringemÜbersprechungsrauschen
公开(公告)号：EP1549118A2
公开(公告)日：2005-06-29
申请号：EP04257721.3
申请日：2004-12-13
申请人： Endicott Interconnect Technologies, Inc.
发明人： Lauffer, John M. , Markovich, Voya R. , McNamara, James J., Jr. , Thomas, David L.
IPC分类号： H05K1/02 , H05K3/46
CPC分类号： H05K1/0216 , H05K1/0228 , H05K2201/09236 , H05K2201/09672 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165
摘要： A printed circuit board (10) and a method of making same in which the board includes a common power plane (11) having dielectric layers (19, 23) on opposing sides thereof and a signal layer (21, 25) on each of said dielectric layers (19, 23), each signal layer comprising a plurality of substantially parallel signal lines (22, 27) running in substantially similar directions across said signal layers (21, 25). Predetermined portions of the signal lines (22, 27) in one signal layer are aligned relative to and also parallel to corresponding signal lines in the other signal layer, with the power plane (11) being located between these portions. Through hole connections are provided between selected signal lines in the two layers, these occurring through clearance holes (13) in the power plane (11) so as to be isolated therefrom.
摘要翻译：一种印刷电路板（10）及其制造方法，其中所述板包括在其相对侧上具有电介质层（19,23）的公共电源平面（11）和在其上的每一个上的信号层（21,25）电介质层（19,23），每个信号层包括跨越所述信号层（21,25）以基本类似的方向延伸的多个基本平行的信号线（22,27）。一个信号层中的信号线（22,27）的预定部分相对于并且平行于另一个信号层中的相应信号线对准，而功率平面（11）位于这些部分之间。在两层中的选定信号线之间提供通孔连接，这些连接通过电源平面（11）中的间隙孔（13）发生，从而与之隔离。

58. 发明公开

EP1473977A2 Electronic package with strengthened conductive pad 审中-公开
标题翻译： ElektronischesGehäusemitverstärktenleitendenKontaktflächen
公开(公告)号：EP1473977A2
公开(公告)日：2004-11-03
申请号：EP04250754.1
申请日：2004-02-12
申请人： Endicott Interconnect Technologies, Inc.
发明人： Alcoe, David
IPC分类号： H05K1/11 , H01L23/498 , H01L23/485
CPC分类号： H01L23/49811 , H01L23/49822 , H01L23/49838 , H01L2224/73253 , H01L2924/01019 , H01L2924/01078 , H01L2924/15312 , H05K1/113 , H05K1/114 , H05K1/115 , H05K1/116 , H05K3/3426 , H05K3/4602 , H05K2201/09454 , H05K2201/09472 , H05K2201/09509 , H05K2201/0979 , H05K2201/10318
摘要： An electronic package and information handling system utilizing same wherein the package substrate (11') includes an internally conductive layer (15') coupled to an external pad (13') and of a size sufficiently large enough to substantially prevent cracking, separation, etc. of the pad when the pad is subjected to a tensile pressure of about 1.4 grams per square mil or greater.
摘要翻译：一种利用其的电子封装和信息处理系统，其中封装衬底（11'）包括耦合到外部焊盘（13'）的内部导电层（15'），其尺寸足够大以基本上防止开裂，分离等当垫受到约1.4克/平方密度或更大的拉伸压力时，

59. 发明公开

EP1432294A2 Circuitized substrate assembly and method of making same 审中-公开
标题翻译：电路化基板组件及其制造方法
公开(公告)号：EP1432294A2
公开(公告)日：2004-06-23
申请号：EP03257866.8
申请日：2003-12-15
申请人： Endicott Interconnect Technologies, Inc.
发明人： Fuller, James W., Jr. , Markovich, Voya R. , Lauffer, John M.
IPC分类号： H05K3/46
CPC分类号： H05K3/462 , H05K3/321 , H05K3/4069 , H05K3/429 , H05K3/4623 , H05K2201/0347 , H05K2201/09536 , H05K2201/0959 , H05K2201/096 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49151 , Y10T29/49155 , Y10T29/49165 , Y10T29/49167
摘要： A circuitized substrate assembly (10) and method for making same wherein the assembly includes individual circuitized substrates (11, 13) bonded together. The substrates each include at least one opening (21), only one of which is substantially filled with a conductive paste (25) prior to bonding. Once bonded, the paste is also partially located within the other opening to provide an effective electrical connection therewith.
摘要翻译：一种电路化衬底组件（10）及其制造方法，其中所述组件包括结合在一起的各个电路化衬底（11,13）。每个衬底包括至少一个开口（21），在键合之前其中仅一个基本上填充有导电膏（25）。一旦粘合，糊剂也部分位于另一个开口内以提供与其有效的电连接。

60. 发明专利

TW200908828A 具內部電阻器之電路化基板,製造該電路化基板之方法及使用該電路化基板之電子總成 CIRCUITIZED SUBSTRATE WITH INTERNAL RESISTOR, METHOD OF MAKING SAID CIRCUITIZED SUBSTRATE, AND ELECTRICAL ASSEMBLY UTILIZING SAID CIRCUITIZED SUBSTRATE 审中-公开
简体标题：具内部电阻器之电路化基板,制造该电路化基板之方法及使用该电路化基板之电子总成 CIRCUITIZED SUBSTRATE WITH INTERNAL RESISTOR, METHOD OF MAKING SAID CIRCUITIZED SUBSTRATE, AND ELECTRICAL ASSEMBLY UTILIZING SAID CIRCUITIZED SUBSTRATE
公开(公告)号：TW200908828A
公开(公告)日：2009-02-16
申请号：TW097118394
申请日：2008-05-19
申请人：安迪克連接科技公司 ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
发明人：拉賓拉N 達司 DAS, RABINDRA N. , 麥可J 羅蘭 ROWLANDS, MICHAEL J.
IPC分类号： H05K
摘要：本發明提供一種電路化基板,其使用至少一個內部(嵌埋式)電阻器作為其部分,該電阻器包含之材料包括樹脂及一定數量之奈米粒度及/或微米粒度之粉末。該電阻器用以減小所形成電路中之電容,同時僅稍微增加高頻電阻,由此經由大體上消除已知存在於諸如此等之結構中的一些不連續性來改良電路效能。本發明亦提供一種電子總成(基板及至少一個電子組件)。
简体摘要：本发明提供一种电路化基板,其使用至少一个内部(嵌埋式)电阻器作为其部分,该电阻器包含之材料包括树脂及一定数量之奈米粒度及/或微米粒度之粉末。该电阻器用以减小所形成电路中之电容,同时仅稍微增加高频电阻,由此经由大体上消除已知存在于诸如此等之结构中的一些不连续性来改良电路性能。本发明亦提供一种电子总成(基板及至少一个电子组件)。

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