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51. 发明申请

WO2015057670A1 CONTACT DETECTION MODE SWITCHING IN A TOUCHSCREEN DEVICE 审中-公开
标题翻译：触摸屏设备中的接触检测模式切换
公开(公告)号：WO2015057670A1
公开(公告)日：2015-04-23
申请号：PCT/US2014/060437
申请日：2014-10-14
申请人： CYPRESS SEMICONDUCTOR CORPORATION
发明人： WANG, Han , KSONDZYK, Petro , LEILEI, Chen
IPC分类号： G06F3/044
CPC分类号： G06F3/044 , G06F3/0418 , G06F2203/04106 , G06F2203/04108 , G06F2203/04112
摘要： A method is disclosed for determining detecting a conductive object and determining the type of object and the type of contact that object has with a touch sensitive surface, the method comprising measuring capacitance on a plurality of mutual capacitance sensors, each mutual capacitance sensor corresponding to a unit cell in an array of unit cells. After mutual capacitance is measured a peak unit cell is identified based on the measured capacitances and a matrix sum of a plurality of unit cells surround the peak unit cell is calculated. The value of the peak unit cell and the matrix sum are then compared to a range and a contact type determined based on the comparison.
摘要翻译：公开了一种用于确定检测导电物体并确定物体的类型和物体与触敏表面的接触类型的方法，所述方法包括测量多个互电容传感器上的电容，每个互电容传感器对应于单元格单元格的单元格。在测量相互电容之后，基于测量的电容来识别峰值单位单元，并且计算围绕峰值单位单元的多个单位单元的矩阵和。然后将峰值单位单元和矩阵和的值与基于比较确定的范围和接触类型进行比较。

52. 发明申请

WO2014209559A1 METHODS OF FABRICATING AN F-RAM 审中-公开
标题翻译：制作F-RAM的方法
公开(公告)号：WO2014209559A1
公开(公告)日：2014-12-31
申请号：PCT/US2014/040886
申请日：2014-06-04
申请人： CYPRESS SEMICONDUCTOR CORPORATION
发明人： SUN, Shan , RAMKUMAR, Krishnaswamy , DAVENPORT, Tom E.
IPC分类号： H01L21/8242
CPC分类号： H01L28/57 , H01L21/76807 , H01L21/76834 , H01L21/76849 , H01L21/76895 , H01L27/11507
摘要： Non-volatile memory cells including complimentary metal-oxide-semiconductor transistors and embedded ferroelectric capacitor and methods of forming the same are described. In one embodiment, the method includes forming on a surface of a substrate a gate level including a gate stack of a MOS transistor, a first dielectric layer overlying the MOS transistor and a first contact extending through the first dielectric layer from a top surface thereof to a diffusion region of the MOS transistor. A local interconnect (LI) layer is deposited over the top surface of the first dielectric layer and the first contact, a ferro stack including a bottom electrode, a top electrode and ferroelectric layer there between deposited over the LI layer, and the ferro stack and the LI layer patterned to form a ferroelectric capacitor and a LI through which the bottom electrode is electrically coupled to the diffusion region of the MOS transistor.
摘要翻译：描述了包括互补金属氧化物半导体晶体管和嵌入式铁电电容器的非易失性存储单元及其形成方法。在一个实施例中，该方法包括在衬底的表面上形成栅极电平，栅极电平包括MOS晶体管的栅极堆叠，覆盖MOS晶体管的第一电介质层和从顶表面延伸穿过第一电介质层的第一触点 MOS晶体管的扩散区域。局部互连（LI）层沉积在第一电介质层的顶表面上，第一触点，包括沉积在LI层上的底电极，顶电极和铁电层的铁电堆和铁堆和 LI层被图案化以形成铁电电容器和LI，底电极通过该电极电耦合到MOS晶体管的扩散区域。

53. 发明申请

WO2014143200A1 HARD PRESS REJECTION 审中-公开
标题翻译：硬新闻拒绝
公开(公告)号：WO2014143200A1
公开(公告)日：2014-09-18
申请号：PCT/US2013/068557
申请日：2013-11-05
申请人： CYPRESS SEMICONDUCTOR CORPORATION , KSONDZYK, Petro , AHN, Jae-Bum
发明人： KSONDZYK, Petro , AHN, Jae-Bum
IPC分类号： G01B7/32
CPC分类号： G06F3/0414 , G06F3/0416 , G06F3/0418 , G06F3/044 , G06F2203/04104
摘要： Techniques for hard press rejection are described herein. In an example embodiment, a touch area on a sensor array is determined, where the touch area corresponds to a detected object and is associated with multiple signal values. A slope value for the detected object is computed based on a ratio of a signal distribution value in the touch area to a metric indicating a size of the touch area with respect to the sensor array. The slope value is compared to a threshold in order to determine whether to accept or to reject the detected object, and the detected object is rejected based on the comparison.
摘要翻译：本文描述了用于硬压机排除的技术。在示例实施例中，确定传感器阵列上的触摸区域，其中触摸区域对应于检测到的对象并且与多个信号值相关联。基于触摸区域中的信号分布值与指示相对于传感器阵列的触摸区域的大小的度量的比率来计算检测对象的斜率值。将斜率值与阈值进行比较，以便确定是否接受或拒绝检测到的对象，并且基于该比较来拒绝检测到的对象。

54. 发明申请

WO2014105942A1 OFFSET SENSOR PATTERN 审中-公开
标题翻译：偏移传感器图案
公开(公告)号：WO2014105942A1
公开(公告)日：2014-07-03
申请号：PCT/US2013/077787
申请日：2013-12-26
申请人： CYPRESS SEMICONDUCTOR CORPORATION
发明人： PETERSON, Jonathan , WILSON, Cole , PRENDERGAST, Patrick
IPC分类号： G06F3/041 , G06F3/045
CPC分类号： G01R27/2605 , G01R1/02 , G06F1/16 , G06F3/044 , G06F3/047
摘要： A capacitive sensor array may comprise a plurality of column sensor electrodes and a plurality of row sensor electrodes. The column sensor electrodes may be capacitively coupled with the row sensor electrodes to form a plurality of unit cells each including an intensity center identifying a location of greatest capacitance sensitivity between a row electrode and a column electrode. An axis of a set of row sensor electrodes may cross at least a portion of each row electrode in the set, and the intensity centers associated with the row electrodes in the set may be staggered on alternating sides of the axis. For each of the plurality of unit cells, a distance between the intensity center of the unit cell and a nearest intensity center of another unit cell at a perimeter of the unit cell may be at least 0.7 times the height of the unit cell.
摘要翻译：电容传感器阵列可以包括多个列传感器电极和多个行传感器电极。列传感器电极可以与行传感器电极电容耦合以形成多个单元电池，每个单元电池包括识别行电极和列电极之间最大电容灵敏度位置的强度中心。一组行传感器电极的轴可以与组中的每个行电极的至少一部分交叉，并且与组中的行电极相关联的强度中心可以在轴的交替侧交错布置。对于多个单元电池中的每一个，单元电池的强度中心与单元电池周边的另一个晶胞的最近的强度中心之间的距离可以是单元电池的高度的至少0.7倍。

55. 发明申请

WO2014066185A1 POSITION SENSING METHODS AND DEVICES WITH DYNAMIC GAIN FOR EDGE POSITIONING 审中-公开
标题翻译：位置感测方法和具有动态增益的边缘定位装置
公开(公告)号：WO2014066185A1
公开(公告)日：2014-05-01
申请号：PCT/US2013/065758
申请日：2013-10-18
申请人： CYPRESS SEMICONDUCTOR CORPORATION , TUCKER, Jeffrey D. , AVERY, Benjamin J.
发明人： TUCKER, Jeffrey D. , AVERY, Benjamin J.
IPC分类号： G06F3/041
CPC分类号： G06F3/044 , G06F3/0416
摘要： A method can include determining an initial position of an object with respect to a sensing region formed by a plurality of sensors and having a core region bounded by at least one edge; if the initial position is proximate to the edge and a size of the object 5 was previously calculated, determining a final edge position of the object using the previously calculated object size; and if the initial position is proximate to the edge and the size of the object was not previously calculated, determining a size of the object.
摘要翻译：一种方法可以包括确定物体相对于由多个传感器形成的感测区域的初始位置，并具有由至少一个边缘限定的核心区域; 如果初始位置靠近边缘并且先前计算了对象5的尺寸，则使用先前计算的对象尺寸确定对象的最终边缘位置; 并且如果初始位置靠近边缘并且先前未计算对象的大小，则确定对象的大小。

56. 发明申请

WO2014025910A1 SENSOR SYSTEM AND METHOD FOR MAPPING AND CREATING GESTURES 审中-公开
标题翻译：传感器系统及其制作方法
公开(公告)号：WO2014025910A1
公开(公告)日：2014-02-13
申请号：PCT/US2013/053989
申请日：2013-08-07
申请人： CYPRESS SEMICONDUCTOR CORPORATION , WRIGHT, David , SEGUINE, Ryan , KOLOKOWSKY, Steve , YOUNG, David
发明人： WRIGHT, David , SEGUINE, Ryan , KOLOKOWSKY, Steve , YOUNG, David
IPC分类号： G09G5/00
CPC分类号： G06F3/0489 , G06F3/04845 , G06F3/04883
摘要： A computing system includes a sensor configured to detect user inputs. The system further includes a processor configured to receive a detected first user input from the sensor. The processor further receives a detected second user input from the sensor. In response, the processor assigns a command to the first user input based on the second user input.
摘要翻译：计算系统包括被配置为检测用户输入的传感器。该系统还包括被配置为从传感器接收检测到的第一用户输入的处理器。处理器还从传感器接收检测到的第二用户输入。作为响应，处理器基于第二用户输入向第一用户输入分配命令。

57. 发明申请

WO2014014493A1 INTERFACE AND SYNCHRONIZATION METHOD BETWEEN TOUCH CONTROLLER AND DISPLAY DRIVER FOR OPERATION WITH TOUCH INTEGRATED DISPLAYS 审中-公开
标题翻译： TOUCH控制器与显示驱动器之间的接口和同步方法
公开(公告)号：WO2014014493A1
公开(公告)日：2014-01-23
申请号：PCT/US2013/020027
申请日：2013-01-03
申请人： CYPRESS SEMICONDUCTOR CORPORATION , RIBEIRO, Milton , DECANNE, Bart , VAN DE WAERDT, Jan-Willem
发明人： RIBEIRO, Milton , DECANNE, Bart , VAN DE WAERDT, Jan-Willem
IPC分类号： G06F3/045
CPC分类号： G06F3/044 , G06F3/017 , G06F3/0412 , G06F3/0416
摘要： Apparatuses and methods of synchronizing a display driver integrated circuit (DDI) and a touch screen controller (TSC) integrated circuit that are coupled to a display integrated touch panel, such as an in-cell panel,, and allowing multi-phase transmit (TX) scanning of the in-cell touch panel. One apparatus includes a DDI configured to receive signals on a video interface from a host processor over a video interface and to drive electrodes of a touch panel. The DDI is configured to receive control signals from a TSC over a control interface to drive different transmit (TX) phase sequences of a TX signal in different sensing interval on the electrodes of the touch panel.
摘要翻译：同步显示驱动器集成电路（DDI）和触摸屏控制器（TSC）集成电路的装置和方法，其耦合到显示器集成触摸面板，例如小区内面板，并允许多相位传输（TX ）扫描单元内触摸面板。一种装置包括配置成通过视频接口从主机处理器的视频接口上接收信号并驱动触摸面板的电极的DDI。 DDI被配置为通过控制接口从TSC接收控制信号，以在触摸面板的电极上的不同感测间隔中驱动TX信号的不同发射（TX）相序。

58. 发明申请

WO2014011203A1 EDGE-BY-EDGE INTEGRATION AND CONVERSION 审中-公开
标题翻译：边缘一体化整合与转型
公开(公告)号：WO2014011203A1
公开(公告)日：2014-01-16
申请号：PCT/US2012/070850
申请日：2012-12-20
申请人： CYPRESS SEMICONDUCTOR CORPORATION , KARPIN, Oleksandr , MUSIJCHUK, Ihor , KOLYCH, Igor , BIHDAY, Volodymyr , KREMIN, Victor
发明人： KARPIN, Oleksandr , MUSIJCHUK, Ihor , KOLYCH, Igor , BIHDAY, Volodymyr , KREMIN, Victor
IPC分类号： G06F3/041
CPC分类号： G06F3/0418 , G06F3/044
摘要： An apparatus includes a transmission system configured to transmit a drive signal to a touch screen device. The apparatus also includes a reception system configured to integrate an output signal received from a touch screen device in response to the drive signals and to filter the integrated output signal to suppress noise in the output signal, wherein the reception system is configured to integrate the output signal for a period of time that is less than or equal to a signal period corresponding to the drive signal.
摘要翻译：一种装置包括被配置为将驱动信号传送到触摸屏设备的传输系统。该装置还包括：接收系统，被配置为响应于驱动信号积分从触摸屏设备接收的输出信号，并且对积分输出信号进行滤波以抑制输出信号中的噪声，其中接收系统被配置为将输出信号小于或等于对应于驱动信号的信号周期的时间段。

59. 发明申请

WO2014008515A1 METHODS FOR FABRICATING SEMICONDUCTOR MEMORY WITH PROCESS INDUCED STRAIN 审中-公开
标题翻译：用于制造具有过程诱导应变的半导体存储器的方法
公开(公告)号：WO2014008515A1
公开(公告)日：2014-01-09
申请号：PCT/US2013/054874
申请日：2013-08-14
申请人： CYPRESS SEMICONDUCTOR CORPORATION , POLISHCHUK, Igor , LEVY, Sagy , RAMKUMAR, Krishnaswamy , BYUN, Jeong
发明人： POLISHCHUK, Igor , LEVY, Sagy , RAMKUMAR, Krishnaswamy , BYUN, Jeong
IPC分类号： H01L21/336 , H01L29/792
CPC分类号： H01L21/28282 , H01L21/76224 , H01L29/4234 , H01L29/513 , H01L29/6653 , H01L29/7843 , H01L29/7846 , H01L29/785
摘要： A semiconductor device and method of fabricating the same are provided. In one embodiment, the semiconductor device includes a memory transistor with an oxidenitride- nitride-oxide (ONNO) stack disposed above a channel region. The ONNO stack comprises a tunnel dielectric layer disposed above the channel region, a multi-layer charge-trapping region disposed above the tunnel dielectric layer, and a blocking dielectric layer disposed above the multi-layer charge-trapping region. The multi-layer charge-trapping region includes a substantially trap-free layer comprising an oxygen-rich nitride and a trap-dense layer disposed above the trap-free layer. The semiconductor device further includes a strain inducing structure including a strain inducing layer disposed proximal to the ONNO stack to increase charge retention of the multi-layer charge-trapping region. Other embodiments are also disclosed.
摘要翻译：提供了半导体器件及其制造方法。在一个实施例中，半导体器件包括设置在沟道区上方的氧化氮化物 - 氮化物 - 氧化物（ONNO）堆的存储晶体管。 ONNO堆叠包括设置在沟道区上方的隧道介电层，设置在隧道介电层上方的多层电荷捕获区，以及设置在多层电荷俘获区上方的阻挡介质层。多层电荷捕获区域包括基本上无陷阱层，其包含富含氧的氮化物和设置在无阱层之上的陷阱致密层。半导体器件还包括应变诱导结构，其包括设置在ONNO堆叠附近的应变诱导层，以增加多层电荷俘获区域的电荷保留。还公开了其他实施例。

60. 发明申请

WO2014008161A1 RADICAL OXIDATION PROCESS FOR FABRICATING A NONVOLATILE CHARGE TRAP MEMORY DEVICE 审中-公开
标题翻译：用于制造非易失性电荷捕获存储器件的放射性氧化方法
公开(公告)号：WO2014008161A1
公开(公告)日：2014-01-09
申请号：PCT/US2013/048876
申请日：2013-07-01
申请人： CYPRESS SEMICONDUCTOR CORPORATION , RAMKUMAR, Krishnaswamy , LEVY, Sagy , BYUN, Jeong Soo
发明人： RAMKUMAR, Krishnaswamy , LEVY, Sagy , BYUN, Jeong Soo
IPC分类号： H01L21/316 , H01L21/336 , H01L21/318
CPC分类号： H01L21/02126 , B82Y10/00 , H01L21/02164 , H01L21/022 , H01L21/02238 , H01L21/02271 , H01L21/02326 , H01L21/02332 , H01L21/02337 , H01L29/125 , H01L29/4234 , H01L29/42392 , H01L29/66833 , H01L29/785 , H01L29/78696 , H01L29/792 , H01L29/7926
摘要： A method for fabricating a nonvolatile charge trap memory device is described. The method includes subjecting a substrate to a first oxidation process to form a tunnel oxide layer overlying a polysilicon channel, and forming over the tunnel oxide layer a multi-layer charge storing layer comprising an oxygen-rich, first layer comprising a nitride, and an oxygen-lean, second layer comprising a nitride on the first layer. The substrate is then subjected to a second oxidation process to consume a portion of the second layer and form a high-temperature-oxide (HTO) layer overlying the multi-layer charge storing layer. The stoichiometric composition of the first layer results in it being substantially trap free, and the stoichiometric composition of the second layer results in it being trap dense. The second oxidation process can comprise a plasma oxidation process or a radical oxidation process using In-Situ Steam Generation.
摘要翻译：描述了制造非易失性电荷陷阱存储器件的方法。所述方法包括使衬底经受第一氧化工艺以形成覆盖多晶硅沟道的隧道氧化物层，以及在所述隧道氧化物层上形成多层电荷存储层，所述多层电荷存储层包含富氧的第一层，所述第一层包含氮化物，以及在第一层上包含氮化物的贫氧第二层。然后对衬底进行第二氧化处理以消耗第二层的一部分并形成覆盖多层电荷存储层的高温氧化物（HTO）层。第一层的化学计量组成导致其基本上无陷阱，并且第二层的化学计量组成使其陷入致密。第二氧化过程可以包括使用原位蒸汽发生的等离子体氧化过程或自由基氧化过程。

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